net/ixgbe: fix VF registers

Some VF registers are using PF's name or address by mistake.
Although some of them are sharing the same addresses.

Fixes: 0198848a47 ("ixgbe: add access to specific device info")

Reported-by: Xuekun Hu <xuekun.hu@intel.com>
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
This commit is contained in:
Wenzhuo Lu 2016-11-06 11:57:04 -05:00 committed by Thomas Monjalon
parent 6880bdb6c6
commit 4882214cee

View File

@ -56,10 +56,10 @@ static const struct reg_info ixgbe_regs_general[] = {
};
static const struct reg_info ixgbevf_regs_general[] = {
{IXGBE_CTRL, 1, 1, "IXGBE_CTRL"},
{IXGBE_STATUS, 1, 1, "IXGBE_STATUS"},
{IXGBE_VFCTRL, 1, 1, "IXGBE_VFCTRL"},
{IXGBE_VFSTATUS, 1, 1, "IXGBE_VFSTATUS"},
{IXGBE_VFLINKS, 1, 1, "IXGBE_VFLINKS"},
{IXGBE_FRTIMER, 1, 1, "IXGBE_FRTIMER"},
{IXGBE_VFFRTIMER, 1, 1, "IXGBE_VFFRTIMER"},
{IXGBE_VFMAILBOX, 1, 1, "IXGBE_VFMAILBOX"},
{IXGBE_VFMBMEM, 16, 4, "IXGBE_VFMBMEM"},
{IXGBE_VFRXMEMWRAP, 1, 1, "IXGBE_VFRXMEMWRAP"},
@ -145,17 +145,17 @@ static const struct reg_info ixgbe_regs_rxdma[] = {
};
static const struct reg_info ixgbevf_regs_rxdma[] = {
{IXGBE_RDBAL(0), 8, 0x40, "IXGBE_RDBAL"},
{IXGBE_RDBAH(0), 8, 0x40, "IXGBE_RDBAH"},
{IXGBE_RDLEN(0), 8, 0x40, "IXGBE_RDLEN"},
{IXGBE_RDH(0), 8, 0x40, "IXGBE_RDH"},
{IXGBE_RDT(0), 8, 0x40, "IXGBE_RDT"},
{IXGBE_RXDCTL(0), 8, 0x40, "IXGBE_RXDCTL"},
{IXGBE_SRRCTL(0), 8, 0x40, "IXGBE_SRRCTL"},
{IXGBE_VFRDBAL(0), 8, 0x40, "IXGBE_VFRDBAL"},
{IXGBE_VFRDBAH(0), 8, 0x40, "IXGBE_VFRDBAH"},
{IXGBE_VFRDLEN(0), 8, 0x40, "IXGBE_VFRDLEN"},
{IXGBE_VFRDH(0), 8, 0x40, "IXGBE_VFRDH"},
{IXGBE_VFRDT(0), 8, 0x40, "IXGBE_VFRDT"},
{IXGBE_VFRXDCTL(0), 8, 0x40, "IXGBE_VFRXDCTL"},
{IXGBE_VFSRRCTL(0), 8, 0x40, "IXGBE_VFSRRCTL"},
{IXGBE_VFPSRTYPE, 1, 1, "IXGBE_VFPSRTYPE"},
{IXGBE_VFRSCCTL(0), 8, 0x40, "IXGBE_VFRSCCTL"},
{IXGBE_PVFDCA_RXCTRL(0), 8, 0x40, "IXGBE_PVFDCA_RXCTRL"},
{IXGBE_PVFDCA_TXCTRL(0), 8, 0x40, "IXGBE_PVFDCA_TXCTRL"},
{IXGBE_VFDCA_RXCTRL(0), 8, 0x40, "IXGBE_VFDCA_RXCTRL"},
{IXGBE_VFDCA_TXCTRL(0), 8, 0x40, "IXGBE_VFDCA_TXCTRL"},
{0, 0, 0, ""}
};
@ -193,14 +193,14 @@ static struct reg_info ixgbe_regs_tx[] = {
};
static const struct reg_info ixgbevf_regs_tx[] = {
{IXGBE_TDBAL(0), 4, 0x40, "IXGBE_TDBAL"},
{IXGBE_TDBAH(0), 4, 0x40, "IXGBE_TDBAH"},
{IXGBE_TDLEN(0), 4, 0x40, "IXGBE_TDLEN"},
{IXGBE_TDH(0), 4, 0x40, "IXGBE_TDH"},
{IXGBE_TDT(0), 4, 0x40, "IXGBE_TDT"},
{IXGBE_TXDCTL(0), 4, 0x40, "IXGBE_TXDCTL"},
{IXGBE_TDWBAL(0), 4, 0x40, "IXGBE_TDWBAL"},
{IXGBE_TDWBAH(0), 4, 0x40, "IXGBE_TDWBAH"},
{IXGBE_VFTDBAL(0), 4, 0x40, "IXGBE_VFTDBAL"},
{IXGBE_VFTDBAH(0), 4, 0x40, "IXGBE_VFTDBAH"},
{IXGBE_VFTDLEN(0), 4, 0x40, "IXGBE_VFTDLEN"},
{IXGBE_VFTDH(0), 4, 0x40, "IXGBE_VFTDH"},
{IXGBE_VFTDT(0), 4, 0x40, "IXGBE_VFTDT"},
{IXGBE_VFTXDCTL(0), 4, 0x40, "IXGBE_VFTXDCTL"},
{IXGBE_VFTDWBAL(0), 4, 0x40, "IXGBE_VFTDWBAL"},
{IXGBE_VFTDWBAH(0), 4, 0x40, "IXGBE_VFTDWBAH"},
{0, 0, 0, ""}
};