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net/ixgbe/base: add register definitions for NVM update

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Added additional register for X550 and above device family.

Signed-off-by: Piotr Skajewski <piotrx.skajewski@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
Reviewed-by: Wei Zhao <wei.zhao1@intel.com>
This commit is contained in:
Guinan Sun 2020-07-09 08:00:32 +00:00 committed by Ferruh Yigit
parent 2d04b9e856
commit 4a6847d788
1 changed files with 2 additions and 0 deletions
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drivers/net/ixgbe/base/ixgbe_type.h
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@ -1082,8 +1082,10 @@ struct ixgbe_dmac_config {
#define IXGBE_HSMC0R 0x15F04
#define IXGBE_HSMC1R 0x15F08
#define IXGBE_SWSR 0x15F10
#define IXGBE_FWRESETCNT 0x15F40
#define IXGBE_HFDR 0x15FE8
#define IXGBE_FLEX_MNG 0x15800 /* 0x15800 - 0x15EFC */
#define IXGBE_FLEX_MNG_PTR(_i) (IXGBE_FLEX_MNG + ((_i) * 4))
#define IXGBE_HICR_EN 0x01 /* Enable bit - RO */
/* Driver sets this bit when done to put command in RAM */