ethdev: remove deprecated Flow Director configuration
Remove deprecated fdir_conf from device configuration. Assume that mode is equal to RTE_FDIR_MODE_NONE. Add internal Flow Director configuration copy in ixgbe and txgbe device private data since flow API supports requires it. Initialize mode to the first flow rule mode on the rule validation or creation. Since Flow Director configuration data types are still used by some drivers internally, move it from public API to ethdev driver internal API. Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru> Acked-by: Dongdong Liu <liudongdong3@huawei.com>
This commit is contained in:
parent
9e9ca34da7
commit
5007ac1318
@ -764,25 +764,6 @@ static void cmd_help_long_parsed(void *parsed_result,
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"filters:\n"
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"--------\n\n"
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"flow_director_mask (port_id) mode IP vlan (vlan_value)"
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" src_mask (ipv4_src) (ipv6_src) (src_port)"
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" dst_mask (ipv4_dst) (ipv6_dst) (dst_port)\n"
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" Set flow director IP mask.\n\n"
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"flow_director_mask (port_id) mode MAC-VLAN"
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" vlan (vlan_value)\n"
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" Set flow director MAC-VLAN mask.\n\n"
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"flow_director_mask (port_id) mode Tunnel"
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" vlan (vlan_value) mac (mac_value)"
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" tunnel-type (tunnel_type_value)"
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" tunnel-id (tunnel_id_value)\n"
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" Set flow director Tunnel mask.\n\n"
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"flow_director_flex_payload (port_id)"
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" (raw|l2|l3|l4) (config)\n"
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" Configure flex payload selection.\n\n"
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"flow validate {port_id}"
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" [group {group_id}] [priority {level}]"
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" [ingress] [egress]"
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@ -8270,326 +8251,6 @@ do { \
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} \
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} while (0)
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/* *** deal with flow director mask *** */
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struct cmd_flow_director_mask_result {
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cmdline_fixed_string_t flow_director_mask;
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portid_t port_id;
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cmdline_fixed_string_t mode;
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cmdline_fixed_string_t mode_value;
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cmdline_fixed_string_t vlan;
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uint16_t vlan_mask;
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cmdline_fixed_string_t src_mask;
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cmdline_ipaddr_t ipv4_src;
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cmdline_ipaddr_t ipv6_src;
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uint16_t port_src;
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cmdline_fixed_string_t dst_mask;
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cmdline_ipaddr_t ipv4_dst;
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cmdline_ipaddr_t ipv6_dst;
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uint16_t port_dst;
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cmdline_fixed_string_t mac;
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uint8_t mac_addr_byte_mask;
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cmdline_fixed_string_t tunnel_id;
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uint32_t tunnel_id_mask;
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cmdline_fixed_string_t tunnel_type;
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uint8_t tunnel_type_mask;
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};
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static void
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cmd_flow_director_mask_parsed(void *parsed_result,
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__rte_unused struct cmdline *cl,
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__rte_unused void *data)
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{
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struct cmd_flow_director_mask_result *res = parsed_result;
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struct rte_eth_fdir_masks *mask;
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struct rte_port *port;
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port = &ports[res->port_id];
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/** Check if the port is not started **/
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if (port->port_status != RTE_PORT_STOPPED) {
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fprintf(stderr, "Please stop port %d first\n", res->port_id);
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return;
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}
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mask = &port->dev_conf.fdir_conf.mask;
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if (fdir_conf.mode == RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
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if (strcmp(res->mode_value, "MAC-VLAN")) {
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fprintf(stderr, "Please set mode to MAC-VLAN.\n");
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return;
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}
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mask->vlan_tci_mask = rte_cpu_to_be_16(res->vlan_mask);
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} else if (fdir_conf.mode == RTE_FDIR_MODE_PERFECT_TUNNEL) {
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if (strcmp(res->mode_value, "Tunnel")) {
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fprintf(stderr, "Please set mode to Tunnel.\n");
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return;
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}
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mask->vlan_tci_mask = rte_cpu_to_be_16(res->vlan_mask);
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mask->mac_addr_byte_mask = res->mac_addr_byte_mask;
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mask->tunnel_id_mask = rte_cpu_to_be_32(res->tunnel_id_mask);
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mask->tunnel_type_mask = res->tunnel_type_mask;
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} else {
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if (strcmp(res->mode_value, "IP")) {
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fprintf(stderr, "Please set mode to IP.\n");
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return;
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}
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mask->vlan_tci_mask = rte_cpu_to_be_16(res->vlan_mask);
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IPV4_ADDR_TO_UINT(res->ipv4_src, mask->ipv4_mask.src_ip);
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IPV4_ADDR_TO_UINT(res->ipv4_dst, mask->ipv4_mask.dst_ip);
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IPV6_ADDR_TO_ARRAY(res->ipv6_src, mask->ipv6_mask.src_ip);
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IPV6_ADDR_TO_ARRAY(res->ipv6_dst, mask->ipv6_mask.dst_ip);
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mask->src_port_mask = rte_cpu_to_be_16(res->port_src);
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mask->dst_port_mask = rte_cpu_to_be_16(res->port_dst);
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}
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cmd_reconfig_device_queue(res->port_id, 1, 1);
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}
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static cmdline_parse_token_string_t cmd_flow_director_mask =
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TOKEN_STRING_INITIALIZER(struct cmd_flow_director_mask_result,
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flow_director_mask, "flow_director_mask");
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static cmdline_parse_token_num_t cmd_flow_director_mask_port_id =
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TOKEN_NUM_INITIALIZER(struct cmd_flow_director_mask_result,
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port_id, RTE_UINT16);
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static cmdline_parse_token_string_t cmd_flow_director_mask_vlan =
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TOKEN_STRING_INITIALIZER(struct cmd_flow_director_mask_result,
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vlan, "vlan");
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static cmdline_parse_token_num_t cmd_flow_director_mask_vlan_value =
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TOKEN_NUM_INITIALIZER(struct cmd_flow_director_mask_result,
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vlan_mask, RTE_UINT16);
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static cmdline_parse_token_string_t cmd_flow_director_mask_src =
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TOKEN_STRING_INITIALIZER(struct cmd_flow_director_mask_result,
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src_mask, "src_mask");
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static cmdline_parse_token_ipaddr_t cmd_flow_director_mask_ipv4_src =
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TOKEN_IPADDR_INITIALIZER(struct cmd_flow_director_mask_result,
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ipv4_src);
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static cmdline_parse_token_ipaddr_t cmd_flow_director_mask_ipv6_src =
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TOKEN_IPADDR_INITIALIZER(struct cmd_flow_director_mask_result,
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ipv6_src);
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static cmdline_parse_token_num_t cmd_flow_director_mask_port_src =
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TOKEN_NUM_INITIALIZER(struct cmd_flow_director_mask_result,
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port_src, RTE_UINT16);
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static cmdline_parse_token_string_t cmd_flow_director_mask_dst =
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TOKEN_STRING_INITIALIZER(struct cmd_flow_director_mask_result,
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dst_mask, "dst_mask");
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static cmdline_parse_token_ipaddr_t cmd_flow_director_mask_ipv4_dst =
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TOKEN_IPADDR_INITIALIZER(struct cmd_flow_director_mask_result,
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ipv4_dst);
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static cmdline_parse_token_ipaddr_t cmd_flow_director_mask_ipv6_dst =
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TOKEN_IPADDR_INITIALIZER(struct cmd_flow_director_mask_result,
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ipv6_dst);
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static cmdline_parse_token_num_t cmd_flow_director_mask_port_dst =
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TOKEN_NUM_INITIALIZER(struct cmd_flow_director_mask_result,
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port_dst, RTE_UINT16);
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static cmdline_parse_token_string_t cmd_flow_director_mask_mode =
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TOKEN_STRING_INITIALIZER(struct cmd_flow_director_mask_result,
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mode, "mode");
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static cmdline_parse_token_string_t cmd_flow_director_mask_mode_ip =
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TOKEN_STRING_INITIALIZER(struct cmd_flow_director_mask_result,
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mode_value, "IP");
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static cmdline_parse_token_string_t cmd_flow_director_mask_mode_mac_vlan =
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TOKEN_STRING_INITIALIZER(struct cmd_flow_director_mask_result,
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mode_value, "MAC-VLAN");
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static cmdline_parse_token_string_t cmd_flow_director_mask_mode_tunnel =
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TOKEN_STRING_INITIALIZER(struct cmd_flow_director_mask_result,
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mode_value, "Tunnel");
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static cmdline_parse_token_string_t cmd_flow_director_mask_mac =
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TOKEN_STRING_INITIALIZER(struct cmd_flow_director_mask_result,
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mac, "mac");
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static cmdline_parse_token_num_t cmd_flow_director_mask_mac_value =
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TOKEN_NUM_INITIALIZER(struct cmd_flow_director_mask_result,
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mac_addr_byte_mask, RTE_UINT8);
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static cmdline_parse_token_string_t cmd_flow_director_mask_tunnel_type =
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TOKEN_STRING_INITIALIZER(struct cmd_flow_director_mask_result,
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tunnel_type, "tunnel-type");
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static cmdline_parse_token_num_t cmd_flow_director_mask_tunnel_type_value =
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TOKEN_NUM_INITIALIZER(struct cmd_flow_director_mask_result,
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tunnel_type_mask, RTE_UINT8);
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static cmdline_parse_token_string_t cmd_flow_director_mask_tunnel_id =
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TOKEN_STRING_INITIALIZER(struct cmd_flow_director_mask_result,
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tunnel_id, "tunnel-id");
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static cmdline_parse_token_num_t cmd_flow_director_mask_tunnel_id_value =
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TOKEN_NUM_INITIALIZER(struct cmd_flow_director_mask_result,
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tunnel_id_mask, RTE_UINT32);
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static cmdline_parse_inst_t cmd_set_flow_director_ip_mask = {
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.f = cmd_flow_director_mask_parsed,
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.data = NULL,
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.help_str = "flow_director_mask ... : "
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"Set IP mode flow director's mask on NIC",
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.tokens = {
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(void *)&cmd_flow_director_mask,
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(void *)&cmd_flow_director_mask_port_id,
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(void *)&cmd_flow_director_mask_mode,
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(void *)&cmd_flow_director_mask_mode_ip,
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(void *)&cmd_flow_director_mask_vlan,
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(void *)&cmd_flow_director_mask_vlan_value,
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(void *)&cmd_flow_director_mask_src,
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(void *)&cmd_flow_director_mask_ipv4_src,
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(void *)&cmd_flow_director_mask_ipv6_src,
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(void *)&cmd_flow_director_mask_port_src,
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(void *)&cmd_flow_director_mask_dst,
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(void *)&cmd_flow_director_mask_ipv4_dst,
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(void *)&cmd_flow_director_mask_ipv6_dst,
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(void *)&cmd_flow_director_mask_port_dst,
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NULL,
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},
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};
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static cmdline_parse_inst_t cmd_set_flow_director_mac_vlan_mask = {
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.f = cmd_flow_director_mask_parsed,
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.data = NULL,
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.help_str = "flow_director_mask ... : Set MAC VLAN mode "
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"flow director's mask on NIC",
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.tokens = {
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(void *)&cmd_flow_director_mask,
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(void *)&cmd_flow_director_mask_port_id,
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(void *)&cmd_flow_director_mask_mode,
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(void *)&cmd_flow_director_mask_mode_mac_vlan,
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(void *)&cmd_flow_director_mask_vlan,
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(void *)&cmd_flow_director_mask_vlan_value,
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NULL,
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},
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};
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static cmdline_parse_inst_t cmd_set_flow_director_tunnel_mask = {
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.f = cmd_flow_director_mask_parsed,
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.data = NULL,
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.help_str = "flow_director_mask ... : Set tunnel mode "
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"flow director's mask on NIC",
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.tokens = {
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(void *)&cmd_flow_director_mask,
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(void *)&cmd_flow_director_mask_port_id,
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(void *)&cmd_flow_director_mask_mode,
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(void *)&cmd_flow_director_mask_mode_tunnel,
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(void *)&cmd_flow_director_mask_vlan,
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(void *)&cmd_flow_director_mask_vlan_value,
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(void *)&cmd_flow_director_mask_mac,
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(void *)&cmd_flow_director_mask_mac_value,
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(void *)&cmd_flow_director_mask_tunnel_type,
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(void *)&cmd_flow_director_mask_tunnel_type_value,
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(void *)&cmd_flow_director_mask_tunnel_id,
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(void *)&cmd_flow_director_mask_tunnel_id_value,
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NULL,
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},
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};
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/* *** deal with flow director flexible payload configuration *** */
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struct cmd_flow_director_flexpayload_result {
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cmdline_fixed_string_t flow_director_flexpayload;
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portid_t port_id;
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cmdline_fixed_string_t payload_layer;
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cmdline_fixed_string_t payload_cfg;
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};
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static inline int
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parse_offsets(const char *q_arg, uint16_t *offsets, uint16_t max_num)
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{
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char s[256];
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const char *p, *p0 = q_arg;
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char *end;
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unsigned long int_fld;
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char *str_fld[max_num];
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int i;
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unsigned size;
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int ret = -1;
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p = strchr(p0, '(');
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if (p == NULL)
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return -1;
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++p;
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p0 = strchr(p, ')');
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if (p0 == NULL)
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return -1;
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size = p0 - p;
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if (size >= sizeof(s))
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return -1;
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snprintf(s, sizeof(s), "%.*s", size, p);
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ret = rte_strsplit(s, sizeof(s), str_fld, max_num, ',');
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if (ret < 0 || ret > max_num)
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return -1;
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for (i = 0; i < ret; i++) {
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errno = 0;
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int_fld = strtoul(str_fld[i], &end, 0);
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if (errno != 0 || *end != '\0' || int_fld > UINT16_MAX)
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return -1;
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offsets[i] = (uint16_t)int_fld;
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}
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return ret;
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}
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static void
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cmd_flow_director_flxpld_parsed(void *parsed_result,
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__rte_unused struct cmdline *cl,
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__rte_unused void *data)
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{
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struct cmd_flow_director_flexpayload_result *res = parsed_result;
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struct rte_eth_flex_payload_cfg flex_cfg;
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struct rte_port *port;
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int ret = 0;
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port = &ports[res->port_id];
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/** Check if the port is not started **/
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if (port->port_status != RTE_PORT_STOPPED) {
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fprintf(stderr, "Please stop port %d first\n", res->port_id);
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return;
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}
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memset(&flex_cfg, 0, sizeof(struct rte_eth_flex_payload_cfg));
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if (!strcmp(res->payload_layer, "raw"))
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flex_cfg.type = RTE_ETH_RAW_PAYLOAD;
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else if (!strcmp(res->payload_layer, "l2"))
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flex_cfg.type = RTE_ETH_L2_PAYLOAD;
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else if (!strcmp(res->payload_layer, "l3"))
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flex_cfg.type = RTE_ETH_L3_PAYLOAD;
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else if (!strcmp(res->payload_layer, "l4"))
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flex_cfg.type = RTE_ETH_L4_PAYLOAD;
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ret = parse_offsets(res->payload_cfg, flex_cfg.src_offset,
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RTE_ETH_FDIR_MAX_FLEXLEN);
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if (ret < 0) {
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fprintf(stderr, "error: Cannot parse flex payload input.\n");
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return;
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}
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fdir_set_flex_payload(res->port_id, &flex_cfg);
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cmd_reconfig_device_queue(res->port_id, 1, 1);
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}
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static cmdline_parse_token_string_t cmd_flow_director_flexpayload =
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TOKEN_STRING_INITIALIZER(struct cmd_flow_director_flexpayload_result,
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flow_director_flexpayload,
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"flow_director_flex_payload");
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static cmdline_parse_token_num_t cmd_flow_director_flexpayload_port_id =
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TOKEN_NUM_INITIALIZER(struct cmd_flow_director_flexpayload_result,
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port_id, RTE_UINT16);
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static cmdline_parse_token_string_t cmd_flow_director_flexpayload_payload_layer =
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TOKEN_STRING_INITIALIZER(struct cmd_flow_director_flexpayload_result,
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payload_layer, "raw#l2#l3#l4");
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static cmdline_parse_token_string_t cmd_flow_director_flexpayload_payload_cfg =
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TOKEN_STRING_INITIALIZER(struct cmd_flow_director_flexpayload_result,
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payload_cfg, NULL);
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static cmdline_parse_inst_t cmd_set_flow_director_flex_payload = {
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.f = cmd_flow_director_flxpld_parsed,
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.data = NULL,
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.help_str = "flow_director_flexpayload ... : "
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"Set flow director's flex payload on NIC",
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.tokens = {
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(void *)&cmd_flow_director_flexpayload,
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(void *)&cmd_flow_director_flexpayload_port_id,
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(void *)&cmd_flow_director_flexpayload_payload_layer,
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(void *)&cmd_flow_director_flexpayload_payload_cfg,
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NULL,
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},
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};
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/* Generic flow interface command. */
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extern cmdline_parse_inst_t cmd_flow;
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@ -12892,10 +12553,6 @@ static cmdline_parse_ctx_t builtin_ctx[] = {
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(cmdline_parse_inst_t *)&cmd_cleanup_txq_mbufs,
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(cmdline_parse_inst_t *)&cmd_dump,
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(cmdline_parse_inst_t *)&cmd_dump_one,
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(cmdline_parse_inst_t *)&cmd_set_flow_director_ip_mask,
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(cmdline_parse_inst_t *)&cmd_set_flow_director_mac_vlan_mask,
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(cmdline_parse_inst_t *)&cmd_set_flow_director_tunnel_mask,
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(cmdline_parse_inst_t *)&cmd_set_flow_director_flex_payload,
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(cmdline_parse_inst_t *)&cmd_flow,
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(cmdline_parse_inst_t *)&cmd_show_port_meter_cap,
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(cmdline_parse_inst_t *)&cmd_add_port_meter_profile_srtcm,
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@ -5534,41 +5534,6 @@ flowtype_to_str(uint16_t flow_type)
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#if defined(RTE_NET_I40E) || defined(RTE_NET_IXGBE)
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static inline void
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print_fdir_mask(struct rte_eth_fdir_masks *mask)
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{
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printf("\n vlan_tci: 0x%04x", rte_be_to_cpu_16(mask->vlan_tci_mask));
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if (fdir_conf.mode == RTE_FDIR_MODE_PERFECT_TUNNEL)
|
||||
printf(", mac_addr: 0x%02x, tunnel_type: 0x%01x,"
|
||||
" tunnel_id: 0x%08x",
|
||||
mask->mac_addr_byte_mask, mask->tunnel_type_mask,
|
||||
rte_be_to_cpu_32(mask->tunnel_id_mask));
|
||||
else if (fdir_conf.mode != RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
|
||||
printf(", src_ipv4: 0x%08x, dst_ipv4: 0x%08x",
|
||||
rte_be_to_cpu_32(mask->ipv4_mask.src_ip),
|
||||
rte_be_to_cpu_32(mask->ipv4_mask.dst_ip));
|
||||
|
||||
printf("\n src_port: 0x%04x, dst_port: 0x%04x",
|
||||
rte_be_to_cpu_16(mask->src_port_mask),
|
||||
rte_be_to_cpu_16(mask->dst_port_mask));
|
||||
|
||||
printf("\n src_ipv6: 0x%08x,0x%08x,0x%08x,0x%08x",
|
||||
rte_be_to_cpu_32(mask->ipv6_mask.src_ip[0]),
|
||||
rte_be_to_cpu_32(mask->ipv6_mask.src_ip[1]),
|
||||
rte_be_to_cpu_32(mask->ipv6_mask.src_ip[2]),
|
||||
rte_be_to_cpu_32(mask->ipv6_mask.src_ip[3]));
|
||||
|
||||
printf("\n dst_ipv6: 0x%08x,0x%08x,0x%08x,0x%08x",
|
||||
rte_be_to_cpu_32(mask->ipv6_mask.dst_ip[0]),
|
||||
rte_be_to_cpu_32(mask->ipv6_mask.dst_ip[1]),
|
||||
rte_be_to_cpu_32(mask->ipv6_mask.dst_ip[2]),
|
||||
rte_be_to_cpu_32(mask->ipv6_mask.dst_ip[3]));
|
||||
}
|
||||
|
||||
printf("\n");
|
||||
}
|
||||
|
||||
static inline void
|
||||
print_fdir_flex_payload(struct rte_eth_fdir_flex_conf *flex_conf, uint32_t num)
|
||||
{
|
||||
@ -5704,8 +5669,6 @@ fdir_get_infos(portid_t port_id)
|
||||
fdir_info.flex_payload_unit,
|
||||
fdir_info.max_flex_payload_segment_num,
|
||||
fdir_info.flex_bitmask_unit, fdir_info.max_flex_bitmask_num);
|
||||
printf(" MASK: ");
|
||||
print_fdir_mask(&fdir_info.mask);
|
||||
if (fdir_info.flex_conf.nb_payloads > 0) {
|
||||
printf(" FLEX PAYLOAD SRC OFFSET:");
|
||||
print_fdir_flex_payload(&fdir_info.flex_conf, fdir_info.max_flexpayload);
|
||||
@ -5732,69 +5695,6 @@ fdir_get_infos(portid_t port_id)
|
||||
|
||||
#endif /* RTE_NET_I40E || RTE_NET_IXGBE */
|
||||
|
||||
void
|
||||
fdir_set_flex_mask(portid_t port_id, struct rte_eth_fdir_flex_mask *cfg)
|
||||
{
|
||||
struct rte_port *port;
|
||||
struct rte_eth_fdir_flex_conf *flex_conf;
|
||||
int i, idx = 0;
|
||||
|
||||
port = &ports[port_id];
|
||||
flex_conf = &port->dev_conf.fdir_conf.flex_conf;
|
||||
for (i = 0; i < RTE_ETH_FLOW_MAX; i++) {
|
||||
if (cfg->flow_type == flex_conf->flex_mask[i].flow_type) {
|
||||
idx = i;
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (i >= RTE_ETH_FLOW_MAX) {
|
||||
if (flex_conf->nb_flexmasks < RTE_DIM(flex_conf->flex_mask)) {
|
||||
idx = flex_conf->nb_flexmasks;
|
||||
flex_conf->nb_flexmasks++;
|
||||
} else {
|
||||
fprintf(stderr,
|
||||
"The flex mask table is full. Can not set flex mask for flow_type(%u).",
|
||||
cfg->flow_type);
|
||||
return;
|
||||
}
|
||||
}
|
||||
rte_memcpy(&flex_conf->flex_mask[idx],
|
||||
cfg,
|
||||
sizeof(struct rte_eth_fdir_flex_mask));
|
||||
}
|
||||
|
||||
void
|
||||
fdir_set_flex_payload(portid_t port_id, struct rte_eth_flex_payload_cfg *cfg)
|
||||
{
|
||||
struct rte_port *port;
|
||||
struct rte_eth_fdir_flex_conf *flex_conf;
|
||||
int i, idx = 0;
|
||||
|
||||
port = &ports[port_id];
|
||||
flex_conf = &port->dev_conf.fdir_conf.flex_conf;
|
||||
for (i = 0; i < RTE_ETH_PAYLOAD_MAX; i++) {
|
||||
if (cfg->type == flex_conf->flex_set[i].type) {
|
||||
idx = i;
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (i >= RTE_ETH_PAYLOAD_MAX) {
|
||||
if (flex_conf->nb_payloads < RTE_DIM(flex_conf->flex_set)) {
|
||||
idx = flex_conf->nb_payloads;
|
||||
flex_conf->nb_payloads++;
|
||||
} else {
|
||||
fprintf(stderr,
|
||||
"The flex payload table is full. Can not set flex payload for type(%u).",
|
||||
cfg->type);
|
||||
return;
|
||||
}
|
||||
}
|
||||
rte_memcpy(&flex_conf->flex_set[idx],
|
||||
cfg,
|
||||
sizeof(struct rte_eth_flex_payload_cfg));
|
||||
|
||||
}
|
||||
|
||||
void
|
||||
set_vf_traffic(portid_t port_id, uint8_t is_rx, uint16_t vf, uint8_t on)
|
||||
{
|
||||
|
@ -100,17 +100,6 @@ usage(char* progname)
|
||||
printf(" --eth-peer=X,M:M:M:M:M:M: set the MAC address of the X peer "
|
||||
"port (0 <= X < %d).\n", RTE_MAX_ETHPORTS);
|
||||
#endif
|
||||
printf(" --pkt-filter-mode=N: set Flow Director mode "
|
||||
"(N: none (default mode) or signature or perfect).\n");
|
||||
printf(" --pkt-filter-report-hash=N: set Flow Director report mode "
|
||||
"(N: none or match (default) or always).\n");
|
||||
printf(" --pkt-filter-size=N: set Flow Director mode "
|
||||
"(N: 64K (default mode) or 128K or 256K).\n");
|
||||
printf(" --pkt-filter-drop-queue=N: set drop-queue. "
|
||||
"In perfect mode, when you add a rule with queue = -1 "
|
||||
"the packet will be enqueued into the rx drop-queue. "
|
||||
"If the drop-queue doesn't exist, the packet is dropped. "
|
||||
"By default drop-queue=127.\n");
|
||||
#ifdef RTE_LIB_LATENCYSTATS
|
||||
printf(" --latencystats=N: enable latency and jitter statistics "
|
||||
"monitoring on forwarding lcore id N.\n");
|
||||
@ -624,10 +613,6 @@ launch_args_parse(int argc, char** argv)
|
||||
{ "total-num-mbufs", 1, 0, 0 },
|
||||
{ "max-pkt-len", 1, 0, 0 },
|
||||
{ "max-lro-pkt-size", 1, 0, 0 },
|
||||
{ "pkt-filter-mode", 1, 0, 0 },
|
||||
{ "pkt-filter-report-hash", 1, 0, 0 },
|
||||
{ "pkt-filter-size", 1, 0, 0 },
|
||||
{ "pkt-filter-drop-queue", 1, 0, 0 },
|
||||
#ifdef RTE_LIB_LATENCYSTATS
|
||||
{ "latencystats", 1, 0, 0 },
|
||||
#endif
|
||||
@ -962,67 +947,6 @@ launch_args_parse(int argc, char** argv)
|
||||
n = atoi(optarg);
|
||||
rx_mode.max_lro_pkt_size = (uint32_t) n;
|
||||
}
|
||||
if (!strcmp(lgopts[opt_idx].name, "pkt-filter-mode")) {
|
||||
if (!strcmp(optarg, "signature"))
|
||||
fdir_conf.mode =
|
||||
RTE_FDIR_MODE_SIGNATURE;
|
||||
else if (!strcmp(optarg, "perfect"))
|
||||
fdir_conf.mode = RTE_FDIR_MODE_PERFECT;
|
||||
else if (!strcmp(optarg, "perfect-mac-vlan"))
|
||||
fdir_conf.mode = RTE_FDIR_MODE_PERFECT_MAC_VLAN;
|
||||
else if (!strcmp(optarg, "perfect-tunnel"))
|
||||
fdir_conf.mode = RTE_FDIR_MODE_PERFECT_TUNNEL;
|
||||
else if (!strcmp(optarg, "none"))
|
||||
fdir_conf.mode = RTE_FDIR_MODE_NONE;
|
||||
else
|
||||
rte_exit(EXIT_FAILURE,
|
||||
"pkt-mode-invalid %s invalid - must be: "
|
||||
"none, signature, perfect, perfect-mac-vlan"
|
||||
" or perfect-tunnel\n",
|
||||
optarg);
|
||||
}
|
||||
if (!strcmp(lgopts[opt_idx].name,
|
||||
"pkt-filter-report-hash")) {
|
||||
if (!strcmp(optarg, "none"))
|
||||
fdir_conf.status =
|
||||
RTE_FDIR_NO_REPORT_STATUS;
|
||||
else if (!strcmp(optarg, "match"))
|
||||
fdir_conf.status =
|
||||
RTE_FDIR_REPORT_STATUS;
|
||||
else if (!strcmp(optarg, "always"))
|
||||
fdir_conf.status =
|
||||
RTE_FDIR_REPORT_STATUS_ALWAYS;
|
||||
else
|
||||
rte_exit(EXIT_FAILURE,
|
||||
"pkt-filter-report-hash %s invalid "
|
||||
"- must be: none or match or always\n",
|
||||
optarg);
|
||||
}
|
||||
if (!strcmp(lgopts[opt_idx].name, "pkt-filter-size")) {
|
||||
if (!strcmp(optarg, "64K"))
|
||||
fdir_conf.pballoc =
|
||||
RTE_ETH_FDIR_PBALLOC_64K;
|
||||
else if (!strcmp(optarg, "128K"))
|
||||
fdir_conf.pballoc =
|
||||
RTE_ETH_FDIR_PBALLOC_128K;
|
||||
else if (!strcmp(optarg, "256K"))
|
||||
fdir_conf.pballoc =
|
||||
RTE_ETH_FDIR_PBALLOC_256K;
|
||||
else
|
||||
rte_exit(EXIT_FAILURE, "pkt-filter-size %s invalid -"
|
||||
" must be: 64K or 128K or 256K\n",
|
||||
optarg);
|
||||
}
|
||||
if (!strcmp(lgopts[opt_idx].name,
|
||||
"pkt-filter-drop-queue")) {
|
||||
n = atoi(optarg);
|
||||
if (n >= 0)
|
||||
fdir_conf.drop_queue = (uint8_t) n;
|
||||
else
|
||||
rte_exit(EXIT_FAILURE,
|
||||
"drop queue %d invalid - must"
|
||||
"be >= 0 \n", n);
|
||||
}
|
||||
#ifdef RTE_LIB_LATENCYSTATS
|
||||
if (!strcmp(lgopts[opt_idx].name,
|
||||
"latencystats")) {
|
||||
|
@ -468,29 +468,6 @@ struct rte_eth_txmode tx_mode = {
|
||||
.offloads = RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE,
|
||||
};
|
||||
|
||||
struct rte_eth_fdir_conf fdir_conf = {
|
||||
.mode = RTE_FDIR_MODE_NONE,
|
||||
.pballoc = RTE_ETH_FDIR_PBALLOC_64K,
|
||||
.status = RTE_FDIR_REPORT_STATUS,
|
||||
.mask = {
|
||||
.vlan_tci_mask = 0xFFEF,
|
||||
.ipv4_mask = {
|
||||
.src_ip = 0xFFFFFFFF,
|
||||
.dst_ip = 0xFFFFFFFF,
|
||||
},
|
||||
.ipv6_mask = {
|
||||
.src_ip = {0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF},
|
||||
.dst_ip = {0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF},
|
||||
},
|
||||
.src_port_mask = 0xFFFF,
|
||||
.dst_port_mask = 0xFFFF,
|
||||
.mac_addr_byte_mask = 0xFF,
|
||||
.tunnel_type_mask = 1,
|
||||
.tunnel_id_mask = 0xFFFFFFFF,
|
||||
},
|
||||
.drop_queue = 127,
|
||||
};
|
||||
|
||||
volatile int test_done = 1; /* stop packet forwarding when set to 1. */
|
||||
|
||||
/*
|
||||
@ -3923,7 +3900,6 @@ init_port_config(void)
|
||||
|
||||
RTE_ETH_FOREACH_DEV(pid) {
|
||||
port = &ports[pid];
|
||||
port->dev_conf.fdir_conf = fdir_conf;
|
||||
|
||||
ret = eth_dev_info_get_print_err(pid, &port->dev_info);
|
||||
if (ret != 0)
|
||||
|
@ -548,8 +548,6 @@ extern lcoreid_t bitrate_lcore_id;
|
||||
extern uint8_t bitrate_enabled;
|
||||
#endif
|
||||
|
||||
extern struct rte_eth_fdir_conf fdir_conf;
|
||||
|
||||
extern uint32_t max_rx_pkt_len;
|
||||
|
||||
/*
|
||||
@ -1018,10 +1016,6 @@ void pmd_test_exit(void);
|
||||
#if defined(RTE_NET_I40E) || defined(RTE_NET_IXGBE)
|
||||
void fdir_get_infos(portid_t port_id);
|
||||
#endif
|
||||
void fdir_set_flex_mask(portid_t port_id,
|
||||
struct rte_eth_fdir_flex_mask *cfg);
|
||||
void fdir_set_flex_payload(portid_t port_id,
|
||||
struct rte_eth_flex_payload_cfg *cfg);
|
||||
void port_rss_reta_info(portid_t port_id,
|
||||
struct rte_eth_rss_reta_entry64 *reta_conf,
|
||||
uint16_t nb_entries);
|
||||
|
@ -84,8 +84,6 @@ will be checked:
|
||||
|
||||
* ``RTE_ETH_RX_OFFLOAD_HEADER_SPLIT``
|
||||
|
||||
* ``fdir_conf->mode``
|
||||
|
||||
|
||||
RX Burst Size
|
||||
^^^^^^^^^^^^^
|
||||
|
@ -99,7 +99,6 @@ To guarantee the constraint, capabilities in dev_conf.rxmode.offloads will be ch
|
||||
|
||||
* dev_conf
|
||||
|
||||
fdir_conf->mode will also be checked.
|
||||
|
||||
Disable SDP3 TX_DISABLE for Fiber Links
|
||||
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
@ -89,10 +89,6 @@ Deprecation Notices
|
||||
The per-queue Rx packet split offload ``RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT``
|
||||
can still be used, and it is configured by ``rte_eth_rxseg_split``.
|
||||
|
||||
* ethdev: The flow director API, including ``rte_eth_conf.fdir_conf`` field,
|
||||
and the related structures (``rte_fdir_*`` and ``rte_eth_fdir_*``),
|
||||
will be removed in DPDK 20.11.
|
||||
|
||||
* ethdev: Announce moving from dedicated modify function for each field,
|
||||
to using the general ``rte_flow_modify_field`` action.
|
||||
|
||||
|
@ -138,6 +138,10 @@ API Changes
|
||||
* Removed deprecated ``PKT_{R,T}X_DYNF_METADATA`` defines.
|
||||
Use corresponding defines ``RTE_MBUF_DYNFLAG_{R,T}X_METADATA`` instead.
|
||||
|
||||
* ethdev: Removed deprecated Flow Director configuration from device
|
||||
configuration (``dev_conf.fdir_conf``). Moved corresponding structures
|
||||
to internal API since some drivers still use it internally.
|
||||
|
||||
* raw/ifgpa: The function ``rte_pmd_ifpga_get_pci_bus`` has been removed.
|
||||
|
||||
|
||||
|
@ -159,33 +159,6 @@ The command line options are:
|
||||
The default port is the port 9 which is defined for the discard protocol
|
||||
(RFC 863).
|
||||
|
||||
* ``--pkt-filter-mode=mode``
|
||||
|
||||
Set Flow Director mode where mode is either ``none`` (the default), ``signature`` or ``perfect``.
|
||||
See :ref:`testpmd_flow_director` for more details.
|
||||
|
||||
* ``--pkt-filter-report-hash=mode``
|
||||
|
||||
Set Flow Director hash match reporting mode where mode is ``none``, ``match`` (the default) or ``always``.
|
||||
|
||||
* ``--pkt-filter-size=N``
|
||||
|
||||
Set Flow Director allocated memory size, where N is 64K, 128K or 256K.
|
||||
Sizes are in kilobytes. The default is 64.
|
||||
|
||||
* ``--pkt-filter-flexbytes-offset=N``
|
||||
|
||||
Set the flexbytes offset.
|
||||
The offset is defined in words (not bytes) counted from the first byte of the destination Ethernet MAC address,
|
||||
where N is 0 <= N <= 32.
|
||||
The default value is 0x6.
|
||||
|
||||
* ``--pkt-filter-drop-queue=N``
|
||||
|
||||
Set the drop-queue.
|
||||
In perfect filter mode, when a rule is added with queue = -1, the packet will be enqueued into the RX drop-queue.
|
||||
If the drop-queue does not exist, the packet is dropped. The default value is N=127.
|
||||
|
||||
* ``--disable-crc-strip``
|
||||
|
||||
Disable hardware CRC stripping.
|
||||
|
@ -2835,44 +2835,6 @@ This section details the available filter functions that are available.
|
||||
Note these functions interface the deprecated legacy filtering framework,
|
||||
superseded by *rte_flow*. See `Flow rules management`_.
|
||||
|
||||
.. _testpmd_flow_director:
|
||||
|
||||
flow_director_mask
|
||||
~~~~~~~~~~~~~~~~~~
|
||||
|
||||
Set flow director's input masks::
|
||||
|
||||
flow_director_mask (port_id) mode IP vlan (vlan_value) \
|
||||
src_mask (ipv4_src) (ipv6_src) (src_port) \
|
||||
dst_mask (ipv4_dst) (ipv6_dst) (dst_port)
|
||||
|
||||
flow_director_mask (port_id) mode MAC-VLAN vlan (vlan_value)
|
||||
|
||||
flow_director_mask (port_id) mode Tunnel vlan (vlan_value) \
|
||||
mac (mac_value) tunnel-type (tunnel_type_value) \
|
||||
tunnel-id (tunnel_id_value)
|
||||
|
||||
Example, to set flow director mask on port 0::
|
||||
|
||||
testpmd> flow_director_mask 0 mode IP vlan 0xefff \
|
||||
src_mask 255.255.255.255 \
|
||||
FFFF:FFFF:FFFF:FFFF:FFFF:FFFF:FFFF:FFFF 0xFFFF \
|
||||
dst_mask 255.255.255.255 \
|
||||
FFFF:FFFF:FFFF:FFFF:FFFF:FFFF:FFFF:FFFF 0xFFFF
|
||||
|
||||
flow_director_flex_payload
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
Configure flexible payload selection::
|
||||
|
||||
flow_director_flex_payload (port_id) (raw|l2|l3|l4) (config)
|
||||
|
||||
For example, to select the first 16 bytes from the offset 4 (bytes) of packet's payload as flexible payload::
|
||||
|
||||
testpmd> flow_director_flex_payload 0 l4 \
|
||||
(4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19)
|
||||
|
||||
|
||||
.. _testpmd_rte_flow:
|
||||
|
||||
Flow rules management
|
||||
|
@ -1092,11 +1092,6 @@ cnxk_nix_configure(struct rte_eth_dev *eth_dev)
|
||||
goto fail_configure;
|
||||
}
|
||||
|
||||
if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) {
|
||||
plt_err("Flow director is not supported");
|
||||
goto fail_configure;
|
||||
}
|
||||
|
||||
if (rxmode->mq_mode != RTE_ETH_MQ_RX_NONE &&
|
||||
rxmode->mq_mode != RTE_ETH_MQ_RX_RSS) {
|
||||
plt_err("Unsupported mq rx mode %d", rxmode->mq_mode);
|
||||
|
@ -209,7 +209,6 @@ fm10k_rx_vec_condition_check(struct rte_eth_dev *dev)
|
||||
{
|
||||
#ifndef RTE_LIBRTE_IEEE1588
|
||||
struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;
|
||||
struct rte_eth_fdir_conf *fconf = &dev->data->dev_conf.fdir_conf;
|
||||
|
||||
#ifndef RTE_FM10K_RX_OLFLAGS_ENABLE
|
||||
/* without rx ol_flags, no VP flag report */
|
||||
@ -217,10 +216,6 @@ fm10k_rx_vec_condition_check(struct rte_eth_dev *dev)
|
||||
return -1;
|
||||
#endif
|
||||
|
||||
/* no fdir support */
|
||||
if (fconf->mode != RTE_FDIR_MODE_NONE)
|
||||
return -1;
|
||||
|
||||
/* no header split support */
|
||||
if (rxmode->offloads & RTE_ETH_RX_OFFLOAD_HEADER_SPLIT)
|
||||
return -1;
|
||||
|
@ -230,7 +230,6 @@ hns3_rxq_vec_check(struct hns3_rx_queue *rxq, void *arg)
|
||||
int
|
||||
hns3_rx_check_vec_support(struct rte_eth_dev *dev)
|
||||
{
|
||||
struct rte_eth_fdir_conf *fconf = &dev->data->dev_conf.fdir_conf;
|
||||
struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;
|
||||
uint64_t offloads_mask = RTE_ETH_RX_OFFLOAD_TCP_LRO |
|
||||
RTE_ETH_RX_OFFLOAD_VLAN;
|
||||
@ -240,9 +239,6 @@ hns3_rx_check_vec_support(struct rte_eth_dev *dev)
|
||||
if (dev->data->scattered_rx)
|
||||
return -ENOTSUP;
|
||||
|
||||
if (fconf->mode != RTE_FDIR_MODE_NONE)
|
||||
return -ENOTSUP;
|
||||
|
||||
if (rxmode->offloads & offloads_mask)
|
||||
return -ENOTSUP;
|
||||
|
||||
|
@ -1887,24 +1887,6 @@ i40e_dev_configure(struct rte_eth_dev *dev)
|
||||
if (dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG)
|
||||
dev->data->dev_conf.rxmode.offloads |= RTE_ETH_RX_OFFLOAD_RSS_HASH;
|
||||
|
||||
/* Only legacy filter API needs the following fdir config. So when the
|
||||
* legacy filter API is deprecated, the following codes should also be
|
||||
* removed.
|
||||
*/
|
||||
if (dev->data->dev_conf.fdir_conf.mode == RTE_FDIR_MODE_PERFECT) {
|
||||
ret = i40e_fdir_setup(pf);
|
||||
if (ret != I40E_SUCCESS) {
|
||||
PMD_DRV_LOG(ERR, "Failed to setup flow director.");
|
||||
return -ENOTSUP;
|
||||
}
|
||||
ret = i40e_fdir_configure(dev);
|
||||
if (ret < 0) {
|
||||
PMD_DRV_LOG(ERR, "failed to configure fdir.");
|
||||
goto err;
|
||||
}
|
||||
} else
|
||||
i40e_fdir_teardown(pf);
|
||||
|
||||
ret = i40e_dev_init_vlan(dev);
|
||||
if (ret < 0)
|
||||
goto err;
|
||||
@ -1946,12 +1928,6 @@ i40e_dev_configure(struct rte_eth_dev *dev)
|
||||
rte_free(pf->vmdq);
|
||||
pf->vmdq = NULL;
|
||||
err:
|
||||
/* Need to release fdir resource if exists.
|
||||
* Only legacy filter API needs the following fdir config. So when the
|
||||
* legacy filter API is deprecated, the following code should also be
|
||||
* removed.
|
||||
*/
|
||||
i40e_fdir_teardown(pf);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -2601,13 +2577,6 @@ i40e_dev_close(struct rte_eth_dev *dev)
|
||||
i40e_pf_disable_irq0(hw);
|
||||
rte_intr_disable(intr_handle);
|
||||
|
||||
/*
|
||||
* Only legacy filter API needs the following fdir config. So when the
|
||||
* legacy filter API is deprecated, the following code should also be
|
||||
* removed.
|
||||
*/
|
||||
i40e_fdir_teardown(pf);
|
||||
|
||||
/* shutdown and destroy the HMC */
|
||||
i40e_shutdown_lan_hmc(hw);
|
||||
|
||||
|
@ -373,269 +373,6 @@ i40e_init_flx_pld(struct i40e_pf *pf)
|
||||
}
|
||||
}
|
||||
|
||||
#define I40E_VALIDATE_FLEX_PIT(flex_pit1, flex_pit2) do { \
|
||||
if ((flex_pit2).src_offset < \
|
||||
(flex_pit1).src_offset + (flex_pit1).size) { \
|
||||
PMD_DRV_LOG(ERR, "src_offset should be not" \
|
||||
" less than than previous offset" \
|
||||
" + previous FSIZE."); \
|
||||
return -EINVAL; \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
/*
|
||||
* i40e_srcoff_to_flx_pit - transform the src_offset into flex_pit structure,
|
||||
* and the flex_pit will be sorted by it's src_offset value
|
||||
*/
|
||||
static inline uint16_t
|
||||
i40e_srcoff_to_flx_pit(const uint16_t *src_offset,
|
||||
struct i40e_fdir_flex_pit *flex_pit)
|
||||
{
|
||||
uint16_t src_tmp, size, num = 0;
|
||||
uint16_t i, k, j = 0;
|
||||
|
||||
while (j < I40E_FDIR_MAX_FLEX_LEN) {
|
||||
size = 1;
|
||||
for (; j < I40E_FDIR_MAX_FLEX_LEN - 1; j++) {
|
||||
if (src_offset[j + 1] == src_offset[j] + 1)
|
||||
size++;
|
||||
else
|
||||
break;
|
||||
}
|
||||
src_tmp = src_offset[j] + 1 - size;
|
||||
/* the flex_pit need to be sort by src_offset */
|
||||
for (i = 0; i < num; i++) {
|
||||
if (src_tmp < flex_pit[i].src_offset)
|
||||
break;
|
||||
}
|
||||
/* if insert required, move backward */
|
||||
for (k = num; k > i; k--)
|
||||
flex_pit[k] = flex_pit[k - 1];
|
||||
/* insert */
|
||||
flex_pit[i].dst_offset = j + 1 - size;
|
||||
flex_pit[i].src_offset = src_tmp;
|
||||
flex_pit[i].size = size;
|
||||
j++;
|
||||
num++;
|
||||
}
|
||||
return num;
|
||||
}
|
||||
|
||||
/* i40e_check_fdir_flex_payload -check flex payload configuration arguments */
|
||||
static inline int
|
||||
i40e_check_fdir_flex_payload(const struct rte_eth_flex_payload_cfg *flex_cfg)
|
||||
{
|
||||
struct i40e_fdir_flex_pit flex_pit[I40E_FDIR_MAX_FLEX_LEN];
|
||||
uint16_t num, i;
|
||||
|
||||
for (i = 0; i < I40E_FDIR_MAX_FLEX_LEN; i++) {
|
||||
if (flex_cfg->src_offset[i] >= I40E_MAX_FLX_SOURCE_OFF) {
|
||||
PMD_DRV_LOG(ERR, "exceeds maximal payload limit.");
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
memset(flex_pit, 0, sizeof(flex_pit));
|
||||
num = i40e_srcoff_to_flx_pit(flex_cfg->src_offset, flex_pit);
|
||||
if (num > I40E_MAX_FLXPLD_FIED) {
|
||||
PMD_DRV_LOG(ERR, "exceeds maximal number of flex fields.");
|
||||
return -EINVAL;
|
||||
}
|
||||
for (i = 0; i < num; i++) {
|
||||
if (flex_pit[i].size & 0x01 || flex_pit[i].dst_offset & 0x01 ||
|
||||
flex_pit[i].src_offset & 0x01) {
|
||||
PMD_DRV_LOG(ERR, "flexpayload should be measured"
|
||||
" in word");
|
||||
return -EINVAL;
|
||||
}
|
||||
if (i != num - 1)
|
||||
I40E_VALIDATE_FLEX_PIT(flex_pit[i], flex_pit[i + 1]);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* i40e_check_fdir_flex_conf -check if the flex payload and mask configuration
|
||||
* arguments are valid
|
||||
*/
|
||||
static int
|
||||
i40e_check_fdir_flex_conf(const struct i40e_adapter *adapter,
|
||||
const struct rte_eth_fdir_flex_conf *conf)
|
||||
{
|
||||
const struct rte_eth_flex_payload_cfg *flex_cfg;
|
||||
const struct rte_eth_fdir_flex_mask *flex_mask;
|
||||
uint16_t mask_tmp;
|
||||
uint8_t nb_bitmask;
|
||||
uint16_t i, j;
|
||||
int ret = 0;
|
||||
enum i40e_filter_pctype pctype;
|
||||
|
||||
if (conf == NULL) {
|
||||
PMD_DRV_LOG(INFO, "NULL pointer.");
|
||||
return -EINVAL;
|
||||
}
|
||||
/* check flexible payload setting configuration */
|
||||
if (conf->nb_payloads > RTE_ETH_L4_PAYLOAD) {
|
||||
PMD_DRV_LOG(ERR, "invalid number of payload setting.");
|
||||
return -EINVAL;
|
||||
}
|
||||
for (i = 0; i < conf->nb_payloads; i++) {
|
||||
flex_cfg = &conf->flex_set[i];
|
||||
if (flex_cfg->type > RTE_ETH_L4_PAYLOAD) {
|
||||
PMD_DRV_LOG(ERR, "invalid payload type.");
|
||||
return -EINVAL;
|
||||
}
|
||||
ret = i40e_check_fdir_flex_payload(flex_cfg);
|
||||
if (ret < 0) {
|
||||
PMD_DRV_LOG(ERR, "invalid flex payload arguments.");
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
/* check flex mask setting configuration */
|
||||
if (conf->nb_flexmasks >= RTE_ETH_FLOW_MAX) {
|
||||
PMD_DRV_LOG(ERR, "invalid number of flex masks.");
|
||||
return -EINVAL;
|
||||
}
|
||||
for (i = 0; i < conf->nb_flexmasks; i++) {
|
||||
flex_mask = &conf->flex_mask[i];
|
||||
pctype = i40e_flowtype_to_pctype(adapter, flex_mask->flow_type);
|
||||
if (pctype == I40E_FILTER_PCTYPE_INVALID) {
|
||||
PMD_DRV_LOG(WARNING, "invalid flow type.");
|
||||
return -EINVAL;
|
||||
}
|
||||
nb_bitmask = 0;
|
||||
for (j = 0; j < I40E_FDIR_MAX_FLEX_LEN; j += sizeof(uint16_t)) {
|
||||
mask_tmp = I40E_WORD(flex_mask->mask[j],
|
||||
flex_mask->mask[j + 1]);
|
||||
if (mask_tmp != 0x0 && mask_tmp != UINT16_MAX) {
|
||||
nb_bitmask++;
|
||||
if (nb_bitmask > I40E_FDIR_BITMASK_NUM_WORD) {
|
||||
PMD_DRV_LOG(ERR, " exceed maximal"
|
||||
" number of bitmasks.");
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* i40e_set_flx_pld_cfg -configure the rule how bytes stream is extracted as flexible payload
|
||||
* @pf: board private structure
|
||||
* @cfg: the rule how bytes stream is extracted as flexible payload
|
||||
*/
|
||||
static void
|
||||
i40e_set_flx_pld_cfg(struct i40e_pf *pf,
|
||||
const struct rte_eth_flex_payload_cfg *cfg)
|
||||
{
|
||||
struct i40e_hw *hw = I40E_PF_TO_HW(pf);
|
||||
struct i40e_fdir_flex_pit flex_pit[I40E_MAX_FLXPLD_FIED];
|
||||
uint32_t flx_pit, flx_ort;
|
||||
uint16_t num, min_next_off; /* in words */
|
||||
uint8_t field_idx = 0;
|
||||
uint8_t layer_idx = 0;
|
||||
uint16_t i;
|
||||
|
||||
if (cfg->type == RTE_ETH_L2_PAYLOAD)
|
||||
layer_idx = I40E_FLXPLD_L2_IDX;
|
||||
else if (cfg->type == RTE_ETH_L3_PAYLOAD)
|
||||
layer_idx = I40E_FLXPLD_L3_IDX;
|
||||
else if (cfg->type == RTE_ETH_L4_PAYLOAD)
|
||||
layer_idx = I40E_FLXPLD_L4_IDX;
|
||||
|
||||
memset(flex_pit, 0, sizeof(flex_pit));
|
||||
num = RTE_MIN(i40e_srcoff_to_flx_pit(cfg->src_offset, flex_pit),
|
||||
RTE_DIM(flex_pit));
|
||||
|
||||
if (num) {
|
||||
flx_ort = (1 << I40E_GLQF_ORT_FLX_PAYLOAD_SHIFT) |
|
||||
(num << I40E_GLQF_ORT_FIELD_CNT_SHIFT) |
|
||||
(layer_idx * I40E_MAX_FLXPLD_FIED);
|
||||
I40E_WRITE_GLB_REG(hw, I40E_GLQF_ORT(33 + layer_idx), flx_ort);
|
||||
}
|
||||
|
||||
for (i = 0; i < num; i++) {
|
||||
field_idx = layer_idx * I40E_MAX_FLXPLD_FIED + i;
|
||||
/* record the info in fdir structure */
|
||||
pf->fdir.flex_set[field_idx].src_offset =
|
||||
flex_pit[i].src_offset / sizeof(uint16_t);
|
||||
pf->fdir.flex_set[field_idx].size =
|
||||
flex_pit[i].size / sizeof(uint16_t);
|
||||
pf->fdir.flex_set[field_idx].dst_offset =
|
||||
flex_pit[i].dst_offset / sizeof(uint16_t);
|
||||
flx_pit = MK_FLX_PIT(pf->fdir.flex_set[field_idx].src_offset,
|
||||
pf->fdir.flex_set[field_idx].size,
|
||||
pf->fdir.flex_set[field_idx].dst_offset);
|
||||
|
||||
I40E_WRITE_REG(hw, I40E_PRTQF_FLX_PIT(field_idx), flx_pit);
|
||||
}
|
||||
min_next_off = pf->fdir.flex_set[field_idx].src_offset +
|
||||
pf->fdir.flex_set[field_idx].size;
|
||||
|
||||
for (; i < I40E_MAX_FLXPLD_FIED; i++) {
|
||||
/* set the non-used register obeying register's constrain */
|
||||
flx_pit = MK_FLX_PIT(min_next_off, NONUSE_FLX_PIT_FSIZE,
|
||||
NONUSE_FLX_PIT_DEST_OFF);
|
||||
I40E_WRITE_REG(hw,
|
||||
I40E_PRTQF_FLX_PIT(layer_idx * I40E_MAX_FLXPLD_FIED + i),
|
||||
flx_pit);
|
||||
min_next_off++;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* i40e_set_flex_mask_on_pctype - configure the mask on flexible payload
|
||||
* @pf: board private structure
|
||||
* @pctype: packet classify type
|
||||
* @flex_masks: mask for flexible payload
|
||||
*/
|
||||
static void
|
||||
i40e_set_flex_mask_on_pctype(struct i40e_pf *pf,
|
||||
enum i40e_filter_pctype pctype,
|
||||
const struct rte_eth_fdir_flex_mask *mask_cfg)
|
||||
{
|
||||
struct i40e_hw *hw = I40E_PF_TO_HW(pf);
|
||||
struct i40e_fdir_flex_mask *flex_mask;
|
||||
uint32_t flxinset, fd_mask;
|
||||
uint16_t mask_tmp;
|
||||
uint8_t i, nb_bitmask = 0;
|
||||
|
||||
flex_mask = &pf->fdir.flex_mask[pctype];
|
||||
memset(flex_mask, 0, sizeof(struct i40e_fdir_flex_mask));
|
||||
for (i = 0; i < I40E_FDIR_MAX_FLEX_LEN; i += sizeof(uint16_t)) {
|
||||
mask_tmp = I40E_WORD(mask_cfg->mask[i], mask_cfg->mask[i + 1]);
|
||||
if (mask_tmp != 0x0) {
|
||||
flex_mask->word_mask |=
|
||||
I40E_FLEX_WORD_MASK(i / sizeof(uint16_t));
|
||||
if (mask_tmp != UINT16_MAX) {
|
||||
/* set bit mask */
|
||||
flex_mask->bitmask[nb_bitmask].mask = ~mask_tmp;
|
||||
flex_mask->bitmask[nb_bitmask].offset =
|
||||
i / sizeof(uint16_t);
|
||||
nb_bitmask++;
|
||||
}
|
||||
}
|
||||
}
|
||||
/* write mask to hw */
|
||||
flxinset = (flex_mask->word_mask <<
|
||||
I40E_PRTQF_FD_FLXINSET_INSET_SHIFT) &
|
||||
I40E_PRTQF_FD_FLXINSET_INSET_MASK;
|
||||
i40e_write_rx_ctl(hw, I40E_PRTQF_FD_FLXINSET(pctype), flxinset);
|
||||
|
||||
for (i = 0; i < nb_bitmask; i++) {
|
||||
fd_mask = (flex_mask->bitmask[i].mask <<
|
||||
I40E_PRTQF_FD_MSK_MASK_SHIFT) &
|
||||
I40E_PRTQF_FD_MSK_MASK_MASK;
|
||||
fd_mask |= ((flex_mask->bitmask[i].offset +
|
||||
I40E_FLX_OFFSET_IN_FIELD_VECTOR) <<
|
||||
I40E_PRTQF_FD_MSK_OFFSET_SHIFT) &
|
||||
I40E_PRTQF_FD_MSK_OFFSET_MASK;
|
||||
i40e_write_rx_ctl(hw, I40E_PRTQF_FD_MSK(pctype, i), fd_mask);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Enable/disable flow director RX processing in vector routines.
|
||||
*/
|
||||
@ -661,10 +398,7 @@ i40e_fdir_configure(struct rte_eth_dev *dev)
|
||||
{
|
||||
struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
|
||||
struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
|
||||
struct rte_eth_fdir_flex_conf *conf;
|
||||
enum i40e_filter_pctype pctype;
|
||||
uint32_t val;
|
||||
uint8_t i;
|
||||
int ret = 0;
|
||||
|
||||
/*
|
||||
@ -687,39 +421,6 @@ i40e_fdir_configure(struct rte_eth_dev *dev)
|
||||
|
||||
i40e_init_flx_pld(pf); /* set flex config to default value */
|
||||
|
||||
conf = &dev->data->dev_conf.fdir_conf.flex_conf;
|
||||
ret = i40e_check_fdir_flex_conf(pf->adapter, conf);
|
||||
if (ret < 0) {
|
||||
PMD_DRV_LOG(ERR, " invalid configuration arguments.");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (!pf->support_multi_driver) {
|
||||
/* configure flex payload */
|
||||
for (i = 0; i < conf->nb_payloads; i++)
|
||||
i40e_set_flx_pld_cfg(pf, &conf->flex_set[i]);
|
||||
/* configure flex mask*/
|
||||
for (i = 0; i < conf->nb_flexmasks; i++) {
|
||||
if (hw->mac.type == I40E_MAC_X722) {
|
||||
/* get pctype value in fd pctype register */
|
||||
pctype = (enum i40e_filter_pctype)
|
||||
i40e_read_rx_ctl(hw,
|
||||
I40E_GLQF_FD_PCTYPES(
|
||||
(int)i40e_flowtype_to_pctype(
|
||||
pf->adapter,
|
||||
conf->flex_mask[i].flow_type)));
|
||||
} else {
|
||||
pctype = i40e_flowtype_to_pctype(pf->adapter,
|
||||
conf->flex_mask[i].flow_type);
|
||||
}
|
||||
|
||||
i40e_set_flex_mask_on_pctype(pf, pctype,
|
||||
&conf->flex_mask[i]);
|
||||
}
|
||||
} else {
|
||||
PMD_DRV_LOG(ERR, "Not support flexible payload.");
|
||||
}
|
||||
|
||||
/* Enable FDIR processing in RX routines */
|
||||
i40e_fdir_rx_proc_enable(dev, 1);
|
||||
|
||||
@ -2187,9 +1888,6 @@ i40e_fdir_info_get(struct rte_eth_dev *dev, struct rte_eth_fdir_info *fdir)
|
||||
uint16_t num_flex_mask = 0;
|
||||
uint16_t i;
|
||||
|
||||
if (dev->data->dev_conf.fdir_conf.mode == RTE_FDIR_MODE_PERFECT)
|
||||
fdir->mode = RTE_FDIR_MODE_PERFECT;
|
||||
else
|
||||
fdir->mode = RTE_FDIR_MODE_NONE;
|
||||
|
||||
fdir->guarant_spc =
|
||||
|
@ -211,15 +211,10 @@ i40e_rx_vec_dev_conf_condition_check_default(struct rte_eth_dev *dev)
|
||||
struct i40e_adapter *ad =
|
||||
I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
|
||||
struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;
|
||||
struct rte_eth_fdir_conf *fconf = &dev->data->dev_conf.fdir_conf;
|
||||
struct i40e_rx_queue *rxq;
|
||||
uint16_t desc, i;
|
||||
bool first_queue;
|
||||
|
||||
/* no fdir support */
|
||||
if (fconf->mode != RTE_FDIR_MODE_NONE)
|
||||
return -1;
|
||||
|
||||
/* no header split support */
|
||||
if (rxmode->offloads & RTE_ETH_RX_OFFLOAD_HEADER_SPLIT)
|
||||
return -1;
|
||||
|
@ -474,6 +474,7 @@ struct ixgbe_adapter {
|
||||
struct ixgbe_hw_stats stats;
|
||||
struct ixgbe_macsec_stats macsec_stats;
|
||||
struct ixgbe_macsec_setting macsec_setting;
|
||||
struct rte_eth_fdir_conf fdir_conf;
|
||||
struct ixgbe_hw_fdir_info fdir;
|
||||
struct ixgbe_interrupt intr;
|
||||
struct ixgbe_stat_mapping_registers stat_mappings;
|
||||
@ -523,7 +524,7 @@ int ixgbe_vf_representor_init(struct rte_eth_dev *ethdev, void *init_params);
|
||||
int ixgbe_vf_representor_uninit(struct rte_eth_dev *ethdev);
|
||||
|
||||
#define IXGBE_DEV_FDIR_CONF(dev) \
|
||||
(&(dev)->data->dev_conf.fdir_conf)
|
||||
(&((struct ixgbe_adapter *)(dev)->data->dev_private)->fdir_conf)
|
||||
|
||||
#define IXGBE_DEV_PRIVATE_TO_HW(adapter)\
|
||||
(&((struct ixgbe_adapter *)adapter)->hw)
|
||||
|
@ -2758,7 +2758,7 @@ ixgbe_parse_fdir_filter(struct rte_eth_dev *dev,
|
||||
{
|
||||
int ret;
|
||||
struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
|
||||
enum rte_fdir_mode fdir_mode = IXGBE_DEV_FDIR_CONF(dev)->mode;
|
||||
struct rte_eth_fdir_conf *fdir_conf = IXGBE_DEV_FDIR_CONF(dev);
|
||||
|
||||
if (hw->mac.type != ixgbe_mac_82599EB &&
|
||||
hw->mac.type != ixgbe_mac_X540 &&
|
||||
@ -2787,9 +2787,16 @@ ixgbe_parse_fdir_filter(struct rte_eth_dev *dev,
|
||||
rule->ixgbe_fdir.formatted.dst_port != 0))
|
||||
return -ENOTSUP;
|
||||
|
||||
if (fdir_mode == RTE_FDIR_MODE_NONE ||
|
||||
fdir_mode != rule->mode)
|
||||
if (fdir_conf->mode == RTE_FDIR_MODE_NONE) {
|
||||
fdir_conf->mode = rule->mode;
|
||||
ret = ixgbe_fdir_configure(dev);
|
||||
if (ret) {
|
||||
fdir_conf->mode = RTE_FDIR_MODE_NONE;
|
||||
return ret;
|
||||
}
|
||||
} else if (fdir_conf->mode != rule->mode) {
|
||||
return -ENOTSUP;
|
||||
}
|
||||
|
||||
if (rule->queue >= dev->data->nb_rx_queues)
|
||||
return -ENOTSUP;
|
||||
|
@ -513,11 +513,6 @@ octeontx_dev_configure(struct rte_eth_dev *dev)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) {
|
||||
octeontx_log_err("flow director not supported");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
nic->num_tx_queues = dev->data->nb_tx_queues;
|
||||
|
||||
if (!nic->reconfigure) {
|
||||
|
@ -144,31 +144,9 @@ int qede_check_fdir_support(struct rte_eth_dev *eth_dev)
|
||||
{
|
||||
struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
|
||||
struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
|
||||
struct rte_eth_fdir_conf *fdir = ð_dev->data->dev_conf.fdir_conf;
|
||||
|
||||
/* check FDIR modes */
|
||||
switch (fdir->mode) {
|
||||
case RTE_FDIR_MODE_NONE:
|
||||
qdev->arfs_info.arfs.mode = ECORE_FILTER_CONFIG_MODE_DISABLE;
|
||||
DP_INFO(edev, "flowdir is disabled\n");
|
||||
break;
|
||||
case RTE_FDIR_MODE_PERFECT:
|
||||
if (ECORE_IS_CMT(edev)) {
|
||||
DP_ERR(edev, "flowdir is not supported in 100G mode\n");
|
||||
qdev->arfs_info.arfs.mode =
|
||||
ECORE_FILTER_CONFIG_MODE_DISABLE;
|
||||
return -ENOTSUP;
|
||||
}
|
||||
qdev->arfs_info.arfs.mode =
|
||||
ECORE_FILTER_CONFIG_MODE_5_TUPLE;
|
||||
DP_INFO(edev, "flowdir is enabled (5 Tuple mode)\n");
|
||||
break;
|
||||
case RTE_FDIR_MODE_PERFECT_TUNNEL:
|
||||
case RTE_FDIR_MODE_SIGNATURE:
|
||||
case RTE_FDIR_MODE_PERFECT_MAC_VLAN:
|
||||
DP_ERR(edev, "Unsupported flowdir mode %d\n", fdir->mode);
|
||||
return -ENOTSUP;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -258,9 +236,6 @@ qede_config_arfs_filter(struct rte_eth_dev *eth_dev,
|
||||
if (add) {
|
||||
if (qdev->arfs_info.arfs.mode ==
|
||||
ECORE_FILTER_CONFIG_MODE_DISABLE) {
|
||||
/* Force update */
|
||||
eth_dev->data->dev_conf.fdir_conf.mode =
|
||||
RTE_FDIR_MODE_PERFECT;
|
||||
qdev->arfs_info.arfs.mode =
|
||||
ECORE_FILTER_CONFIG_MODE_5_TUPLE;
|
||||
DP_INFO(edev, "Force enable flowdir in perfect mode\n");
|
||||
|
@ -176,11 +176,6 @@ sfc_check_conf(struct sfc_adapter *sa)
|
||||
rc = EINVAL;
|
||||
}
|
||||
|
||||
if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) {
|
||||
sfc_err(sa, "Flow Director not supported");
|
||||
rc = EINVAL;
|
||||
}
|
||||
|
||||
if ((conf->intr_conf.lsc != 0) &&
|
||||
(sa->intr.type != EFX_INTR_LINE) &&
|
||||
(sa->intr.type != EFX_INTR_MESSAGE)) {
|
||||
|
@ -443,11 +443,6 @@ sfc_repr_check_conf(struct sfc_repr *sr, uint16_t nb_rx_queues,
|
||||
ret = -EINVAL;
|
||||
}
|
||||
|
||||
if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) {
|
||||
sfcr_err(sr, "Flow Director not supported");
|
||||
ret = -EINVAL;
|
||||
}
|
||||
|
||||
if (conf->intr_conf.lsc != 0) {
|
||||
sfcr_err(sr, "link status change interrupt not supported");
|
||||
ret = -EINVAL;
|
||||
|
@ -2013,11 +2013,6 @@ nicvf_dev_configure(struct rte_eth_dev *dev)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) {
|
||||
PMD_INIT_LOG(INFO, "Flow director not supported");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
assert_primary(nic);
|
||||
NICVF_STATIC_ASSERT(MAX_RCV_QUEUES_PER_QS == MAX_SND_QUEUES_PER_QS);
|
||||
cqcount = RTE_MAX(data->nb_tx_queues, data->nb_rx_queues);
|
||||
|
@ -346,6 +346,7 @@ struct txgbe_tm_conf {
|
||||
struct txgbe_adapter {
|
||||
struct txgbe_hw hw;
|
||||
struct txgbe_hw_stats stats;
|
||||
struct rte_eth_fdir_conf fdir_conf;
|
||||
struct txgbe_hw_fdir_info fdir;
|
||||
struct txgbe_interrupt intr;
|
||||
struct txgbe_stat_mappings stat_mappings;
|
||||
@ -373,7 +374,7 @@ struct txgbe_adapter {
|
||||
#define TXGBE_DEV_ADAPTER(dev) \
|
||||
((struct txgbe_adapter *)(dev)->data->dev_private)
|
||||
|
||||
#define TXGBE_DEV_FDIR_CONF(dev) (&(dev)->data->dev_conf.fdir_conf)
|
||||
#define TXGBE_DEV_FDIR_CONF(dev) (&TXGBE_DEV_ADAPTER(dev)->fdir_conf)
|
||||
|
||||
#define TXGBE_DEV_HW(dev) \
|
||||
(&((struct txgbe_adapter *)(dev)->data->dev_private)->hw)
|
||||
|
@ -2439,7 +2439,7 @@ txgbe_parse_fdir_filter(struct rte_eth_dev *dev,
|
||||
{
|
||||
int ret;
|
||||
struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
|
||||
enum rte_fdir_mode fdir_mode = TXGBE_DEV_FDIR_CONF(dev)->mode;
|
||||
struct rte_eth_fdir_conf *fdir_conf = TXGBE_DEV_FDIR_CONF(dev);
|
||||
|
||||
ret = txgbe_parse_fdir_filter_normal(dev, attr, pattern,
|
||||
actions, rule, error);
|
||||
@ -2458,9 +2458,16 @@ txgbe_parse_fdir_filter(struct rte_eth_dev *dev,
|
||||
(rule->input.src_port != 0 || rule->input.dst_port != 0))
|
||||
return -ENOTSUP;
|
||||
|
||||
if (fdir_mode == RTE_FDIR_MODE_NONE ||
|
||||
fdir_mode != rule->mode)
|
||||
if (fdir_conf->mode == RTE_FDIR_MODE_NONE) {
|
||||
fdir_conf->mode = rule->mode;
|
||||
ret = txgbe_fdir_configure(dev);
|
||||
if (ret) {
|
||||
fdir_conf->mode = RTE_FDIR_MODE_NONE;
|
||||
return ret;
|
||||
}
|
||||
} else if (fdir_conf->mode != rule->mode) {
|
||||
return -ENOTSUP;
|
||||
}
|
||||
|
||||
if (rule->queue >= dev->data->nb_rx_queues)
|
||||
return -ENOTSUP;
|
||||
|
@ -1916,6 +1916,42 @@ struct rte_eth_tunnel_filter_conf {
|
||||
uint16_t queue_id; /**< Queue assigned to if match */
|
||||
};
|
||||
|
||||
/**
|
||||
* Memory space that can be configured to store Flow Director filters
|
||||
* in the board memory.
|
||||
*/
|
||||
enum rte_eth_fdir_pballoc_type {
|
||||
RTE_ETH_FDIR_PBALLOC_64K = 0, /**< 64k. */
|
||||
RTE_ETH_FDIR_PBALLOC_128K, /**< 128k. */
|
||||
RTE_ETH_FDIR_PBALLOC_256K, /**< 256k. */
|
||||
};
|
||||
|
||||
/**
|
||||
* Select report mode of FDIR hash information in Rx descriptors.
|
||||
*/
|
||||
enum rte_fdir_status_mode {
|
||||
RTE_FDIR_NO_REPORT_STATUS = 0, /**< Never report FDIR hash. */
|
||||
RTE_FDIR_REPORT_STATUS, /**< Only report FDIR hash for matching pkts. */
|
||||
RTE_FDIR_REPORT_STATUS_ALWAYS, /**< Always report FDIR hash. */
|
||||
};
|
||||
|
||||
/**
|
||||
* A structure used to configure the Flow Director (FDIR) feature
|
||||
* of an Ethernet port.
|
||||
*
|
||||
* If mode is RTE_FDIR_MODE_NONE, the pballoc value is ignored.
|
||||
*/
|
||||
struct rte_eth_fdir_conf {
|
||||
enum rte_fdir_mode mode; /**< Flow Director mode. */
|
||||
enum rte_eth_fdir_pballoc_type pballoc; /**< Space for FDIR filters. */
|
||||
enum rte_fdir_status_mode status; /**< How to report FDIR hash. */
|
||||
/** Rx queue of packets matching a "drop" filter in perfect mode. */
|
||||
uint8_t drop_queue;
|
||||
struct rte_eth_fdir_masks mask;
|
||||
/** Flex payload configuration. */
|
||||
struct rte_eth_fdir_flex_conf flex_conf;
|
||||
};
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
@ -1297,48 +1297,6 @@ enum rte_eth_tunnel_type {
|
||||
/* Deprecated API file for rte_eth_dev_filter_* functions */
|
||||
#include "rte_eth_ctrl.h"
|
||||
|
||||
/**
|
||||
* Memory space that can be configured to store Flow Director filters
|
||||
* in the board memory.
|
||||
*/
|
||||
enum rte_eth_fdir_pballoc_type {
|
||||
RTE_ETH_FDIR_PBALLOC_64K = 0, /**< 64k. */
|
||||
RTE_ETH_FDIR_PBALLOC_128K, /**< 128k. */
|
||||
RTE_ETH_FDIR_PBALLOC_256K, /**< 256k. */
|
||||
};
|
||||
#define rte_fdir_pballoc_type rte_eth_fdir_pballoc_type
|
||||
|
||||
#define RTE_FDIR_PBALLOC_64K RTE_DEPRECATED(RTE_FDIR_PBALLOC_64K) RTE_ETH_FDIR_PBALLOC_64K
|
||||
#define RTE_FDIR_PBALLOC_128K RTE_DEPRECATED(RTE_FDIR_PBALLOC_128K) RTE_ETH_FDIR_PBALLOC_128K
|
||||
#define RTE_FDIR_PBALLOC_256K RTE_DEPRECATED(RTE_FDIR_PBALLOC_256K) RTE_ETH_FDIR_PBALLOC_256K
|
||||
|
||||
/**
|
||||
* Select report mode of FDIR hash information in Rx descriptors.
|
||||
*/
|
||||
enum rte_fdir_status_mode {
|
||||
RTE_FDIR_NO_REPORT_STATUS = 0, /**< Never report FDIR hash. */
|
||||
RTE_FDIR_REPORT_STATUS, /**< Only report FDIR hash for matching pkts. */
|
||||
RTE_FDIR_REPORT_STATUS_ALWAYS, /**< Always report FDIR hash. */
|
||||
};
|
||||
|
||||
/**
|
||||
* A structure used to configure the Flow Director (FDIR) feature
|
||||
* of an Ethernet port.
|
||||
*
|
||||
* If mode is RTE_FDIR_MODE_NONE, the pballoc value is ignored.
|
||||
*/
|
||||
struct rte_eth_fdir_conf {
|
||||
enum rte_fdir_mode mode; /**< Flow Director mode. */
|
||||
enum rte_eth_fdir_pballoc_type pballoc; /**< Space for FDIR filters. */
|
||||
enum rte_fdir_status_mode status; /**< How to report FDIR hash. */
|
||||
/** Rx queue of packets matching a "drop" filter in perfect mode. */
|
||||
uint8_t drop_queue;
|
||||
struct rte_eth_fdir_masks mask;
|
||||
/** Flex payload configuration. */
|
||||
struct rte_eth_fdir_flex_conf flex_conf;
|
||||
};
|
||||
#define rte_fdir_conf rte_eth_fdir_conf
|
||||
|
||||
/**
|
||||
* UDP tunneling configuration.
|
||||
*
|
||||
@ -1407,7 +1365,6 @@ struct rte_eth_conf {
|
||||
/** Currently,Priority Flow Control(PFC) are supported,if DCB with PFC
|
||||
is needed,and the variable must be set RTE_ETH_DCB_PFC_SUPPORT. */
|
||||
uint32_t dcb_capability_en;
|
||||
struct rte_eth_fdir_conf fdir_conf; /**< FDIR configuration. DEPRECATED */
|
||||
struct rte_eth_intr_conf intr_conf; /**< Interrupt mode configuration. */
|
||||
};
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user