raw/ifpga/base: add PMCI sensor driver
N6000 ADP platform support more sensors than N3000, they are accessed with the help of PMCI sensor driver. Signed-off-by: Wei Huang <wei.huang@intel.com> Acked-by: Tianfei Zhang <tianfei.zhang@intel.com> Reviewed-by: Rosen Xu <rosen.xu@intel.com>
This commit is contained in:
Wei Huang
Thomas Monjalon
parent
b74ee6c808
commit
528a9fc233
@ -830,6 +830,35 @@ int opae_manager_get_retimer_status(struct opae_manager *mgr,
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return -ENOENT;
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}
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/**
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* opae_manager_get_sensor_list - get sensor name list
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* @mgr: opae_manager of sensors
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* @buf: buffer to accommodate name list separated by semicolon
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* @size: size of buffer
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*
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* Return: the pointer of the opae_sensor_info
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*/
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int
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opae_mgr_get_sensor_list(struct opae_manager *mgr, char *buf, size_t size)
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{
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struct opae_sensor_info *sensor;
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uint32_t offset = 0;
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opae_mgr_for_each_sensor(mgr, sensor) {
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if (sensor->name) {
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if (buf && (offset < size))
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snprintf(buf + offset, size - offset, "%s;",
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sensor->name);
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offset += strlen(sensor->name) + 1;
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}
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}
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if (buf && (offset > 0) && (offset <= size))
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buf[offset-1] = 0;
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return offset;
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}
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/**
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* opae_manager_get_sensor_by_id - get sensor device
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* @id: the id of the sensor
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@ -94,6 +94,7 @@ int opae_manager_flash(struct opae_manager *mgr, int acc_id, const char *buf,
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u32 size, u64 *status);
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int opae_manager_get_eth_group_region_info(struct opae_manager *mgr,
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u8 group_id, struct opae_eth_group_region_info *info);
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int opae_mgr_get_sensor_list(struct opae_manager *mgr, char *buf, size_t size);
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struct opae_sensor_info *opae_mgr_get_sensor_by_name(struct opae_manager *mgr,
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const char *name);
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struct opae_sensor_info *opae_mgr_get_sensor_by_id(struct opae_manager *mgr,
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@ -1102,6 +1102,328 @@ static const struct m10bmc_csr m10bmc_pmci_csr = {
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.auth_result = M10BMC_PMCI_AUTH_RESULT,
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};
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static const struct max10_sensor_raw_data n6000bmc_temp_tbl[] = {
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{ 0x444, 0x448, 0x44c, 0x0, 0x0, 500,
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"FPGA E-TILE Temperature #1" },
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{ 0x450, 0x454, 0x458, 0x0, 0x0, 500,
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"FPGA E-TILE Temperature #2" },
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{ 0x45c, 0x460, 0x464, 0x0, 0x0, 500,
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"FPGA E-TILE Temperature #3" },
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{ 0x468, 0x46c, 0x470, 0x0, 0x0, 500,
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"FPGA E-TILE Temperature #4" },
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{ 0x474, 0x478, 0x47c, 0x0, 0x0, 500,
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"FPGA P-TILE Temperature" },
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{ 0x484, 0x488, 0x48c, 0x0, 0x0, 500,
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"FPGA FABRIC Digital Temperature#1" },
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{ 0x490, 0x494, 0x498, 0x0, 0x0, 500,
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"FPGA FABRIC Digital Temperature#2" },
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{ 0x49c, 0x4a0, 0x4a4, 0x0, 0x0, 500,
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"FPGA FABRIC Digital Temperature#3" },
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{ 0x4a8, 0x4ac, 0x4b0, 0x0, 0x0, 500,
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"FPGA FABRIC Digital Temperature#4" },
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{ 0x4b4, 0x4b8, 0x4bc, 0x0, 0x0, 500,
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"FPGA FABRIC Digital Temperature#5" },
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{ 0x4c0, 0x4c4, 0x4c8, 0x0, 0x0, 500,
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"FPGA FABRIC Remote Digital Temperature#1" },
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{ 0x4cc, 0x4d0, 0x4d4, 0x0, 0x0, 500,
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"FPGA FABRIC Remote Digital Temperature#2" },
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{ 0x4d8, 0x4dc, 0x4e0, 0x0, 0x0, 500,
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"FPGA FABRIC Remote Digital Temperature#3" },
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{ 0x4e4, 0x4e8, 0x4ec, 0x0, 0x0, 500,
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"FPGA FABRIC Remote Digital Temperature#4" },
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{ 0x4f0, 0x4f4, 0x4f8, 0x0, 0x0, 500,
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"Board Top Near FPGA Temperature" },
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{ 0x4fc, 0x500, 0x504, 0x52c, 0x0, 500,
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"Board Bottom Near CVL Temperature" },
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{ 0x508, 0x50c, 0x510, 0x52c, 0x0, 500,
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"Board Top East Near VRs Temperature" },
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{ 0x514, 0x518, 0x51c, 0x52c, 0x0, 500,
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"Columbiaville Die Temperature" },
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{ 0x520, 0x524, 0x528, 0x52c, 0x0, 500,
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"Board Rear Side Temperature" },
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{ 0x530, 0x534, 0x538, 0x52c, 0x0, 500,
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"Board Front Side Temperature" },
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{ 0x53c, 0x540, 0x544, 0x0, 0x0, 500,
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"QSFP1 Temperature" },
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{ 0x548, 0x54c, 0x550, 0x0, 0x0, 500,
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"QSFP2 Temperature" },
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{ 0x554, 0x0, 0x0, 0x0, 0x0, 500,
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"FPGA Core Voltage Phase 0 VR Temperature" },
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{ 0x560, 0x0, 0x0, 0x0, 0x0, 500,
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"FPGA Core Voltage Phase 1 VR Temperature" },
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{ 0x56c, 0x0, 0x0, 0x0, 0x0, 500,
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"FPGA Core Voltage Phase 2 VR Temperature" },
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{ 0x578, 0x0, 0x0, 0x0, 0x0, 500,
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"FPGA Core Voltage VR Controller Temperature" },
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{ 0x584, 0x0, 0x0, 0x0, 0x0, 500,
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"FPGA VCCH VR Temperature" },
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{ 0x590, 0x0, 0x0, 0x0, 0x0, 500,
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"FPGA VCC_1V2 VR Temperature" },
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{ 0x59c, 0x0, 0x0, 0x0, 0x0, 500,
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"FPGA VCCH, VCC_1V2 VR Controller Temperature" },
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{ 0x5a8, 0x0, 0x0, 0x0, 0x0, 500,
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"3V3 VR Temperature" },
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{ 0x5b4, 0x5b8, 0x5bc, 0x0, 0x0, 500,
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"CVL Core Voltage VR Temperature" },
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{ 0x5c4, 0x5c8, 0x5cc, 0x5c0, 0x0, 500,
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"FPGA P-Tile Temperature [Remote]" },
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{ 0x5d0, 0x5d4, 0x5d8, 0x5c0, 0x0, 500,
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"FPGA E-Tile Temperature [Remote]" },
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{ 0x5dc, 0x5e0, 0x5e4, 0x5c0, 0x0, 500,
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"FPGA SDM Temperature [Remote]" },
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{ 0x5e8, 0x5ec, 0x5f0, 0x5c0, 0x0, 500,
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"FPGA Corner Temperature [Remote]" },
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};
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static const struct max10_sensor_data n6000bmc_tmp_data = {
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.type = SENSOR_TMP_NAME,
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.number = ARRAY_SIZE(n6000bmc_temp_tbl),
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.table = n6000bmc_temp_tbl,
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};
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static const struct max10_sensor_raw_data n6000bmc_in_tbl[] = {
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{ 0x5f4, 0x0, 0x0, 0x0, 0x0, 1,
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"Inlet 12V PCIe Rail Voltage" },
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{ 0x60c, 0x0, 0x0, 0x0, 0x0, 1,
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"Inlet 12V Aux Rail Voltage" },
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{ 0x624, 0x0, 0x0, 0x0, 0x0, 1,
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"Inlet 3V3 PCIe Rail Voltage" },
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{ 0x63c, 0x0, 0x0, 0x0, 0x0, 1,
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"FPGA Core Voltage Rail Voltage" },
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{ 0x644, 0x0, 0x0, 0x0, 0x0, 1,
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"FPGA VCCH Rail Voltage" },
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{ 0x64c, 0x0, 0x0, 0x0, 0x0, 1,
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"FPGA VCC_1V2 Rail Voltage" },
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{ 0x654, 0x0, 0x0, 0x0, 0x0, 1,
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"FPGA VCCH_GXER_1V1, VCCA_1V8 Voltage" },
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{ 0x664, 0x0, 0x0, 0x0, 0x0, 1,
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"FPGA VCCIO_1V2 Voltage" },
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{ 0x674, 0x0, 0x0, 0x0, 0x0, 1,
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"CVL Non Core Rails Inlet Voltage" },
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{ 0x684, 0x0, 0x0, 0x0, 0x0, 1,
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"MAX10 & Board CLK PWR 3V3 Inlet Voltage" },
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{ 0x694, 0x0, 0x0, 0x0, 0x0, 1,
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"CVL Core Voltage Rail Voltage" },
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{ 0x6ac, 0x0, 0x0, 0x0, 0x0, 1,
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"Board 3V3 VR Voltage" },
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{ 0x6b4, 0x0, 0x0, 0x0, 0x0, 1,
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"QSFP 3V3 Rail Voltage" },
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{ 0x6c4, 0x0, 0x0, 0x0, 0x0, 1,
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"QSFP (Primary) Supply Rail Voltage" },
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{ 0x6c8, 0x0, 0x0, 0x0, 0x0, 1,
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"QSFP (Secondary) Supply Rail Voltage" },
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{ 0x6cc, 0x0, 0x0, 0x0, 0x0, 1,
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"VCCCLK_GXER_2V5 Voltage" },
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{ 0x6d0, 0x0, 0x0, 0x0, 0x0, 1,
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"AVDDH_1V1_CVL Voltage" },
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{ 0x6d4, 0x0, 0x0, 0x0, 0x0, 1,
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"VDDH_1V8_CVL Voltage" },
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{ 0x6d8, 0x0, 0x0, 0x0, 0x0, 1,
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"VCCA_PLL Voltage" },
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{ 0x6e0, 0x0, 0x0, 0x0, 0x0, 1,
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"VCCRT_GXER_0V9 Voltage" },
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{ 0x6e8, 0x0, 0x0, 0x0, 0x0, 1,
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"VCCRT_GXEL_0V9 Voltage" },
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{ 0x6f0, 0x0, 0x0, 0x0, 0x0, 1,
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"VCCH_GXPL_1V8 Voltage" },
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{ 0x6f4, 0x0, 0x0, 0x0, 0x0, 1,
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"VCCPT_1V8 Voltage" },
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{ 0x6fc, 0x0, 0x0, 0x0, 0x0, 1,
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"VCC_3V3_M10 Voltage" },
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{ 0x700, 0x0, 0x0, 0x0, 0x0, 1,
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"VCC_1V8_M10 Voltage" },
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{ 0x704, 0x0, 0x0, 0x0, 0x0, 1,
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"VCC_1V2_EMIF1_2_3 Voltage" },
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{ 0x70c, 0x0, 0x0, 0x0, 0x0, 1,
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"VCC_1V2_EMIF4_5 Voltage" },
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{ 0x714, 0x0, 0x0, 0x0, 0x0, 1,
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"VCCA_1V8 Voltage" },
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{ 0x718, 0x0, 0x0, 0x0, 0x0, 1,
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"VCCH_GXER_1V1 Voltage" },
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{ 0x71c, 0x0, 0x0, 0x0, 0x0, 1,
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"AVDD_ETH_0V9_CVL Voltage" },
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{ 0x720, 0x0, 0x0, 0x0, 0x0, 1,
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"AVDD_PCIE_0V9_CVL Voltage" },
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};
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static const struct max10_sensor_data n6000bmc_in_data = {
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.type = SENSOR_IN_NAME,
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.number = ARRAY_SIZE(n6000bmc_in_tbl),
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.table = n6000bmc_in_tbl,
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};
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static const struct max10_sensor_raw_data n6000bmc_curr_tbl[] = {
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{ 0x600, 0x604, 0x608, 0x0, 0x0, 1,
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"Inlet 12V PCIe Rail Current" },
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{ 0x618, 0x61c, 0x620, 0x0, 0x0, 1,
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"Inlet 12V Aux Rail Current" },
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{ 0x630, 0x634, 0x638, 0x0, 0x0, 1,
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"Inlet 3V3 PCIe Rail Current" },
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{ 0x640, 0x0, 0x0, 0x0, 0x0, 1,
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"FPGA Core Voltage Rail Current" },
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{ 0x648, 0x0, 0x0, 0x0, 0x0, 1,
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"FPGA VCCH Rail Current" },
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{ 0x650, 0x0, 0x0, 0x0, 0x0, 1,
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"FPGA VCC_1V2 Rail Current" },
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{ 0x658, 0x65c, 0x660, 0x0, 0x0, 1,
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"FPGA VCCH_GXER_1V1, VCCA_1V8 Current" },
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{ 0x668, 0x66c, 0x670, 0x0, 0x0, 1,
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"FPGA VCCIO_1V2 Current" },
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{ 0x678, 0x67c, 0x680, 0x0, 0x0, 1,
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"CVL Non Core Rails Inlet Current" },
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{ 0x688, 0x68c, 0x680, 0x0, 0x0, 1,
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"MAX10 & Board CLK PWR 3V3 Inlet Current" },
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{ 0x690, 0x0, 0x0, 0x0, 0x0, 1,
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"CVL Core Voltage Rail Current" },
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{ 0x6b0, 0x0, 0x0, 0x0, 0x0, 1,
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"Board 3V3 VR Current" },
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{ 0x6b8, 0x6bc, 0x670, 0x0, 0x0, 1,
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"QSFP 3V3 Rail Current" },
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};
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static const struct max10_sensor_data n6000bmc_curr_data = {
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.type = SENSOR_CURR_NAME,
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.number = ARRAY_SIZE(n6000bmc_curr_tbl),
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.table = n6000bmc_curr_tbl,
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};
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static const struct max10_sensor_raw_data n6000bmc_power_tbl[] = {
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{ 0x724, 0x0, 0x0, 0x0, 0x0, 1000, "Board Power" },
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};
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static const struct max10_sensor_data n6000bmc_power_data = {
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.type = SENSOR_POWER_NAME,
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.number = ARRAY_SIZE(n6000bmc_power_tbl),
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.table = n6000bmc_power_tbl,
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};
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static const struct max10_sensor_board_data n6000bmc_sensor_board_data = {
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.tables = {
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[sensor_temp] = &n6000bmc_tmp_data,
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[sensor_in] = &n6000bmc_in_data,
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[sensor_curr] = &n6000bmc_curr_data,
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[sensor_power] = &n6000bmc_power_data,
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},
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};
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static int get_sensor_data(struct intel_max10_device *dev,
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struct opae_sensor_info *sensor,
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unsigned int *value,
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unsigned int reg,
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unsigned int flags)
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{
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int ret;
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unsigned int data;
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if (!reg)
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return 0;
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ret = max10_sys_read(dev, reg, &data);
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if (ret)
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return ret;
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if (data == SENSOR_INVALID) {
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dev_debug(dev, "%s: sensor:%s invalid 0x%x at:%d\n",
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__func__, sensor->name, data, reg);
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return ret;
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}
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*value = data * sensor->multiplier;
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sensor->flags |= flags;
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return 0;
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}
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static int max10_parse_sensor_data(struct intel_max10_device *dev,
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const struct max10_sensor_data *sdata)
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{
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struct opae_sensor_info *sensor;
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const struct max10_sensor_raw_data *raw;
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const struct max10_sensor_raw_data *table =
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(const struct max10_sensor_raw_data *)sdata->table;
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unsigned int i;
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static unsigned int sensor_id;
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int ret = 0;
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for (i = 0; i < sdata->number; i++) {
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raw = &table[i];
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sensor = opae_zmalloc(sizeof(*sensor));
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if (!sensor) {
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ret = -EINVAL;
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goto free_sensor;
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}
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sensor->type = sdata->type;
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sensor->id = sensor_id++;
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if (!raw->reg_input)
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continue;
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sensor->value_reg = raw->reg_input;
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sensor->multiplier = raw->multiplier;
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sensor->name = raw->label;
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ret = get_sensor_data(dev, sensor,
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&sensor->high_warn,
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raw->reg_high_warn,
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OPAE_SENSOR_HIGH_WARN_VALID);
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if (ret)
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break;
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ret = get_sensor_data(dev, sensor,
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&sensor->high_fatal,
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raw->reg_high_fatal,
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OPAE_SENSOR_HIGH_FATAL_VALID);
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if (ret)
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break;
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ret = get_sensor_data(dev, sensor,
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&sensor->hysteresis,
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raw->reg_hyst,
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OPAE_SENSOR_HYSTERESIS_VALID);
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if (ret)
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break;
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ret = get_sensor_data(dev, sensor,
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&sensor->low_warn,
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raw->reg_low_warn,
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OPAE_SENSOR_LOW_WARN_VALID);
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if (ret)
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break;
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sensor->flags |= OPAE_SENSOR_VALID;
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TAILQ_INSERT_TAIL(&dev->opae_sensor_list, sensor, node);
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dev_info(dev, "found valid sensor: %s\n", sensor->name);
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}
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return ret;
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free_sensor:
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max10_sensor_uinit(dev);
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return ret;
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}
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static int max10_sensor_init_table(struct intel_max10_device *dev,
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const struct max10_sensor_board_data *data)
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{
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int ret = 0;
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unsigned int i;
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const struct max10_sensor_data *sdata;
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for (i = 0; i < ARRAY_SIZE(data->tables); i++) {
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sdata = data->tables[i];
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if (!sdata)
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continue;
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ret = max10_parse_sensor_data(dev, sdata);
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if (ret)
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break;
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}
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return ret;
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}
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int
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intel_max10_device_init(struct intel_max10_device *dev)
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{
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@ -1153,6 +1475,10 @@ intel_max10_device_init(struct intel_max10_device *dev)
|
||||
dev->bmc_ops.flash_write = pmci_flash_bulk_write;
|
||||
dev->bmc_ops.check_flash_range = pmci_check_flash_address;
|
||||
|
||||
ret = max10_sensor_init_table(dev, &n6000bmc_sensor_board_data);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = pthread_mutex_init(&dev->bmc_ops.lock, NULL);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
@ -410,6 +410,41 @@ struct opae_sensor_info {
|
||||
unsigned int value_reg;
|
||||
};
|
||||
|
||||
#define SENSOR_INVALID 0xdeadbeef
|
||||
|
||||
struct max10_sensor_raw_data {
|
||||
unsigned int reg_input;
|
||||
unsigned int reg_high_warn;
|
||||
unsigned int reg_high_fatal;
|
||||
unsigned int reg_hyst;
|
||||
unsigned int reg_low_warn;
|
||||
unsigned int multiplier;
|
||||
const char *label;
|
||||
};
|
||||
|
||||
struct max10_sensor_data {
|
||||
const char *type;
|
||||
unsigned int number;
|
||||
const struct max10_sensor_raw_data *table;
|
||||
};
|
||||
|
||||
enum max10_sensor_types {
|
||||
sensor_temp,
|
||||
sensor_in,
|
||||
sensor_curr,
|
||||
sensor_power,
|
||||
sensor_max,
|
||||
};
|
||||
|
||||
#define SENSOR_TMP_NAME "Temperature"
|
||||
#define SENSOR_IN_NAME "Voltage"
|
||||
#define SENSOR_CURR_NAME "Current"
|
||||
#define SENSOR_POWER_NAME "Power"
|
||||
|
||||
struct max10_sensor_board_data {
|
||||
const struct max10_sensor_data *tables[sensor_max];
|
||||
};
|
||||
|
||||
/* indirect access for PMCI */
|
||||
#define PMCI_INDIRECT_BASE 0x400
|
||||
#define INDIRECT_CMD_OFF (PMCI_INDIRECT_BASE + 0x0)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user