bus/fslmc: add dpio portal driver
The portal driver is bound to DPIO objects discovered on the fsl-mc bus and provides services that: - allow other drivers, such as the Ethernet driver, to enqueue and dequeue frames for their respective objects A system will typically allocate 1 DPIO object per CPU to allow queuing operations to happen simultaneously across all CPUs. Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
This commit is contained in:
Hemant Agrawal
Ferruh Yigit
parent
52d4f4c765
commit
5374e50f10
@ -67,6 +67,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_FSLMC_BUS) += \
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mc/dpio.c \
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mc/mc_sys.c
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SRCS-$(CONFIG_RTE_LIBRTE_FSLMC_BUS) += portal/dpaa2_hw_dpio.c
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SRCS-$(CONFIG_RTE_LIBRTE_FSLMC_BUS) += fslmc_vfio.c
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SRCS-$(CONFIG_RTE_LIBRTE_FSLMC_BUS) += fslmc_bus.c
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@ -61,6 +61,9 @@
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#include "rte_fslmc.h"
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#include "fslmc_vfio.h"
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#include "portal/dpaa2_hw_pvt.h"
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#include "portal/dpaa2_hw_dpio.h"
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#define VFIO_MAX_CONTAINERS 1
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#define FSLMC_VFIO_LOG(level, fmt, args...) \
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@ -261,12 +264,13 @@ int fslmc_vfio_process_group(void)
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struct fslmc_vfio_device *vdev;
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struct vfio_device_info device_info = { .argsz = sizeof(device_info) };
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char *temp_obj, *object_type, *mcp_obj, *dev_name;
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int32_t object_id, i, dev_fd;
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int32_t object_id, i, dev_fd, ret;
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DIR *d;
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struct dirent *dir;
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char path[PATH_MAX];
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int64_t v_addr;
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int ndev_count;
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int dpio_count = 0;
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struct fslmc_vfio_group *group = &vfio_groups[0];
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static int process_once;
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@ -410,9 +414,20 @@ int fslmc_vfio_process_group(void)
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fslmc_bus_add_device(dev);
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}
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if (!strcmp(object_type, "dpio")) {
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ret = dpaa2_create_dpio_device(vdev,
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&device_info,
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object_id);
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if (!ret)
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dpio_count++;
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}
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}
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closedir(d);
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ret = dpaa2_affine_qbman_swp();
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if (ret)
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FSLMC_VFIO_LOG(DEBUG, "Error in affining qbman swp %d", ret);
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return 0;
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FAILURE:
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@ -71,4 +71,9 @@ int vfio_dmamap_mem_region(
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int fslmc_vfio_setup_group(void);
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int fslmc_vfio_process_group(void);
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/* create dpio device */
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int dpaa2_create_dpio_device(struct fslmc_vfio_device *vdev,
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struct vfio_device_info *obj_info,
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int object_id);
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#endif /* _FSLMC_VFIO_H_ */
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368
drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
Normal file
368
drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
Normal file
@ -0,0 +1,368 @@
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/*-
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* BSD LICENSE
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*
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* Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
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* Copyright (c) 2016 NXP. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Freescale Semiconductor, Inc nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <unistd.h>
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#include <stdio.h>
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#include <string.h>
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#include <stdlib.h>
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#include <fcntl.h>
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#include <errno.h>
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#include <stdarg.h>
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#include <inttypes.h>
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#include <signal.h>
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#include <pthread.h>
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#include <sys/types.h>
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#include <sys/queue.h>
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#include <sys/ioctl.h>
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#include <sys/stat.h>
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#include <sys/mman.h>
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#include <sys/syscall.h>
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#include <rte_mbuf.h>
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#include <rte_ethdev.h>
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#include <rte_malloc.h>
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#include <rte_memcpy.h>
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#include <rte_string_fns.h>
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#include <rte_cycles.h>
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#include <rte_kvargs.h>
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#include <rte_dev.h>
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#include <rte_ethdev.h>
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#include <fslmc_logs.h>
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#include <fslmc_vfio.h>
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#include "dpaa2_hw_pvt.h"
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#include "dpaa2_hw_dpio.h"
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#define NUM_HOST_CPUS RTE_MAX_LCORE
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struct dpaa2_io_portal_t dpaa2_io_portal[RTE_MAX_LCORE];
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RTE_DEFINE_PER_LCORE(struct dpaa2_io_portal_t, _dpaa2_io);
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TAILQ_HEAD(dpio_device_list, dpaa2_dpio_dev);
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static struct dpio_device_list *dpio_dev_list; /*!< DPIO device list */
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static uint32_t io_space_count;
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/*Stashing Macros default for LS208x*/
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static int dpaa2_core_cluster_base = 0x04;
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static int dpaa2_cluster_sz = 2;
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/* For LS208X platform There are four clusters with following mapping:
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* Cluster 1 (ID = x04) : CPU0, CPU1;
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* Cluster 2 (ID = x05) : CPU2, CPU3;
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* Cluster 3 (ID = x06) : CPU4, CPU5;
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* Cluster 4 (ID = x07) : CPU6, CPU7;
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*/
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/* For LS108X platform There are two clusters with following mapping:
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* Cluster 1 (ID = x02) : CPU0, CPU1, CPU2, CPU3;
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* Cluster 2 (ID = x03) : CPU4, CPU5, CPU6, CPU7;
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*/
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/* Set the STASH Destination depending on Current CPU ID.
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* e.g. Valid values of SDEST are 4,5,6,7. Where,
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* CPU 0-1 will have SDEST 4
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* CPU 2-3 will have SDEST 5.....and so on.
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*/
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static int
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dpaa2_core_cluster_sdest(int cpu_id)
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{
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int x = cpu_id / dpaa2_cluster_sz;
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if (x > 3)
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x = 3;
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return dpaa2_core_cluster_base + x;
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}
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static int
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configure_dpio_qbman_swp(struct dpaa2_dpio_dev *dpio_dev)
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{
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struct qbman_swp_desc p_des;
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struct dpio_attr attr;
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dpio_dev->dpio = malloc(sizeof(struct fsl_mc_io));
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if (!dpio_dev->dpio) {
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PMD_INIT_LOG(ERR, "Memory allocation failure\n");
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return -1;
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}
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PMD_DRV_LOG(DEBUG, "\t Allocated DPIO Portal[%p]", dpio_dev->dpio);
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dpio_dev->dpio->regs = dpio_dev->mc_portal;
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if (dpio_open(dpio_dev->dpio, CMD_PRI_LOW, dpio_dev->hw_id,
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&dpio_dev->token)) {
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PMD_INIT_LOG(ERR, "Failed to allocate IO space\n");
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free(dpio_dev->dpio);
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return -1;
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}
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if (dpio_reset(dpio_dev->dpio, CMD_PRI_LOW, dpio_dev->token)) {
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PMD_INIT_LOG(ERR, "Failed to reset dpio\n");
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dpio_close(dpio_dev->dpio, CMD_PRI_LOW, dpio_dev->token);
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free(dpio_dev->dpio);
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return -1;
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}
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if (dpio_enable(dpio_dev->dpio, CMD_PRI_LOW, dpio_dev->token)) {
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PMD_INIT_LOG(ERR, "Failed to Enable dpio\n");
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dpio_close(dpio_dev->dpio, CMD_PRI_LOW, dpio_dev->token);
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free(dpio_dev->dpio);
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return -1;
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}
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if (dpio_get_attributes(dpio_dev->dpio, CMD_PRI_LOW,
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dpio_dev->token, &attr)) {
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PMD_INIT_LOG(ERR, "DPIO Get attribute failed\n");
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dpio_disable(dpio_dev->dpio, CMD_PRI_LOW, dpio_dev->token);
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dpio_close(dpio_dev->dpio, CMD_PRI_LOW, dpio_dev->token);
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free(dpio_dev->dpio);
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return -1;
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}
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PMD_INIT_LOG(DEBUG, "Qbman Portal ID %d", attr.qbman_portal_id);
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PMD_INIT_LOG(DEBUG, "Portal CE adr 0x%lX", attr.qbman_portal_ce_offset);
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PMD_INIT_LOG(DEBUG, "Portal CI adr 0x%lX", attr.qbman_portal_ci_offset);
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/* Configure & setup SW portal */
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p_des.block = NULL;
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p_des.idx = attr.qbman_portal_id;
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p_des.cena_bar = (void *)(dpio_dev->qbman_portal_ce_paddr);
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p_des.cinh_bar = (void *)(dpio_dev->qbman_portal_ci_paddr);
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p_des.irq = -1;
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p_des.qman_version = attr.qbman_version;
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dpio_dev->sw_portal = qbman_swp_init(&p_des);
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if (dpio_dev->sw_portal == NULL) {
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PMD_DRV_LOG(ERR, " QBMan SW Portal Init failed\n");
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dpio_close(dpio_dev->dpio, CMD_PRI_LOW, dpio_dev->token);
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free(dpio_dev->dpio);
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return -1;
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}
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PMD_INIT_LOG(DEBUG, "QBMan SW Portal 0x%p\n", dpio_dev->sw_portal);
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return 0;
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}
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static int
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dpaa2_configure_stashing(struct dpaa2_dpio_dev *dpio_dev)
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{
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int sdest;
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int cpu_id, ret;
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/* Set the Stashing Destination */
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cpu_id = rte_lcore_id();
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if (cpu_id < 0) {
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cpu_id = rte_get_master_lcore();
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if (cpu_id < 0) {
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RTE_LOG(ERR, PMD, "\tGetting CPU Index failed\n");
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return -1;
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}
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}
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/* Set the STASH Destination depending on Current CPU ID.
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* Valid values of SDEST are 4,5,6,7. Where,
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* CPU 0-1 will have SDEST 4
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* CPU 2-3 will have SDEST 5.....and so on.
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*/
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sdest = dpaa2_core_cluster_sdest(cpu_id);
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PMD_DRV_LOG(DEBUG, "Portal= %d CPU= %u SDEST= %d",
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dpio_dev->index, cpu_id, sdest);
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ret = dpio_set_stashing_destination(dpio_dev->dpio, CMD_PRI_LOW,
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dpio_dev->token, sdest);
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if (ret) {
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PMD_DRV_LOG(ERR, "%d ERROR in SDEST\n", ret);
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return -1;
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}
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return 0;
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}
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static inline struct dpaa2_dpio_dev *dpaa2_get_qbman_swp(void)
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{
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struct dpaa2_dpio_dev *dpio_dev = NULL;
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int ret;
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/* Get DPIO dev handle from list using index */
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TAILQ_FOREACH(dpio_dev, dpio_dev_list, next) {
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if (dpio_dev && rte_atomic16_test_and_set(&dpio_dev->ref_count))
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break;
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}
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if (!dpio_dev)
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return NULL;
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PMD_DRV_LOG(DEBUG, "New Portal=0x%x (%d) affined thread - %lu",
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dpio_dev, dpio_dev->index, syscall(SYS_gettid));
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ret = dpaa2_configure_stashing(dpio_dev);
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if (ret)
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PMD_DRV_LOG(ERR, "dpaa2_configure_stashing failed");
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return dpio_dev;
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}
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int
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dpaa2_affine_qbman_swp(void)
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{
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unsigned int lcore_id = rte_lcore_id();
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uint64_t tid = syscall(SYS_gettid);
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if (lcore_id == LCORE_ID_ANY)
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lcore_id = rte_get_master_lcore();
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/* if the core id is not supported */
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else if (lcore_id >= RTE_MAX_LCORE)
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return -1;
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if (dpaa2_io_portal[lcore_id].dpio_dev) {
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PMD_DRV_LOG(INFO, "DPAA Portal=0x%x (%d) is being shared"
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" between thread %lu and current %lu",
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dpaa2_io_portal[lcore_id].dpio_dev,
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dpaa2_io_portal[lcore_id].dpio_dev->index,
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dpaa2_io_portal[lcore_id].net_tid,
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tid);
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RTE_PER_LCORE(_dpaa2_io).dpio_dev
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= dpaa2_io_portal[lcore_id].dpio_dev;
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rte_atomic16_inc(&dpaa2_io_portal
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[lcore_id].dpio_dev->ref_count);
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dpaa2_io_portal[lcore_id].net_tid = tid;
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PMD_DRV_LOG(DEBUG, "Old Portal=0x%x (%d) affined thread - %lu",
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dpaa2_io_portal[lcore_id].dpio_dev,
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dpaa2_io_portal[lcore_id].dpio_dev->index,
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tid);
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return 0;
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}
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/* Populate the dpaa2_io_portal structure */
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dpaa2_io_portal[lcore_id].dpio_dev = dpaa2_get_qbman_swp();
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if (dpaa2_io_portal[lcore_id].dpio_dev) {
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RTE_PER_LCORE(_dpaa2_io).dpio_dev
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= dpaa2_io_portal[lcore_id].dpio_dev;
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dpaa2_io_portal[lcore_id].net_tid = tid;
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return 0;
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} else {
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return -1;
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}
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}
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int
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dpaa2_create_dpio_device(struct fslmc_vfio_device *vdev,
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struct vfio_device_info *obj_info,
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int object_id)
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{
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struct dpaa2_dpio_dev *dpio_dev;
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struct vfio_region_info reg_info = { .argsz = sizeof(reg_info)};
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if (obj_info->num_regions < NUM_DPIO_REGIONS) {
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PMD_INIT_LOG(ERR, "ERROR, Not sufficient number "
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"of DPIO regions.\n");
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return -1;
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}
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if (!dpio_dev_list) {
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dpio_dev_list = malloc(sizeof(struct dpio_device_list));
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if (!dpio_dev_list) {
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PMD_INIT_LOG(ERR, "Memory alloc failed in DPIO list\n");
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return -1;
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}
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/* Initialize the DPIO List */
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TAILQ_INIT(dpio_dev_list);
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}
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dpio_dev = malloc(sizeof(struct dpaa2_dpio_dev));
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if (!dpio_dev) {
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PMD_INIT_LOG(ERR, "Memory allocation failed for DPIO Device\n");
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return -1;
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}
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PMD_DRV_LOG(INFO, "\t Aloocated DPIO [%p]", dpio_dev);
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dpio_dev->dpio = NULL;
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dpio_dev->hw_id = object_id;
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dpio_dev->vfio_fd = vdev->fd;
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rte_atomic16_init(&dpio_dev->ref_count);
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/* Using single portal for all devices */
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dpio_dev->mc_portal = rte_mcp_ptr_list[MC_PORTAL_INDEX];
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reg_info.index = 0;
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if (ioctl(dpio_dev->vfio_fd, VFIO_DEVICE_GET_REGION_INFO, ®_info)) {
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PMD_INIT_LOG(ERR, "vfio: error getting region info\n");
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free(dpio_dev);
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return -1;
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}
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PMD_DRV_LOG(DEBUG, "\t Region Offset = %llx", reg_info.offset);
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PMD_DRV_LOG(DEBUG, "\t Region Size = %llx", reg_info.size);
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dpio_dev->ce_size = reg_info.size;
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dpio_dev->qbman_portal_ce_paddr = (uint64_t)mmap(NULL, reg_info.size,
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PROT_WRITE | PROT_READ, MAP_SHARED,
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dpio_dev->vfio_fd, reg_info.offset);
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/* Create Mapping for QBMan Cache Enabled area. This is a fix for
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* SMMU fault for DQRR statshing transaction.
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*/
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if (vfio_dmamap_mem_region(dpio_dev->qbman_portal_ce_paddr,
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reg_info.offset, reg_info.size)) {
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PMD_INIT_LOG(ERR, "DMAMAP for Portal CE area failed.\n");
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free(dpio_dev);
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return -1;
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}
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reg_info.index = 1;
|
||||
if (ioctl(dpio_dev->vfio_fd, VFIO_DEVICE_GET_REGION_INFO, ®_info)) {
|
||||
PMD_INIT_LOG(ERR, "vfio: error getting region info\n");
|
||||
free(dpio_dev);
|
||||
return -1;
|
||||
}
|
||||
|
||||
PMD_DRV_LOG(DEBUG, "\t Region Offset = %llx", reg_info.offset);
|
||||
PMD_DRV_LOG(DEBUG, "\t Region Size = %llx", reg_info.size);
|
||||
dpio_dev->ci_size = reg_info.size;
|
||||
dpio_dev->qbman_portal_ci_paddr = (uint64_t)mmap(NULL, reg_info.size,
|
||||
PROT_WRITE | PROT_READ, MAP_SHARED,
|
||||
dpio_dev->vfio_fd, reg_info.offset);
|
||||
|
||||
if (configure_dpio_qbman_swp(dpio_dev)) {
|
||||
PMD_INIT_LOG(ERR,
|
||||
"Fail to configure the dpio qbman portal for %d\n",
|
||||
dpio_dev->hw_id);
|
||||
free(dpio_dev);
|
||||
return -1;
|
||||
}
|
||||
|
||||
io_space_count++;
|
||||
dpio_dev->index = io_space_count;
|
||||
TAILQ_INSERT_HEAD(dpio_dev_list, dpio_dev, next);
|
||||
|
||||
return 0;
|
||||
}
|
||||
60
drivers/bus/fslmc/portal/dpaa2_hw_dpio.h
Normal file
60
drivers/bus/fslmc/portal/dpaa2_hw_dpio.h
Normal file
@ -0,0 +1,60 @@
|
||||
/*-
|
||||
* BSD LICENSE
|
||||
*
|
||||
* Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
|
||||
* Copyright (c) 2016 NXP. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of Freescale Semiconductor, Inc nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _DPAA2_HW_DPIO_H_
|
||||
#define _DPAA2_HW_DPIO_H_
|
||||
|
||||
#include <mc/fsl_dpio.h>
|
||||
#include <mc/fsl_mc_sys.h>
|
||||
|
||||
struct dpaa2_io_portal_t {
|
||||
struct dpaa2_dpio_dev *dpio_dev;
|
||||
struct dpaa2_dpio_dev *sec_dpio_dev;
|
||||
uint64_t net_tid;
|
||||
uint64_t sec_tid;
|
||||
};
|
||||
|
||||
/*! Global per thread DPIO portal */
|
||||
RTE_DECLARE_PER_LCORE(struct dpaa2_io_portal_t, _dpaa2_io);
|
||||
|
||||
#define DPAA2_PER_LCORE_DPIO RTE_PER_LCORE(_dpaa2_io).dpio_dev
|
||||
#define DPAA2_PER_LCORE_PORTAL DPAA2_PER_LCORE_DPIO->sw_portal
|
||||
|
||||
#define DPAA2_PER_LCORE_SEC_DPIO RTE_PER_LCORE(_dpaa2_io).sec_dpio_dev
|
||||
#define DPAA2_PER_LCORE_SEC_PORTAL DPAA2_PER_LCORE_SEC_DPIO->sw_portal
|
||||
|
||||
/* Affine a DPIO portal to current processing thread */
|
||||
int dpaa2_affine_qbman_swp(void);
|
||||
|
||||
|
||||
#endif /* _DPAA2_HW_DPIO_H_ */
|
||||
68
drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
Normal file
68
drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
Normal file
@ -0,0 +1,68 @@
|
||||
/*-
|
||||
* BSD LICENSE
|
||||
*
|
||||
* Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
|
||||
* Copyright (c) 2016 NXP. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of Freescale Semiconductor, Inc nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _DPAA2_HW_PVT_H_
|
||||
#define _DPAA2_HW_PVT_H_
|
||||
|
||||
#include <mc/fsl_mc_sys.h>
|
||||
#include <fsl_qbman_portal.h>
|
||||
|
||||
|
||||
#define MC_PORTAL_INDEX 0
|
||||
#define NUM_DPIO_REGIONS 2
|
||||
|
||||
struct dpaa2_dpio_dev {
|
||||
TAILQ_ENTRY(dpaa2_dpio_dev) next;
|
||||
/**< Pointer to Next device instance */
|
||||
uint16_t index; /**< Index of a instance in the list */
|
||||
rte_atomic16_t ref_count;
|
||||
/**< How many thread contexts are sharing this.*/
|
||||
struct fsl_mc_io *dpio; /** handle to DPIO portal object */
|
||||
uint16_t token;
|
||||
struct qbman_swp *sw_portal; /** SW portal object */
|
||||
const struct qbman_result *dqrr[4];
|
||||
/**< DQRR Entry for this SW portal */
|
||||
void *mc_portal; /**< MC Portal for configuring this device */
|
||||
uintptr_t qbman_portal_ce_paddr;
|
||||
/**< Physical address of Cache Enabled Area */
|
||||
uintptr_t ce_size; /**< Size of the CE region */
|
||||
uintptr_t qbman_portal_ci_paddr;
|
||||
/**< Physical address of Cache Inhibit Area */
|
||||
uintptr_t ci_size; /**< Size of the CI region */
|
||||
int32_t vfio_fd; /**< File descriptor received via VFIO */
|
||||
int32_t hw_id; /**< An unique ID of this DPIO device instance */
|
||||
};
|
||||
|
||||
/*! Global MCP list */
|
||||
extern void *(*rte_mcp_ptr_list);
|
||||
#endif
|
||||
@ -1,6 +1,7 @@
|
||||
DPDK_17.05 {
|
||||
global:
|
||||
|
||||
dpaa2_affine_qbman_swp;
|
||||
dpbp_disable;
|
||||
dpbp_enable;
|
||||
dpbp_get_attributes;
|
||||
@ -15,6 +16,7 @@ DPDK_17.05 {
|
||||
dpio_reset;
|
||||
dpio_set_stashing_destination;
|
||||
mc_send_command;
|
||||
per_lcore__dpaa2_io;
|
||||
qbman_check_command_complete;
|
||||
qbman_eq_desc_clear;
|
||||
qbman_eq_desc_set_no_orp;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user