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crypto/qat: support RSA CRT in asym

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This commit extends RSA implementation by CRT option

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
This commit is contained in:
Arek Kusztal 2019-10-22 16:04:27 +02:00 committed by Akhil Goyal
parent e2c5f4ea99
commit 539a3216e1
6 changed files with 73 additions and 4 deletions
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1
doc/guides/cryptodevs/features/qat.ini
View File

@ -15,6 +15,7 @@ OOP LB In LB Out = Y
Digest encrypted = Y
Asymmetric sessionless = Y
RSA PRIV OP KEY EXP = Y
RSA PRIV OP KEY QT = Y
;
; Supported crypto algorithms of the 'qat' crypto driver.

1
doc/guides/rel_notes/release_19_11.rst
View File

@ -129,6 +129,7 @@ New Features
* Added support for asymmetric session-less operations.
* Added support for RSA algorithm with pair (n, d) private key representation.
* Added support for RSA algorithm with quintuple private key representation.
* **Updated the Intel QuickAssist Technology (QAT) compression PMD.**

9
drivers/common/qat/qat_adf/qat_pke_functionality_arrays.h
View File

@ -67,4 +67,13 @@ static const uint32_t RSA_DEC_IDS[][2] = {
{ 4096, PKE_RSA_DP1_4096 },
};
static const uint32_t RSA_DEC_CRT_IDS[][2] = {
{ 512, PKE_RSA_DP2_512 },
{ 1024, PKE_RSA_DP2_1024 },
{ 1536, PKE_RSA_DP2_1536 },
{ 2048, PKE_RSA_DP2_2048 },
{ 3072, PKE_RSA_DP2_3072 },
{ 4096, PKE_RSA_DP2_4096 },
};
#endif

62
drivers/crypto/qat/qat_asym.c
View File

@ -352,10 +352,66 @@ qat_asym_fill_arrays(struct rte_crypto_asym_op *asym_op,
return -(EINVAL);
}
}
if (xform->rsa.key_type == RTE_RSA_KET_TYPE_QT) {
QAT_LOG(ERR, "RSA CRT not implemented");
return -(EINVAL);
qat_req->input_param_count =
QAT_ASYM_RSA_QT_NUM_IN_PARAMS;
if (qat_asym_get_sz_and_func_id(RSA_DEC_CRT_IDS,
sizeof(RSA_DEC_CRT_IDS)/
sizeof(*RSA_DEC_CRT_IDS),
&alg_size, &func_id)) {
return -(EINVAL);
}
alg_size_in_bytes = alg_size >> 3;
rte_memcpy(cookie->input_array[1] +
(alg_size_in_bytes >> 1) -
xform->rsa.qt.p.length
, xform->rsa.qt.p.data,
xform->rsa.qt.p.length);
rte_memcpy(cookie->input_array[2] +
(alg_size_in_bytes >> 1) -
xform->rsa.qt.q.length
, xform->rsa.qt.q.data,
xform->rsa.qt.q.length);
rte_memcpy(cookie->input_array[3] +
(alg_size_in_bytes >> 1) -
xform->rsa.qt.dP.length
, xform->rsa.qt.dP.data,
xform->rsa.qt.dP.length);
rte_memcpy(cookie->input_array[4] +
(alg_size_in_bytes >> 1) -
xform->rsa.qt.dQ.length
, xform->rsa.qt.dQ.data,
xform->rsa.qt.dQ.length);
rte_memcpy(cookie->input_array[5] +
(alg_size_in_bytes >> 1) -
xform->rsa.qt.qInv.length
, xform->rsa.qt.qInv.data,
xform->rsa.qt.qInv.length);
cookie->alg_size = alg_size;
qat_req->pke_hdr.cd_pars.func_id = func_id;
#if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG
QAT_DP_HEXDUMP_LOG(DEBUG, "C",
cookie->input_array[0],
alg_size_in_bytes);
QAT_DP_HEXDUMP_LOG(DEBUG, "p",
cookie->input_array[1],
alg_size_in_bytes);
QAT_DP_HEXDUMP_LOG(DEBUG, "q",
cookie->input_array[2],
alg_size_in_bytes);
QAT_DP_HEXDUMP_LOG(DEBUG,
"dP", cookie->input_array[3],
alg_size_in_bytes);
QAT_DP_HEXDUMP_LOG(DEBUG,
"dQ", cookie->input_array[4],
alg_size_in_bytes);
QAT_DP_HEXDUMP_LOG(DEBUG,
"qInv", cookie->input_array[5],
alg_size_in_bytes);
#endif
} else if (xform->rsa.key_type ==
RTE_RSA_KEY_TYPE_EXP) {
if (qat_asym_get_sz_and_func_id(

1
drivers/crypto/qat/qat_asym.h
View File

@ -24,6 +24,7 @@ typedef uint64_t large_int_ptr;
#define QAT_ASYM_MODEXP_NUM_OUT_PARAMS 1
#define QAT_ASYM_RSA_NUM_IN_PARAMS 3
#define QAT_ASYM_RSA_NUM_OUT_PARAMS 1
#define QAT_ASYM_RSA_QT_NUM_IN_PARAMS 6
struct qat_asym_op_cookie {
size_t alg_size;

3
drivers/crypto/qat/qat_asym_pmd.c
View File

@ -272,7 +272,8 @@ qat_asym_dev_create(struct qat_pci_device *qat_pci_dev)
cryptodev->feature_flags = RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO |
RTE_CRYPTODEV_FF_HW_ACCELERATED |
RTE_CRYPTODEV_FF_ASYM_SESSIONLESS |
RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_EXP;
RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_EXP |
RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT;
internals = cryptodev->data->dev_private;
internals->qat_dev = qat_pci_dev;
qat_pci_dev->asym_dev = internals;