dma/cnxk: create and initialize device on PCI probing

This patch creates and initializes a dmadev device on pci probe.

Signed-off-by: Radha Mohan Chintakuntla <radhac@marvell.com>
This commit is contained in:
Radha Mohan Chintakuntla 2021-11-03 11:01:47 -07:00 committed by Thomas Monjalon
parent b6e395692b
commit 53f6d7328b
10 changed files with 181 additions and 1 deletions

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@ -1211,6 +1211,12 @@ M: Chengwen Feng <fengchengwen@huawei.com>
F: drivers/dma/hisilicon/
F: doc/guides/dmadevs/hisilicon.rst
Marvell CNXK DPI DMA
M: Radha Mohan Chintakuntla <radhac@marvell.com>
M: Veerasenareddy Burru <vburru@marvell.com>
F: drivers/dma/cnxk/
F: doc/guides/dmadevs/cnxk.rst
RegEx Drivers
-------------

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@ -0,0 +1,44 @@
.. SPDX-License-Identifier: BSD-3-Clause
Copyright(c) 2021 Marvell International Ltd.
.. include:: <isonum.txt>
CNXK DMA Device Driver
======================
The ``cnxk`` dmadev driver provides a poll-mode driver (PMD) for Marvell DPI DMA
Hardware Accelerator block found in OCTEONTX2 and OCTEONTX3 family of SoCs.
Each DMA queue is exposed as a VF function when SRIOV is enabled.
The block supports following modes of DMA transfers:
#. Internal - DMA within SoC DRAM to DRAM
#. Inbound - Host DRAM to SoC DRAM when SoC is in PCIe Endpoint
#. Outbound - SoC DRAM to Host DRAM when SoC is in PCIe Endpoint
Prerequisites and Compilation procedure
---------------------------------------
See :doc:`../platform/cnxk` for setup information.
Device Setup
-------------
The ``dpdk-devbind.py`` script, included with DPDK,
can be used to show the presence of supported hardware.
Running ``dpdk-devbind.py --status-dev dma`` will show all the CNXK DMA devices.
Devices using VFIO drivers
~~~~~~~~~~~~~~~~~~~~~~~~~~
The HW devices to be used will need to be bound to a user-space IO driver for use.
The ``dpdk-devbind.py`` script can be used to view the state of the devices
and to bind them to a suitable DPDK-supported driver, such as ``vfio-pci``.
For example::
$ dpdk-devbind.py -b vfio-pci 0000:05:00.1
Device Probing and Initialization
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
To use the devices from an application, the dmadev API can be used.

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@ -11,6 +11,7 @@ an application through DMA API.
:maxdepth: 2
:numbered:
cnxk
hisilicon
idxd
ioat

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@ -62,7 +62,7 @@ DPDK subsystem.
+---+-----+--------------------------------------------------------------+
| 7 | LBK | rte_ethdev |
+---+-----+--------------------------------------------------------------+
| 8 | DPI | rte_rawdev |
| 8 | DPI | rte_dmadev |
+---+-----+--------------------------------------------------------------+
| 9 | SDP | rte_ethdev |
+---+-----+--------------------------------------------------------------+
@ -153,6 +153,9 @@ This section lists dataplane H/W block(s) available in cnxk SoC.
#. **Baseband PHY Driver**
See :doc:`../rawdevs/cnxk_bphy` for Baseband PHY driver information.
#. **Dmadev Driver**
See :doc:`../dmadevs/cnxk` for DPI Dmadev driver information.
Procedure to Setup Platform
---------------------------

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@ -91,6 +91,11 @@ New Features
driver for Intel IOAT devices such as Crystal Beach DMA (CBDMA) on Ice Lake,
Skylake and Broadwell. This device driver can be used through the generic dmadev API.
* **Added Marvell CNXK DMA driver.**
Added dmadev driver for the DPI DMA hardware accelerator
of Marvell OCTEONTX2 and OCTEONTX3 family of SoCs.
* **Added support to get all MAC addresses of a device.**
Added ``rte_eth_macaddrs_get`` to allow user to retrieve all Ethernet

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@ -0,0 +1,100 @@
/* SPDX-License-Identifier: BSD-3-Clause
* Copyright (C) 2021 Marvell International Ltd.
*/
#include <string.h>
#include <unistd.h>
#include <rte_bus.h>
#include <rte_bus_pci.h>
#include <rte_common.h>
#include <rte_eal.h>
#include <rte_lcore.h>
#include <rte_mempool.h>
#include <rte_pci.h>
#include <rte_dmadev.h>
#include <rte_dmadev_pmd.h>
#include <roc_api.h>
#include <cnxk_dmadev.h>
static int
cnxk_dmadev_probe(struct rte_pci_driver *pci_drv __rte_unused,
struct rte_pci_device *pci_dev)
{
struct cnxk_dpi_vf_s *dpivf = NULL;
char name[RTE_DEV_NAME_MAX_LEN];
struct rte_dma_dev *dmadev;
struct roc_dpi *rdpi = NULL;
int rc;
if (!pci_dev->mem_resource[0].addr)
return -ENODEV;
rc = roc_plt_init();
if (rc) {
plt_err("Failed to initialize platform model, rc=%d", rc);
return rc;
}
memset(name, 0, sizeof(name));
rte_pci_device_name(&pci_dev->addr, name, sizeof(name));
dmadev = rte_dma_pmd_allocate(name, pci_dev->device.numa_node,
sizeof(*dpivf));
if (dmadev == NULL) {
plt_err("dma device allocation failed for %s", name);
return -ENOMEM;
}
dpivf = dmadev->data->dev_private;
dmadev->device = &pci_dev->device;
dmadev->fp_obj->dev_private = dpivf;
rdpi = &dpivf->rdpi;
rdpi->pci_dev = pci_dev;
rc = roc_dpi_dev_init(rdpi);
if (rc < 0)
goto err_out_free;
return 0;
err_out_free:
if (dmadev)
rte_dma_pmd_release(name);
return rc;
}
static int
cnxk_dmadev_remove(struct rte_pci_device *pci_dev)
{
char name[RTE_DEV_NAME_MAX_LEN];
memset(name, 0, sizeof(name));
rte_pci_device_name(&pci_dev->addr, name, sizeof(name));
return rte_dma_pmd_release(name);
}
static const struct rte_pci_id cnxk_dma_pci_map[] = {
{
RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
PCI_DEVID_CNXK_DPI_VF)
},
{
.vendor_id = 0,
},
};
static struct rte_pci_driver cnxk_dmadev = {
.id_table = cnxk_dma_pci_map,
.drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_NEED_IOVA_AS_VA,
.probe = cnxk_dmadev_probe,
.remove = cnxk_dmadev_remove,
};
RTE_PMD_REGISTER_PCI(cnxk_dmadev_pci_driver, cnxk_dmadev);
RTE_PMD_REGISTER_PCI_TABLE(cnxk_dmadev_pci_driver, cnxk_dma_pci_map);
RTE_PMD_REGISTER_KMOD_DEP(cnxk_dmadev_pci_driver, "vfio-pci");

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@ -0,0 +1,11 @@
/* SPDX-License-Identifier: BSD-3-Clause
* Copyright(C) 2021 Marvell International Ltd.
*/
#ifndef CNXK_DMADEV_H
#define CNXK_DMADEV_H
struct cnxk_dpi_vf_s {
struct roc_dpi rdpi;
};
#endif

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@ -0,0 +1,6 @@
# SPDX-License-Identifier: BSD-3-Clause
# Copyright(C) 2021 Marvell International Ltd.
deps += ['bus_pci', 'common_cnxk', 'dmadev']
sources = files('cnxk_dmadev.c')
headers = files('cnxk_dmadev.h')

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@ -0,0 +1,3 @@
DPDK_22 {
local: *;
};

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@ -2,6 +2,7 @@
# Copyright 2021 HiSilicon Limited
drivers = [
'cnxk',
'hisilicon',
'idxd',
'ioat',