dma/cnxk: create and initialize device on PCI probing
This patch creates and initializes a dmadev device on pci probe. Signed-off-by: Radha Mohan Chintakuntla <radhac@marvell.com>
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@ -1211,6 +1211,12 @@ M: Chengwen Feng <fengchengwen@huawei.com>
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F: drivers/dma/hisilicon/
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F: doc/guides/dmadevs/hisilicon.rst
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Marvell CNXK DPI DMA
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M: Radha Mohan Chintakuntla <radhac@marvell.com>
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M: Veerasenareddy Burru <vburru@marvell.com>
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F: drivers/dma/cnxk/
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F: doc/guides/dmadevs/cnxk.rst
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RegEx Drivers
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-------------
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44
doc/guides/dmadevs/cnxk.rst
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44
doc/guides/dmadevs/cnxk.rst
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.. SPDX-License-Identifier: BSD-3-Clause
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Copyright(c) 2021 Marvell International Ltd.
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.. include:: <isonum.txt>
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CNXK DMA Device Driver
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======================
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The ``cnxk`` dmadev driver provides a poll-mode driver (PMD) for Marvell DPI DMA
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Hardware Accelerator block found in OCTEONTX2 and OCTEONTX3 family of SoCs.
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Each DMA queue is exposed as a VF function when SRIOV is enabled.
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The block supports following modes of DMA transfers:
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#. Internal - DMA within SoC DRAM to DRAM
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#. Inbound - Host DRAM to SoC DRAM when SoC is in PCIe Endpoint
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#. Outbound - SoC DRAM to Host DRAM when SoC is in PCIe Endpoint
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Prerequisites and Compilation procedure
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---------------------------------------
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See :doc:`../platform/cnxk` for setup information.
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Device Setup
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-------------
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The ``dpdk-devbind.py`` script, included with DPDK,
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can be used to show the presence of supported hardware.
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Running ``dpdk-devbind.py --status-dev dma`` will show all the CNXK DMA devices.
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Devices using VFIO drivers
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~~~~~~~~~~~~~~~~~~~~~~~~~~
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The HW devices to be used will need to be bound to a user-space IO driver for use.
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The ``dpdk-devbind.py`` script can be used to view the state of the devices
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and to bind them to a suitable DPDK-supported driver, such as ``vfio-pci``.
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For example::
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$ dpdk-devbind.py -b vfio-pci 0000:05:00.1
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Device Probing and Initialization
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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To use the devices from an application, the dmadev API can be used.
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@ -11,6 +11,7 @@ an application through DMA API.
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:maxdepth: 2
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:numbered:
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cnxk
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hisilicon
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idxd
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ioat
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@ -62,7 +62,7 @@ DPDK subsystem.
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+---+-----+--------------------------------------------------------------+
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| 7 | LBK | rte_ethdev |
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+---+-----+--------------------------------------------------------------+
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| 8 | DPI | rte_rawdev |
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| 8 | DPI | rte_dmadev |
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+---+-----+--------------------------------------------------------------+
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| 9 | SDP | rte_ethdev |
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+---+-----+--------------------------------------------------------------+
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@ -153,6 +153,9 @@ This section lists dataplane H/W block(s) available in cnxk SoC.
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#. **Baseband PHY Driver**
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See :doc:`../rawdevs/cnxk_bphy` for Baseband PHY driver information.
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#. **Dmadev Driver**
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See :doc:`../dmadevs/cnxk` for DPI Dmadev driver information.
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Procedure to Setup Platform
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---------------------------
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@ -91,6 +91,11 @@ New Features
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driver for Intel IOAT devices such as Crystal Beach DMA (CBDMA) on Ice Lake,
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Skylake and Broadwell. This device driver can be used through the generic dmadev API.
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* **Added Marvell CNXK DMA driver.**
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Added dmadev driver for the DPI DMA hardware accelerator
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of Marvell OCTEONTX2 and OCTEONTX3 family of SoCs.
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* **Added support to get all MAC addresses of a device.**
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Added ``rte_eth_macaddrs_get`` to allow user to retrieve all Ethernet
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100
drivers/dma/cnxk/cnxk_dmadev.c
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100
drivers/dma/cnxk/cnxk_dmadev.c
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/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright (C) 2021 Marvell International Ltd.
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*/
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#include <string.h>
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#include <unistd.h>
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#include <rte_bus.h>
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#include <rte_bus_pci.h>
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#include <rte_common.h>
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#include <rte_eal.h>
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#include <rte_lcore.h>
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#include <rte_mempool.h>
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#include <rte_pci.h>
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#include <rte_dmadev.h>
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#include <rte_dmadev_pmd.h>
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#include <roc_api.h>
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#include <cnxk_dmadev.h>
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static int
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cnxk_dmadev_probe(struct rte_pci_driver *pci_drv __rte_unused,
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struct rte_pci_device *pci_dev)
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{
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struct cnxk_dpi_vf_s *dpivf = NULL;
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char name[RTE_DEV_NAME_MAX_LEN];
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struct rte_dma_dev *dmadev;
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struct roc_dpi *rdpi = NULL;
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int rc;
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if (!pci_dev->mem_resource[0].addr)
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return -ENODEV;
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rc = roc_plt_init();
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if (rc) {
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plt_err("Failed to initialize platform model, rc=%d", rc);
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return rc;
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}
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memset(name, 0, sizeof(name));
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rte_pci_device_name(&pci_dev->addr, name, sizeof(name));
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dmadev = rte_dma_pmd_allocate(name, pci_dev->device.numa_node,
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sizeof(*dpivf));
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if (dmadev == NULL) {
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plt_err("dma device allocation failed for %s", name);
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return -ENOMEM;
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}
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dpivf = dmadev->data->dev_private;
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dmadev->device = &pci_dev->device;
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dmadev->fp_obj->dev_private = dpivf;
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rdpi = &dpivf->rdpi;
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rdpi->pci_dev = pci_dev;
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rc = roc_dpi_dev_init(rdpi);
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if (rc < 0)
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goto err_out_free;
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return 0;
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err_out_free:
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if (dmadev)
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rte_dma_pmd_release(name);
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return rc;
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}
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static int
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cnxk_dmadev_remove(struct rte_pci_device *pci_dev)
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{
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char name[RTE_DEV_NAME_MAX_LEN];
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memset(name, 0, sizeof(name));
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rte_pci_device_name(&pci_dev->addr, name, sizeof(name));
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return rte_dma_pmd_release(name);
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}
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static const struct rte_pci_id cnxk_dma_pci_map[] = {
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{
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RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
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PCI_DEVID_CNXK_DPI_VF)
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},
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{
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.vendor_id = 0,
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},
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};
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static struct rte_pci_driver cnxk_dmadev = {
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.id_table = cnxk_dma_pci_map,
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.drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_NEED_IOVA_AS_VA,
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.probe = cnxk_dmadev_probe,
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.remove = cnxk_dmadev_remove,
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};
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RTE_PMD_REGISTER_PCI(cnxk_dmadev_pci_driver, cnxk_dmadev);
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RTE_PMD_REGISTER_PCI_TABLE(cnxk_dmadev_pci_driver, cnxk_dma_pci_map);
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RTE_PMD_REGISTER_KMOD_DEP(cnxk_dmadev_pci_driver, "vfio-pci");
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11
drivers/dma/cnxk/cnxk_dmadev.h
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11
drivers/dma/cnxk/cnxk_dmadev.h
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/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(C) 2021 Marvell International Ltd.
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*/
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#ifndef CNXK_DMADEV_H
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#define CNXK_DMADEV_H
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struct cnxk_dpi_vf_s {
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struct roc_dpi rdpi;
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};
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#endif
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6
drivers/dma/cnxk/meson.build
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6
drivers/dma/cnxk/meson.build
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# SPDX-License-Identifier: BSD-3-Clause
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# Copyright(C) 2021 Marvell International Ltd.
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deps += ['bus_pci', 'common_cnxk', 'dmadev']
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sources = files('cnxk_dmadev.c')
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headers = files('cnxk_dmadev.h')
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3
drivers/dma/cnxk/version.map
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3
drivers/dma/cnxk/version.map
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DPDK_22 {
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local: *;
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};
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# Copyright 2021 HiSilicon Limited
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drivers = [
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'cnxk',
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'hisilicon',
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'idxd',
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'ioat',
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