net/qede: fix scatter-gather
- Make qede_process_sg_pkts() inline and add unlikely check
- Fix mbuf segment chaining logic in qede_process_sg_pkts()
- Change qede_encode_sg_bd() to return total segments required
- Fix first TX buffer descriptor's length
- Replace repetitive code using a macro
Fixes: bec0228816
("net/qede: support scatter gather")
Signed-off-by: Harish Patil <harish.patil@qlogic.com>
This commit is contained in:
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14c66a451e
commit
54ecae2e19
@ -810,39 +810,28 @@ static inline uint32_t qede_rx_cqe_to_tunn_pkt_type(uint16_t flags)
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return RTE_PTYPE_UNKNOWN;
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}
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int qede_process_sg_pkts(void *p_rxq, struct rte_mbuf *rx_mb,
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int num_segs, uint16_t pkt_len)
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static inline int
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qede_process_sg_pkts(void *p_rxq, struct rte_mbuf *rx_mb,
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uint8_t num_segs, uint16_t pkt_len)
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{
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struct qede_rx_queue *rxq = p_rxq;
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struct qede_dev *qdev = rxq->qdev;
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struct ecore_dev *edev = &qdev->edev;
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uint16_t sw_rx_index, cur_size;
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register struct rte_mbuf *seg1 = NULL;
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register struct rte_mbuf *seg2 = NULL;
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uint16_t sw_rx_index;
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uint16_t cur_size;
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seg1 = rx_mb;
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while (num_segs) {
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cur_size = pkt_len > rxq->rx_buf_size ?
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rxq->rx_buf_size : pkt_len;
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if (!cur_size) {
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PMD_RX_LOG(DEBUG, rxq,
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"SG packet, len and num BD mismatch\n");
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cur_size = pkt_len > rxq->rx_buf_size ? rxq->rx_buf_size :
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pkt_len;
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if (unlikely(!cur_size)) {
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PMD_RX_LOG(ERR, rxq, "Length is 0 while %u BDs"
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" left for mapping jumbo\n", num_segs);
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qede_recycle_rx_bd_ring(rxq, qdev, num_segs);
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return -EINVAL;
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}
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if (qede_alloc_rx_buffer(rxq)) {
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uint8_t index;
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PMD_RX_LOG(DEBUG, rxq, "Buffer allocation failed\n");
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index = rxq->port_id;
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rte_eth_devices[index].data->rx_mbuf_alloc_failed++;
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rxq->rx_alloc_errors++;
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return -ENOMEM;
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}
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sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS(rxq);
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seg2 = rxq->sw_rx_ring[sw_rx_index].mbuf;
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qede_rx_bd_ring_consume(rxq);
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@ -852,16 +841,9 @@ int qede_process_sg_pkts(void *p_rxq, struct rte_mbuf *rx_mb,
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seg1 = seg1->next;
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num_segs--;
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rxq->rx_segs++;
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continue;
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}
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seg1 = NULL;
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if (pkt_len)
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PMD_RX_LOG(DEBUG, rxq,
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"Mapped all BDs of jumbo, but still have %d bytes\n",
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pkt_len);
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return ECORE_SUCCESS;
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return 0;
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}
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uint16_t
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@ -878,11 +860,16 @@ qede_recv_pkts(void *p_rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
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register struct rte_mbuf *rx_mb = NULL;
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register struct rte_mbuf *seg1 = NULL;
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enum eth_rx_cqe_type cqe_type;
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uint16_t len, pad, preload_idx, pkt_len, parse_flag;
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uint8_t csum_flag, num_segs;
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uint16_t pkt_len; /* Sum of all BD segments */
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uint16_t len; /* Length of first BD */
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uint8_t num_segs = 1;
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uint16_t pad;
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uint16_t preload_idx;
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uint8_t csum_flag;
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uint16_t parse_flag;
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enum rss_hash_type htype;
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uint8_t tunn_parse_flag;
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int ret;
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uint8_t j;
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hw_comp_cons = rte_le_to_cpu_16(*rxq->hw_cons_ptr);
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sw_comp_cons = ecore_chain_get_cons_idx(&rxq->rx_comp_ring);
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@ -915,6 +902,7 @@ qede_recv_pkts(void *p_rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
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fp_cqe = &cqe->fast_path_regular;
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len = rte_le_to_cpu_16(fp_cqe->len_on_first_bd);
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pkt_len = rte_le_to_cpu_16(fp_cqe->pkt_len);
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pad = fp_cqe->placement_offset;
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assert((len + pad) <= rx_mb->buf_len);
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@ -979,25 +967,29 @@ qede_recv_pkts(void *p_rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
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rxq->rx_alloc_errors++;
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break;
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}
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qede_rx_bd_ring_consume(rxq);
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if (fp_cqe->bd_num > 1) {
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pkt_len = rte_le_to_cpu_16(fp_cqe->pkt_len);
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PMD_RX_LOG(DEBUG, rxq, "Jumbo-over-BD packet: %02x BDs"
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" len on first: %04x Total Len: %04x\n",
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fp_cqe->bd_num, len, pkt_len);
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num_segs = fp_cqe->bd_num - 1;
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rxq->rx_segs++;
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pkt_len -= len;
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seg1 = rx_mb;
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ret = qede_process_sg_pkts(p_rxq, seg1, num_segs,
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pkt_len);
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if (ret != ECORE_SUCCESS) {
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qede_recycle_rx_bd_ring(rxq, qdev,
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fp_cqe->bd_num);
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if (qede_process_sg_pkts(p_rxq, seg1, num_segs,
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pkt_len - len))
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goto next_cqe;
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for (j = 0; j < num_segs; j++) {
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if (qede_alloc_rx_buffer(rxq)) {
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PMD_RX_LOG(ERR, rxq,
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"Buffer allocation failed\n");
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rte_eth_devices[rxq->port_id].
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data->rx_mbuf_alloc_failed++;
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rxq->rx_alloc_errors++;
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break;
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}
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rxq->rx_segs++;
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}
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}
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rxq->rx_segs++; /* for the first segment */
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/* Prefetch next mbuf while processing current one. */
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preload_idx = rxq->sw_rx_cons & NUM_RX_BDS(rxq);
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@ -1007,7 +999,7 @@ qede_recv_pkts(void *p_rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
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rx_mb->data_off = pad + RTE_PKTMBUF_HEADROOM;
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rx_mb->nb_segs = fp_cqe->bd_num;
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rx_mb->data_len = len;
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rx_mb->pkt_len = fp_cqe->pkt_len;
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rx_mb->pkt_len = pkt_len;
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rx_mb->port = rxq->port_id;
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htype = (uint8_t)GET_FIELD(fp_cqe->bitfields,
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@ -1114,17 +1106,16 @@ qede_process_tx_compl(struct ecore_dev *edev, struct qede_tx_queue *txq)
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}
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/* Populate scatter gather buffer descriptor fields */
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static inline uint16_t qede_encode_sg_bd(struct qede_tx_queue *p_txq,
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struct rte_mbuf *m_seg,
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uint16_t count,
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struct eth_tx_1st_bd *bd1)
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static inline uint8_t
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qede_encode_sg_bd(struct qede_tx_queue *p_txq, struct rte_mbuf *m_seg,
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struct eth_tx_1st_bd *bd1)
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{
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struct qede_tx_queue *txq = p_txq;
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struct eth_tx_2nd_bd *bd2 = NULL;
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struct eth_tx_3rd_bd *bd3 = NULL;
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struct eth_tx_bd *tx_bd = NULL;
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uint16_t nb_segs = count;
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dma_addr_t mapping;
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uint8_t nb_segs = 1; /* min one segment per packet */
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/* Check for scattered buffers */
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while (m_seg) {
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@ -1133,28 +1124,27 @@ static inline uint16_t qede_encode_sg_bd(struct qede_tx_queue *p_txq,
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ecore_chain_produce(&txq->tx_pbl);
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memset(bd2, 0, sizeof(*bd2));
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mapping = rte_mbuf_data_dma_addr(m_seg);
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bd2->addr.hi = rte_cpu_to_le_32(U64_HI(mapping));
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bd2->addr.lo = rte_cpu_to_le_32(U64_LO(mapping));
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bd2->nbytes = rte_cpu_to_le_16(m_seg->data_len);
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QEDE_BD_SET_ADDR_LEN(bd2, mapping, m_seg->data_len);
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PMD_TX_LOG(DEBUG, txq, "BD2 len %04x\n",
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m_seg->data_len);
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} else if (nb_segs == 2) {
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bd3 = (struct eth_tx_3rd_bd *)
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ecore_chain_produce(&txq->tx_pbl);
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memset(bd3, 0, sizeof(*bd3));
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mapping = rte_mbuf_data_dma_addr(m_seg);
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bd3->addr.hi = rte_cpu_to_le_32(U64_HI(mapping));
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bd3->addr.lo = rte_cpu_to_le_32(U64_LO(mapping));
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bd3->nbytes = rte_cpu_to_le_16(m_seg->data_len);
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QEDE_BD_SET_ADDR_LEN(bd3, mapping, m_seg->data_len);
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PMD_TX_LOG(DEBUG, txq, "BD3 len %04x\n",
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m_seg->data_len);
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} else {
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tx_bd = (struct eth_tx_bd *)
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ecore_chain_produce(&txq->tx_pbl);
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memset(tx_bd, 0, sizeof(*tx_bd));
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mapping = rte_mbuf_data_dma_addr(m_seg);
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tx_bd->addr.hi = rte_cpu_to_le_32(U64_HI(mapping));
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tx_bd->addr.lo = rte_cpu_to_le_32(U64_LO(mapping));
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tx_bd->nbytes = rte_cpu_to_le_16(m_seg->data_len);
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QEDE_BD_SET_ADDR_LEN(tx_bd, mapping, m_seg->data_len);
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PMD_TX_LOG(DEBUG, txq, "BD len %04x\n",
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m_seg->data_len);
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}
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nb_segs++;
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bd1->data.nbds = nb_segs;
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m_seg = m_seg->next;
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}
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@ -1170,13 +1160,14 @@ qede_xmit_pkts(void *p_txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
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struct ecore_dev *edev = &qdev->edev;
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struct qede_fastpath *fp;
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struct eth_tx_1st_bd *bd1;
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struct rte_mbuf *mbuf;
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struct rte_mbuf *m_seg = NULL;
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uint16_t nb_tx_pkts;
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uint16_t nb_pkt_sent = 0;
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uint16_t bd_prod;
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uint16_t idx;
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uint16_t tx_count;
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uint16_t nb_segs = 0;
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uint16_t nb_frags;
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uint16_t nb_pkt_sent = 0;
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fp = &qdev->fp_array[QEDE_RSS_COUNT(qdev) + txq->queue_id];
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@ -1198,19 +1189,19 @@ qede_xmit_pkts(void *p_txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
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while (nb_tx_pkts--) {
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/* Fill the entry in the SW ring and the BDs in the FW ring */
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idx = TX_PROD(txq);
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struct rte_mbuf *mbuf = *tx_pkts++;
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mbuf = *tx_pkts++;
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txq->sw_tx_ring[idx].mbuf = mbuf;
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bd1 = (struct eth_tx_1st_bd *)ecore_chain_produce(&txq->tx_pbl);
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/* Zero init struct fields */
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bd1->data.bd_flags.bitfields = 0;
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bd1->data.bitfields = 0;
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bd1->data.bd_flags.bitfields =
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1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
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/* FW 8.10.x specific change */
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bd1->data.bitfields =
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(mbuf->pkt_len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK)
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<< ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
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/* Map MBUF linear data for DMA and set in the first BD */
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QEDE_BD_SET_ADDR_LEN(bd1, rte_mbuf_data_dma_addr(mbuf),
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mbuf->pkt_len);
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mbuf->data_len);
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PMD_TX_LOG(INFO, txq, "BD1 len %04x\n", mbuf->data_len);
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if (RTE_ETH_IS_TUNNEL_PKT(mbuf->packet_type)) {
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PMD_TX_LOG(INFO, txq, "Tx tunnel packet\n");
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@ -1267,18 +1258,18 @@ qede_xmit_pkts(void *p_txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
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/* Handle fragmented MBUF */
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m_seg = mbuf->next;
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nb_segs++;
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bd1->data.nbds = nb_segs;
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/* Encode scatter gather buffer descriptors if required */
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nb_segs = qede_encode_sg_bd(txq, m_seg, nb_segs, bd1);
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txq->nb_tx_avail = txq->nb_tx_avail - nb_segs;
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nb_segs = 0;
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nb_frags = qede_encode_sg_bd(txq, m_seg, bd1);
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bd1->data.nbds = nb_frags;
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txq->nb_tx_avail -= nb_frags;
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txq->sw_tx_prod++;
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rte_prefetch0(txq->sw_tx_ring[TX_PROD(txq)].mbuf);
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bd_prod =
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rte_cpu_to_le_16(ecore_chain_get_prod_idx(&txq->tx_pbl));
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nb_pkt_sent++;
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txq->xmit_pkts++;
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PMD_TX_LOG(INFO, txq, "nbds = %d pkt_len = %04x\n",
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bd1->data.nbds, mbuf->pkt_len);
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}
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/* Write value of prod idx into bd_prod */
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@ -41,10 +41,6 @@
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(bd)->addr.hi = rte_cpu_to_le_32(U64_HI(maddr)); \
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(bd)->addr.lo = rte_cpu_to_le_32(U64_LO(maddr)); \
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(bd)->nbytes = rte_cpu_to_le_16(len); \
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/* FW 8.10.x specific change */ \
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(bd)->data.bitfields = ((len) & \
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ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) \
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<< ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT; \
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} while (0)
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#define CQE_HAS_VLAN(flags) \
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