net/ixgbe: support committing TM hierarchy
Add the support of the Traffic Management API, rte_tm_hierarchy_commit. When calling this API, the driver tries to enable the TM configuration on HW. Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
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cb2ffec595
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5713ade697
@ -304,9 +304,6 @@ static void ixgbe_set_ivar_map(struct ixgbe_hw *hw, int8_t direction,
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uint8_t queue, uint8_t msix_vector);
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static void ixgbe_configure_msix(struct rte_eth_dev *dev);
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static int ixgbe_set_queue_rate_limit(struct rte_eth_dev *dev,
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uint16_t queue_idx, uint16_t tx_rate);
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static int ixgbevf_add_mac_addr(struct rte_eth_dev *dev,
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struct ether_addr *mac_addr,
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uint32_t index, uint32_t pool);
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@ -2503,6 +2500,8 @@ ixgbe_dev_start(struct rte_eth_dev *dev)
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int status;
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uint16_t vf, idx;
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uint32_t *link_speeds;
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struct ixgbe_tm_conf *tm_conf =
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IXGBE_DEV_PRIVATE_TO_TM_CONF(dev->data->dev_private);
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PMD_INIT_FUNC_TRACE();
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@ -2693,6 +2692,11 @@ ixgbe_dev_start(struct rte_eth_dev *dev)
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ixgbe_l2_tunnel_conf(dev);
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ixgbe_filter_restore(dev);
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if (!tm_conf->committed)
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PMD_DRV_LOG(WARNING,
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"please call hierarchy_commit() "
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"before starting the port");
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return 0;
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error:
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@ -5733,8 +5737,9 @@ ixgbe_configure_msix(struct rte_eth_dev *dev)
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IXGBE_WRITE_REG(hw, IXGBE_EIAC, mask);
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}
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static int ixgbe_set_queue_rate_limit(struct rte_eth_dev *dev,
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uint16_t queue_idx, uint16_t tx_rate)
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int
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ixgbe_set_queue_rate_limit(struct rte_eth_dev *dev,
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uint16_t queue_idx, uint16_t tx_rate)
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{
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struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
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uint32_t rf_dec, rf_int;
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@ -742,6 +742,8 @@ bool is_ixgbe_supported(struct rte_eth_dev *dev);
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int ixgbe_tm_ops_get(struct rte_eth_dev *dev, void *ops);
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void ixgbe_tm_conf_init(struct rte_eth_dev *dev);
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void ixgbe_tm_conf_uninit(struct rte_eth_dev *dev);
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int ixgbe_set_queue_rate_limit(struct rte_eth_dev *dev, uint16_t queue_idx,
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uint16_t tx_rate);
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static inline int
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ixgbe_ethertype_filter_lookup(struct ixgbe_filter_info *filter_info,
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@ -62,6 +62,9 @@ static int ixgbe_node_capabilities_get(struct rte_eth_dev *dev,
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uint32_t node_id,
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struct rte_tm_node_capabilities *cap,
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struct rte_tm_error *error);
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static int ixgbe_hierarchy_commit(struct rte_eth_dev *dev,
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int clear_on_fail,
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struct rte_tm_error *error);
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const struct rte_tm_ops ixgbe_tm_ops = {
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.capabilities_get = ixgbe_tm_capabilities_get,
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@ -72,6 +75,7 @@ const struct rte_tm_ops ixgbe_tm_ops = {
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.node_type_get = ixgbe_node_type_get,
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.level_capabilities_get = ixgbe_level_capabilities_get,
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.node_capabilities_get = ixgbe_node_capabilities_get,
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.hierarchy_commit = ixgbe_hierarchy_commit,
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};
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int
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@ -974,3 +978,68 @@ ixgbe_node_capabilities_get(struct rte_eth_dev *dev,
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return 0;
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}
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static int
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ixgbe_hierarchy_commit(struct rte_eth_dev *dev,
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int clear_on_fail,
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struct rte_tm_error *error)
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{
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struct ixgbe_tm_conf *tm_conf =
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IXGBE_DEV_PRIVATE_TO_TM_CONF(dev->data->dev_private);
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struct ixgbe_tm_node *tm_node;
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uint64_t bw;
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int ret;
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if (!error)
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return -EINVAL;
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/* check the setting */
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if (!tm_conf->root)
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goto done;
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/* not support port max bandwidth yet */
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if (tm_conf->root->shaper_profile->profile.peak.rate) {
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error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE;
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error->message = "no port max bandwidth";
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goto fail_clear;
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}
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/* HW not support TC max bandwidth */
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TAILQ_FOREACH(tm_node, &tm_conf->tc_list, node) {
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if (tm_node->shaper_profile->profile.peak.rate) {
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error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE;
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error->message = "no TC max bandwidth";
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goto fail_clear;
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}
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}
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/* queue max bandwidth */
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TAILQ_FOREACH(tm_node, &tm_conf->queue_list, node) {
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bw = tm_node->shaper_profile->profile.peak.rate;
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if (bw) {
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/* interpret Bps to Mbps */
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bw = bw * 8 / 1000 / 1000;
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ret = ixgbe_set_queue_rate_limit(dev, tm_node->no, bw);
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if (ret) {
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error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE;
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error->message =
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"failed to set queue max bandwidth";
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goto fail_clear;
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}
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}
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}
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goto done;
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done:
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tm_conf->committed = true;
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return 0;
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fail_clear:
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/* clear all the traffic manager configuration */
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if (clear_on_fail) {
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ixgbe_tm_conf_uninit(dev);
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ixgbe_tm_conf_init(dev);
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}
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return -EINVAL;
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}
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