dma/dpaa: introduce DPAA DMA driver skeleton

The DPAA DMA  driver is an implementation of the dmadev APIs,
that provide means to initiate a DMA transaction from CPU.
The initiated DMA is performed without CPU being involved
in the actual DMA transaction. This is achieved via using
the QDMA controller of DPAA SoC.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>

MAINTAINERS

@@ -1224,6 +1224,12 @@ M: Veerasenareddy Burru <vburru@marvell.com>
 F: drivers/dma/cnxk/
 F: doc/guides/dmadevs/cnxk.rst
 
+NXP DPAA DMA
+M: Gagandeep Singh <g.singh@nxp.com>
+M: Nipun Gupta <nipun.gupta@nxp.com>
+F: drivers/dma/dpaa/
+F: doc/guides/dmadevs/dpaa.rst
+
 
 RegEx Drivers
 -------------

doc/guides/dmadevs/dpaa.rst

@@ -0,0 +1,55 @@
+..  SPDX-License-Identifier: BSD-3-Clause
+    Copyright 2021 NXP
+
+NXP DPAA DMA Driver
+===================
+
+The DPAA DMA is an implementation of the dmadev APIs,
+that provide means to initiate a DMA transaction from CPU.
+The initiated DMA is performed without CPU being involved
+in the actual DMA transaction.
+This is achieved via using the QDMA controller of DPAA SoC.
+
+The QDMA controller transfers blocks of data
+between one source and one destination.
+The blocks of data transferred can be represented in memory
+as contiguous or noncontiguous using scatter/gather table(s).
+
+More information can be found at `NXP Official Website
+<http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/qoriq-arm-processors:QORIQ-ARM>`_.
+
+Supported DPAA SoCs
+-------------------
+
+- LS1046A
+- LS1043A
+
+Prerequisites
+-------------
+
+See :doc:`../platform/dpaa` for setup information
+
+- Follow the DPDK :ref:`Getting Started Guide for Linux <linux_gsg>` to setup the basic DPDK environment.
+
+.. note::
+
+   Some part of dpaa bus code (qbman and fman - library) routines are
+   dual licensed (BSD & GPLv2), however they are used as BSD in DPDK in userspace.
+
+Compilation
+-----------
+
+For builds using ``meson`` and ``ninja``, the driver will be built when the
+target platform is dpaa-based. No additional compilation steps are necessary.
+
+Initialization
+--------------
+
+On EAL initialization, DPAA DMA devices will be detected on DPAA bus and
+will be probed and populated into their device list.
+
+Platform Requirement
+--------------------
+
+DPAA DMA driver for DPDK can only work on NXP SoCs
+as listed in the `Supported DPAA SoCs`_.

doc/guides/dmadevs/index.rst

@@ -12,6 +12,7 @@ an application through DMA API.
    :numbered:
 
    cnxk
+   dpaa
    hisilicon
    idxd
    ioat

doc/guides/rel_notes/release_21_11.rst

@@ -96,6 +96,10 @@ New Features
   Added dmadev driver for the DPI DMA hardware accelerator
   of Marvell OCTEONTX2 and OCTEONTX3 family of SoCs.
 
+* **Added NXP DPAA DMA driver.**
+
+  Added a new dmadev driver for NXP DPAA platform.
+
 * **Added support to get all MAC addresses of a device.**
 
   Added ``rte_eth_macaddrs_get`` to allow user to retrieve all Ethernet

drivers/bus/dpaa/dpaa_bus.c

@@ -250,6 +250,28 @@ dpaa_create_device_list(void)
 
 	rte_dpaa_bus.device_count += i;
 
+	/* Creating QDMA Device */
+	for (i = 0; i < RTE_DPAA_QDMA_DEVICES; i++) {
+		dev = calloc(1, sizeof(struct rte_dpaa_device));
+		if (!dev) {
+			DPAA_BUS_LOG(ERR, "Failed to allocate QDMA device");
+			ret = -1;
+			goto cleanup;
+		}
+
+		dev->device_type = FSL_DPAA_QDMA;
+		dev->id.dev_id = rte_dpaa_bus.device_count + i;
+
+		memset(dev->name, 0, RTE_ETH_NAME_MAX_LEN);
+		sprintf(dev->name, "dpaa_qdma-%d", i+1);
+		DPAA_BUS_LOG(INFO, "%s qdma device added", dev->name);
+		dev->device.name = dev->name;
+		dev->device.devargs = dpaa_devargs_lookup(dev);
+
+		dpaa_add_to_device_list(dev);
+	}
+	rte_dpaa_bus.device_count += i;
+
 	return 0;
 
 cleanup:

drivers/bus/dpaa/rte_dpaa_bus.h

@@ -58,6 +58,9 @@ dpaa_seqn(struct rte_mbuf *mbuf)
 /** Device driver supports link state interrupt */
 #define RTE_DPAA_DRV_INTR_LSC  0x0008
 
+/** Number of supported QDMA devices */
+#define RTE_DPAA_QDMA_DEVICES  1
+
 #define RTE_DEV_TO_DPAA_CONST(ptr) \
 	container_of(ptr, const struct rte_dpaa_device, device)
 
@@ -73,6 +76,7 @@ TAILQ_HEAD(rte_dpaa_driver_list, rte_dpaa_driver);
 enum rte_dpaa_type {
 	FSL_DPAA_ETH = 1,
 	FSL_DPAA_CRYPTO,
+	FSL_DPAA_QDMA
 };
 
 struct rte_dpaa_bus {
@@ -95,6 +99,7 @@ struct rte_dpaa_device {
 	union {
 		struct rte_eth_dev *eth_dev;
 		struct rte_cryptodev *crypto_dev;
+		struct rte_dma_dev *dmadev;
 	};
 	struct rte_dpaa_driver *driver;
 	struct dpaa_device_id id;

drivers/common/dpaax/dpaa_list.h

@@ -35,6 +35,8 @@ do { \
 	const struct list_head *__p298 = (p); \
 	((__p298->next == __p298) && (__p298->prev == __p298)); \
 })
+#define list_first_entry(ptr, type, member) \
+	list_entry((ptr)->next, type, member)
 #define list_add(p, l) \
 do { \
 	struct list_head *__p298 = (p); \

drivers/dma/dpaa/dpaa_qdma.c

@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2021 NXP
+ */
+
+#include <rte_dpaa_bus.h>
+
+static int
+dpaa_qdma_probe(__rte_unused struct rte_dpaa_driver *dpaa_drv,
+		__rte_unused struct rte_dpaa_device *dpaa_dev)
+{
+	return 0;
+}
+
+static int
+dpaa_qdma_remove(__rte_unused struct rte_dpaa_device *dpaa_dev)
+{
+	return 0;
+}
+
+static struct rte_dpaa_driver rte_dpaa_qdma_pmd;
+
+static struct rte_dpaa_driver rte_dpaa_qdma_pmd = {
+	.drv_type = FSL_DPAA_QDMA,
+	.probe = dpaa_qdma_probe,
+	.remove = dpaa_qdma_remove,
+};
+
+RTE_PMD_REGISTER_DPAA(dpaa_qdma, rte_dpaa_qdma_pmd);
+RTE_LOG_REGISTER_DEFAULT(dpaa_qdma_logtype, INFO);

drivers/dma/dpaa/dpaa_qdma_logs.h

@@ -0,0 +1,38 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2021 NXP
+ */
+
+#ifndef __DPAA_QDMA_LOGS_H__
+#define __DPAA_QDMA_LOGS_H__
+
+extern int dpaa_qdma_logtype;
+
+#define DPAA_QDMA_LOG(level, fmt, args...) \
+	rte_log(RTE_LOG_ ## level, dpaa_qdma_logtype, "dpaa_qdma: " \
+		fmt "\n", ## args)
+
+#define DPAA_QDMA_DEBUG(fmt, args...) \
+	rte_log(RTE_LOG_DEBUG, dpaa_qdma_logtype, "dpaa_qdma: %s(): " \
+		fmt "\n", __func__, ## args)
+
+#define DPAA_QDMA_FUNC_TRACE() DPAA_QDMA_DEBUG(">>")
+
+#define DPAA_QDMA_INFO(fmt, args...) \
+	DPAA_QDMA_LOG(INFO, fmt, ## args)
+#define DPAA_QDMA_ERR(fmt, args...) \
+	DPAA_QDMA_LOG(ERR, fmt, ## args)
+#define DPAA_QDMA_WARN(fmt, args...) \
+	DPAA_QDMA_LOG(WARNING, fmt, ## args)
+
+/* DP Logs, toggled out at compile time if level lower than current level */
+#define DPAA_QDMA_DP_LOG(level, fmt, args...) \
+	RTE_LOG_DP(level, PMD, "dpaa_qdma: " fmt "\n", ## args)
+
+#define DPAA_QDMA_DP_DEBUG(fmt, args...) \
+	DPAA_QDMA_DP_LOG(DEBUG, fmt, ## args)
+#define DPAA_QDMA_DP_INFO(fmt, args...) \
+	DPAA_QDMA_DP_LOG(INFO, fmt, ## args)
+#define DPAA_QDMA_DP_WARN(fmt, args...) \
+	DPAA_QDMA_DP_LOG(WARNING, fmt, ## args)
+
+#endif /* __DPAA_QDMA_LOGS_H__ */

drivers/dma/dpaa/meson.build

@@ -0,0 +1,14 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright 2021 NXP
+
+if not is_linux
+    build = false
+    reason = 'only supported on linux'
+endif
+
+deps += ['dmadev', 'bus_dpaa']
+sources = files('dpaa_qdma.c')
+
+if cc.has_argument('-Wno-pointer-arith')
+    cflags += '-Wno-pointer-arith'
+endif

drivers/dma/dpaa/version.map

@@ -0,0 +1,3 @@
+DPDK_22 {
+	local: *;
+};

drivers/dma/meson.build

@@ -3,6 +3,7 @@
 
 drivers = [
         'cnxk',
+        'dpaa',
         'hisilicon',
         'idxd',
         'ioat',