net/mlx4: split the definitions to the header file
Make priv_lock/priv_unlock functions and some other structs/defines visible from different source files by placing them into mlx4.h header. Signed-off-by: Vasily Philipov <vasilyf@mellanox.com> Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
This commit is contained in:
Vasily Philipov
Ferruh Yigit
parent
3fca2ab597
commit
58610cdde8
@ -1,8 +1,8 @@
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/*-
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* BSD LICENSE
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*
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* Copyright 2012-2015 6WIND S.A.
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* Copyright 2012 Mellanox.
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* Copyright 2012-2017 6WIND S.A.
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* Copyright 2012-2017 Mellanox.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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@ -58,20 +58,6 @@
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#include <linux/sockios.h>
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#include <fcntl.h>
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/* Verbs header. */
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/* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
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#ifdef PEDANTIC
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#pragma GCC diagnostic ignored "-Wpedantic"
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#endif
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#include <infiniband/verbs.h>
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#ifdef PEDANTIC
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#pragma GCC diagnostic error "-Wpedantic"
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#endif
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/* DPDK headers don't like -pedantic. */
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#ifdef PEDANTIC
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#pragma GCC diagnostic ignored "-Wpedantic"
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#endif
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#include <rte_ether.h>
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#include <rte_ethdev.h>
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#include <rte_dev.h>
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@ -86,9 +72,6 @@
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#include <rte_log.h>
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#include <rte_alarm.h>
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#include <rte_memory.h>
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#ifdef PEDANTIC
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#pragma GCC diagnostic error "-Wpedantic"
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#endif
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/* Generated configuration header. */
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#include "mlx4_autoconf.h"
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@ -96,21 +79,6 @@
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/* PMD header. */
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#include "mlx4.h"
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/* Runtime logging through RTE_LOG() is enabled when not in debugging mode.
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* Intermediate LOG_*() macros add the required end-of-line characters. */
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#ifndef NDEBUG
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#define INFO(...) DEBUG(__VA_ARGS__)
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#define WARN(...) DEBUG(__VA_ARGS__)
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#define ERROR(...) DEBUG(__VA_ARGS__)
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#else
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#define LOG__(level, m, ...) \
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RTE_LOG(level, PMD, MLX4_DRIVER_NAME ": " m "%c", __VA_ARGS__)
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#define LOG_(level, ...) LOG__(level, __VA_ARGS__, '\n')
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#define INFO(...) LOG_(INFO, __VA_ARGS__)
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#define WARN(...) LOG_(WARNING, __VA_ARGS__)
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#define ERROR(...) LOG_(ERR, __VA_ARGS__)
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#endif
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/* Convenience macros for accessing mbuf fields. */
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#define NEXT(m) ((m)->next)
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#define DATA_LEN(m) ((m)->data_len)
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@ -137,157 +105,6 @@ typedef union {
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(((val) & (from)) / ((from) / (to))) : \
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(((val) & (from)) * ((to) / (from))))
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struct mlx4_rxq_stats {
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unsigned int idx; /**< Mapping index. */
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#ifdef MLX4_PMD_SOFT_COUNTERS
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uint64_t ipackets; /**< Total of successfully received packets. */
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uint64_t ibytes; /**< Total of successfully received bytes. */
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#endif
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uint64_t idropped; /**< Total of packets dropped when RX ring full. */
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uint64_t rx_nombuf; /**< Total of RX mbuf allocation failures. */
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};
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struct mlx4_txq_stats {
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unsigned int idx; /**< Mapping index. */
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#ifdef MLX4_PMD_SOFT_COUNTERS
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uint64_t opackets; /**< Total of successfully sent packets. */
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uint64_t obytes; /**< Total of successfully sent bytes. */
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#endif
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uint64_t odropped; /**< Total of packets not sent when TX ring full. */
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};
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/* RX element (scattered packets). */
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struct rxq_elt_sp {
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struct ibv_recv_wr wr; /* Work Request. */
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struct ibv_sge sges[MLX4_PMD_SGE_WR_N]; /* Scatter/Gather Elements. */
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struct rte_mbuf *bufs[MLX4_PMD_SGE_WR_N]; /* SGEs buffers. */
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};
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/* RX element. */
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struct rxq_elt {
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struct ibv_recv_wr wr; /* Work Request. */
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struct ibv_sge sge; /* Scatter/Gather Element. */
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/* mbuf pointer is derived from WR_ID(wr.wr_id).offset. */
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};
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/* RX queue descriptor. */
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struct rxq {
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struct priv *priv; /* Back pointer to private data. */
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struct rte_mempool *mp; /* Memory Pool for allocations. */
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struct ibv_mr *mr; /* Memory Region (for mp). */
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struct ibv_cq *cq; /* Completion Queue. */
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struct ibv_qp *qp; /* Queue Pair. */
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struct ibv_exp_qp_burst_family *if_qp; /* QP burst interface. */
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struct ibv_exp_cq_family *if_cq; /* CQ interface. */
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/*
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* Each VLAN ID requires a separate flow steering rule.
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*/
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BITFIELD_DECLARE(mac_configured, uint32_t, MLX4_MAX_MAC_ADDRESSES);
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struct ibv_flow *mac_flow[MLX4_MAX_MAC_ADDRESSES][MLX4_MAX_VLAN_IDS];
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struct ibv_flow *promisc_flow; /* Promiscuous flow. */
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struct ibv_flow *allmulti_flow; /* Multicast flow. */
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unsigned int port_id; /* Port ID for incoming packets. */
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unsigned int elts_n; /* (*elts)[] length. */
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unsigned int elts_head; /* Current index in (*elts)[]. */
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union {
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struct rxq_elt_sp (*sp)[]; /* Scattered RX elements. */
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struct rxq_elt (*no_sp)[]; /* RX elements. */
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} elts;
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unsigned int sp:1; /* Use scattered RX elements. */
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unsigned int csum:1; /* Enable checksum offloading. */
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unsigned int csum_l2tun:1; /* Same for L2 tunnels. */
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struct mlx4_rxq_stats stats; /* RX queue counters. */
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unsigned int socket; /* CPU socket ID for allocations. */
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struct ibv_exp_res_domain *rd; /* Resource Domain. */
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};
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/* TX element. */
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struct txq_elt {
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struct rte_mbuf *buf;
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};
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/* Linear buffer type. It is used when transmitting buffers with too many
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* segments that do not fit the hardware queue (see max_send_sge).
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* Extra segments are copied (linearized) in such buffers, replacing the
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* last SGE during TX.
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* The size is arbitrary but large enough to hold a jumbo frame with
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* 8 segments considering mbuf.buf_len is about 2048 bytes. */
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typedef uint8_t linear_t[16384];
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/* TX queue descriptor. */
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struct txq {
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struct priv *priv; /* Back pointer to private data. */
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struct {
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const struct rte_mempool *mp; /* Cached Memory Pool. */
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struct ibv_mr *mr; /* Memory Region (for mp). */
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uint32_t lkey; /* mr->lkey */
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} mp2mr[MLX4_PMD_TX_MP_CACHE]; /* MP to MR translation table. */
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struct ibv_cq *cq; /* Completion Queue. */
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struct ibv_qp *qp; /* Queue Pair. */
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struct ibv_exp_qp_burst_family *if_qp; /* QP burst interface. */
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struct ibv_exp_cq_family *if_cq; /* CQ interface. */
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#if MLX4_PMD_MAX_INLINE > 0
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uint32_t max_inline; /* Max inline send size <= MLX4_PMD_MAX_INLINE. */
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#endif
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unsigned int elts_n; /* (*elts)[] length. */
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struct txq_elt (*elts)[]; /* TX elements. */
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unsigned int elts_head; /* Current index in (*elts)[]. */
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unsigned int elts_tail; /* First element awaiting completion. */
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unsigned int elts_comp; /* Number of completion requests. */
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unsigned int elts_comp_cd; /* Countdown for next completion request. */
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unsigned int elts_comp_cd_init; /* Initial value for countdown. */
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struct mlx4_txq_stats stats; /* TX queue counters. */
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linear_t (*elts_linear)[]; /* Linearized buffers. */
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struct ibv_mr *mr_linear; /* Memory Region for linearized buffers. */
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unsigned int socket; /* CPU socket ID for allocations. */
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struct ibv_exp_res_domain *rd; /* Resource Domain. */
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};
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struct priv {
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struct rte_eth_dev *dev; /* Ethernet device. */
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struct ibv_context *ctx; /* Verbs context. */
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struct ibv_device_attr device_attr; /* Device properties. */
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struct ibv_pd *pd; /* Protection Domain. */
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/*
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* MAC addresses array and configuration bit-field.
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* An extra entry that cannot be modified by the DPDK is reserved
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* for broadcast frames (destination MAC address ff:ff:ff:ff:ff:ff).
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*/
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struct ether_addr mac[MLX4_MAX_MAC_ADDRESSES];
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BITFIELD_DECLARE(mac_configured, uint32_t, MLX4_MAX_MAC_ADDRESSES);
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/* VLAN filters. */
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struct {
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unsigned int enabled:1; /* If enabled. */
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unsigned int id:12; /* VLAN ID (0-4095). */
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} vlan_filter[MLX4_MAX_VLAN_IDS]; /* VLAN filters table. */
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/* Device properties. */
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uint16_t mtu; /* Configured MTU. */
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uint8_t port; /* Physical port number. */
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unsigned int started:1; /* Device started, flows enabled. */
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unsigned int promisc:1; /* Device in promiscuous mode. */
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unsigned int allmulti:1; /* Device receives all multicast packets. */
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unsigned int hw_qpg:1; /* QP groups are supported. */
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unsigned int hw_tss:1; /* TSS is supported. */
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unsigned int hw_rss:1; /* RSS is supported. */
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unsigned int hw_csum:1; /* Checksum offload is supported. */
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unsigned int hw_csum_l2tun:1; /* Same for L2 tunnels. */
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unsigned int rss:1; /* RSS is enabled. */
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unsigned int vf:1; /* This is a VF device. */
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unsigned int pending_alarm:1; /* An alarm is pending. */
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#ifdef INLINE_RECV
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unsigned int inl_recv_size; /* Inline recv size */
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#endif
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unsigned int max_rss_tbl_sz; /* Maximum number of RSS queues. */
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/* RX/TX queues. */
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struct rxq rxq_parent; /* Parent queue when RSS is enabled. */
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unsigned int rxqs_n; /* RX queues array size. */
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unsigned int txqs_n; /* TX queues array size. */
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struct rxq *(*rxqs)[]; /* RX queues. */
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struct txq *(*txqs)[]; /* TX queues. */
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struct rte_intr_handle intr_handle; /* Interrupt handler. */
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rte_spinlock_t lock; /* Lock for control functions. */
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};
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/* Local storage for secondary process data. */
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struct mlx4_secondary_data {
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struct rte_eth_dev_data data; /* Local device data. */
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@ -335,8 +152,7 @@ mlx4_get_priv(struct rte_eth_dev *dev)
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* @param priv
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* Pointer to private structure.
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*/
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static void
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priv_lock(struct priv *priv)
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void priv_lock(struct priv *priv)
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{
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rte_spinlock_lock(&priv->lock);
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}
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@ -347,8 +163,7 @@ priv_lock(struct priv *priv)
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* @param priv
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* Pointer to private structure.
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*/
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static void
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priv_unlock(struct priv *priv)
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void priv_unlock(struct priv *priv)
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{
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rte_spinlock_unlock(&priv->lock);
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}
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@ -1,8 +1,8 @@
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/*-
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* BSD LICENSE
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*
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* Copyright 2012-2015 6WIND S.A.
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* Copyright 2012 Mellanox.
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* Copyright 2012-2017 6WIND S.A.
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* Copyright 2012-2017 Mellanox.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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@ -38,6 +38,33 @@
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#include <stdint.h>
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#include <limits.h>
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/*
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* Runtime logging through RTE_LOG() is enabled when not in debugging mode.
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* Intermediate LOG_*() macros add the required end-of-line characters.
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*/
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#ifndef NDEBUG
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#define INFO(...) DEBUG(__VA_ARGS__)
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#define WARN(...) DEBUG(__VA_ARGS__)
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#define ERROR(...) DEBUG(__VA_ARGS__)
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#else
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#define LOG__(level, m, ...) \
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RTE_LOG(level, PMD, MLX4_DRIVER_NAME ": " m "%c", __VA_ARGS__)
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#define LOG_(level, ...) LOG__(level, __VA_ARGS__, '\n')
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#define INFO(...) LOG_(INFO, __VA_ARGS__)
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#define WARN(...) LOG_(WARNING, __VA_ARGS__)
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#define ERROR(...) LOG_(ERR, __VA_ARGS__)
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#endif
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/* Verbs header. */
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/* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
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#ifdef PEDANTIC
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#pragma GCC diagnostic ignored "-Wpedantic"
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#endif
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#include <infiniband/verbs.h>
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#ifdef PEDANTIC
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#pragma GCC diagnostic error "-Wpedantic"
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#endif
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/*
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* Maximum number of simultaneous MAC addresses supported.
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*
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@ -160,4 +187,160 @@ enum {
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#define claim_positive(...) (__VA_ARGS__)
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#endif /* NDEBUG */
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struct mlx4_rxq_stats {
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unsigned int idx; /**< Mapping index. */
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#ifdef MLX4_PMD_SOFT_COUNTERS
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uint64_t ipackets; /**< Total of successfully received packets. */
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uint64_t ibytes; /**< Total of successfully received bytes. */
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#endif
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uint64_t idropped; /**< Total of packets dropped when RX ring full. */
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uint64_t rx_nombuf; /**< Total of RX mbuf allocation failures. */
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};
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/* RX element (scattered packets). */
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struct rxq_elt_sp {
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struct ibv_recv_wr wr; /* Work Request. */
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struct ibv_sge sges[MLX4_PMD_SGE_WR_N]; /* Scatter/Gather Elements. */
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struct rte_mbuf *bufs[MLX4_PMD_SGE_WR_N]; /* SGEs buffers. */
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};
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/* RX element. */
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struct rxq_elt {
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struct ibv_recv_wr wr; /* Work Request. */
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struct ibv_sge sge; /* Scatter/Gather Element. */
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/* mbuf pointer is derived from WR_ID(wr.wr_id).offset. */
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};
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/* RX queue descriptor. */
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struct rxq {
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struct priv *priv; /* Back pointer to private data. */
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struct rte_mempool *mp; /* Memory Pool for allocations. */
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struct ibv_mr *mr; /* Memory Region (for mp). */
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struct ibv_cq *cq; /* Completion Queue. */
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struct ibv_qp *qp; /* Queue Pair. */
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struct ibv_exp_qp_burst_family *if_qp; /* QP burst interface. */
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struct ibv_exp_cq_family *if_cq; /* CQ interface. */
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/*
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* Each VLAN ID requires a separate flow steering rule.
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*/
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BITFIELD_DECLARE(mac_configured, uint32_t, MLX4_MAX_MAC_ADDRESSES);
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struct ibv_flow *mac_flow[MLX4_MAX_MAC_ADDRESSES][MLX4_MAX_VLAN_IDS];
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struct ibv_flow *promisc_flow; /* Promiscuous flow. */
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struct ibv_flow *allmulti_flow; /* Multicast flow. */
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unsigned int port_id; /* Port ID for incoming packets. */
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unsigned int elts_n; /* (*elts)[] length. */
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unsigned int elts_head; /* Current index in (*elts)[]. */
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union {
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struct rxq_elt_sp (*sp)[]; /* Scattered RX elements. */
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struct rxq_elt (*no_sp)[]; /* RX elements. */
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} elts;
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unsigned int sp:1; /* Use scattered RX elements. */
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unsigned int csum:1; /* Enable checksum offloading. */
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unsigned int csum_l2tun:1; /* Same for L2 tunnels. */
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struct mlx4_rxq_stats stats; /* RX queue counters. */
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unsigned int socket; /* CPU socket ID for allocations. */
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struct ibv_exp_res_domain *rd; /* Resource Domain. */
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};
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/* TX element. */
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struct txq_elt {
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struct rte_mbuf *buf;
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};
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struct mlx4_txq_stats {
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unsigned int idx; /**< Mapping index. */
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#ifdef MLX4_PMD_SOFT_COUNTERS
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uint64_t opackets; /**< Total of successfully sent packets. */
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uint64_t obytes; /**< Total of successfully sent bytes. */
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#endif
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uint64_t odropped; /**< Total of packets not sent when TX ring full. */
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};
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/*
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* Linear buffer type. It is used when transmitting buffers with too many
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* segments that do not fit the hardware queue (see max_send_sge).
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* Extra segments are copied (linearized) in such buffers, replacing the
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* last SGE during TX.
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* The size is arbitrary but large enough to hold a jumbo frame with
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* 8 segments considering mbuf.buf_len is about 2048 bytes.
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*/
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typedef uint8_t linear_t[16384];
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/* TX queue descriptor. */
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struct txq {
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struct priv *priv; /* Back pointer to private data. */
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struct {
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const struct rte_mempool *mp; /* Cached Memory Pool. */
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struct ibv_mr *mr; /* Memory Region (for mp). */
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uint32_t lkey; /* mr->lkey */
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} mp2mr[MLX4_PMD_TX_MP_CACHE]; /* MP to MR translation table. */
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struct ibv_cq *cq; /* Completion Queue. */
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struct ibv_qp *qp; /* Queue Pair. */
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struct ibv_exp_qp_burst_family *if_qp; /* QP burst interface. */
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struct ibv_exp_cq_family *if_cq; /* CQ interface. */
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#if MLX4_PMD_MAX_INLINE > 0
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uint32_t max_inline; /* Max inline send size <= MLX4_PMD_MAX_INLINE. */
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#endif
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unsigned int elts_n; /* (*elts)[] length. */
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struct txq_elt (*elts)[]; /* TX elements. */
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unsigned int elts_head; /* Current index in (*elts)[]. */
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unsigned int elts_tail; /* First element awaiting completion. */
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unsigned int elts_comp; /* Number of completion requests. */
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unsigned int elts_comp_cd; /* Countdown for next completion request. */
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unsigned int elts_comp_cd_init; /* Initial value for countdown. */
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struct mlx4_txq_stats stats; /* TX queue counters. */
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linear_t (*elts_linear)[]; /* Linearized buffers. */
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struct ibv_mr *mr_linear; /* Memory Region for linearized buffers. */
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unsigned int socket; /* CPU socket ID for allocations. */
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struct ibv_exp_res_domain *rd; /* Resource Domain. */
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};
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struct priv {
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struct rte_eth_dev *dev; /* Ethernet device. */
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struct ibv_context *ctx; /* Verbs context. */
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struct ibv_device_attr device_attr; /* Device properties. */
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struct ibv_pd *pd; /* Protection Domain. */
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/*
|
||||
* MAC addresses array and configuration bit-field.
|
||||
* An extra entry that cannot be modified by the DPDK is reserved
|
||||
* for broadcast frames (destination MAC address ff:ff:ff:ff:ff:ff).
|
||||
*/
|
||||
struct ether_addr mac[MLX4_MAX_MAC_ADDRESSES];
|
||||
BITFIELD_DECLARE(mac_configured, uint32_t, MLX4_MAX_MAC_ADDRESSES);
|
||||
/* VLAN filters. */
|
||||
struct {
|
||||
unsigned int enabled:1; /* If enabled. */
|
||||
unsigned int id:12; /* VLAN ID (0-4095). */
|
||||
} vlan_filter[MLX4_MAX_VLAN_IDS]; /* VLAN filters table. */
|
||||
/* Device properties. */
|
||||
uint16_t mtu; /* Configured MTU. */
|
||||
uint8_t port; /* Physical port number. */
|
||||
unsigned int started:1; /* Device started, flows enabled. */
|
||||
unsigned int promisc:1; /* Device in promiscuous mode. */
|
||||
unsigned int allmulti:1; /* Device receives all multicast packets. */
|
||||
unsigned int hw_qpg:1; /* QP groups are supported. */
|
||||
unsigned int hw_tss:1; /* TSS is supported. */
|
||||
unsigned int hw_rss:1; /* RSS is supported. */
|
||||
unsigned int hw_csum:1; /* Checksum offload is supported. */
|
||||
unsigned int hw_csum_l2tun:1; /* Same for L2 tunnels. */
|
||||
unsigned int rss:1; /* RSS is enabled. */
|
||||
unsigned int vf:1; /* This is a VF device. */
|
||||
unsigned int pending_alarm:1; /* An alarm is pending. */
|
||||
#ifdef INLINE_RECV
|
||||
unsigned int inl_recv_size; /* Inline recv size */
|
||||
#endif
|
||||
unsigned int max_rss_tbl_sz; /* Maximum number of RSS queues. */
|
||||
/* RX/TX queues. */
|
||||
struct rxq rxq_parent; /* Parent queue when RSS is enabled. */
|
||||
unsigned int rxqs_n; /* RX queues array size. */
|
||||
unsigned int txqs_n; /* TX queues array size. */
|
||||
struct rxq *(*rxqs)[]; /* RX queues. */
|
||||
struct txq *(*txqs)[]; /* TX queues. */
|
||||
struct rte_intr_handle intr_handle; /* Interrupt handler. */
|
||||
rte_spinlock_t lock; /* Lock for control functions. */
|
||||
};
|
||||
|
||||
void priv_lock(struct priv *priv);
|
||||
void priv_unlock(struct priv *priv);
|
||||
|
||||
#endif /* RTE_PMD_MLX4_H_ */
|
||||
|
||||
Loading…
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Reference in New Issue
Block a user