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mbuf: fix 64-bit address alignment in 32-bit builds

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On i686 builds, the uin64_t type is 64-bits in size but is aligned to
32-bits only. This causes mbuf fields for rearm_data to not be 16-byte
aligned on 32-bit builds, which causes errors with some vector PMDs which
expect the rearm data to be aligned as on 64-bit.

Given that we cannot use the extra space in the data structures anyway, as
it's already used on 64-bit builds, we can just force alignment of the
physical address in the mbuf to 8-bytes in all cases. This has no effect on
64-bit systems, but fixes the updated PMDs on 32-bit.

Fixes: f4356d7ca1 ("net/i40e: eliminate mbuf write on rearm")
Fixes: f160666a10 ("net/ixgbe: eliminate mbuf write on rearm")

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
This commit is contained in:
Bruce Richardson 2017-04-28 14:10:14 +01:00 committed by Thomas Monjalon
parent e11222c7f4
commit 586ec205bc
1 changed files with 7 additions and 1 deletions
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8
lib/librte_mbuf/rte_mbuf.h
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@ -403,7 +403,13 @@ struct rte_mbuf {
MARKER cacheline0;
void *buf_addr; /**< Virtual address of segment buffer. */
phys_addr_t buf_physaddr; /**< Physical address of segment buffer. */
/**
* Physical address of segment buffer.
* Force alignment to 8-bytes, so as to ensure we have the exact
* same mbuf cacheline0 layout for 32-bit and 64-bit. This makes
* working on vector drivers easier.
*/
phys_addr_t buf_physaddr __rte_aligned(sizeof(phys_addr_t));
/* next 8 bytes are initialised on RX descriptor rearm */
MARKER64 rearm_data;