diff --git a/drivers/common/cnxk/roc_bphy_cgx.c b/drivers/common/cnxk/roc_bphy_cgx.c index 467b67686b..9e53fe238e 100644 --- a/drivers/common/cnxk/roc_bphy_cgx.c +++ b/drivers/common/cnxk/roc_bphy_cgx.c @@ -396,6 +396,24 @@ roc_bphy_cgx_ptp_rx_disable(struct roc_bphy_cgx *roc_cgx, unsigned int lmac) return roc_bphy_cgx_ptp_rx_ena_dis(roc_cgx, lmac, false); } +int +roc_bphy_cgx_fec_set(struct roc_bphy_cgx *roc_cgx, unsigned int lmac, + enum roc_bphy_cgx_eth_link_fec fec) +{ + uint64_t scr1, scr0; + + if (!roc_cgx) + return -EINVAL; + + if (!roc_bphy_cgx_lmac_exists(roc_cgx, lmac)) + return -EINVAL; + + scr1 = FIELD_PREP(SCR1_ETH_CMD_ID, ETH_CMD_SET_FEC) | + FIELD_PREP(SCR1_ETH_SET_FEC_ARGS, fec); + + return roc_bphy_cgx_intf_req(roc_cgx, lmac, scr1, &scr0); +} + int roc_bphy_cgx_fec_supported_get(struct roc_bphy_cgx *roc_cgx, unsigned int lmac, enum roc_bphy_cgx_eth_link_fec *fec) diff --git a/drivers/common/cnxk/roc_bphy_cgx.h b/drivers/common/cnxk/roc_bphy_cgx.h index 9439f88b34..d522d4e202 100644 --- a/drivers/common/cnxk/roc_bphy_cgx.h +++ b/drivers/common/cnxk/roc_bphy_cgx.h @@ -115,6 +115,9 @@ __roc_api int roc_bphy_cgx_ptp_rx_enable(struct roc_bphy_cgx *roc_cgx, unsigned int lmac); __roc_api int roc_bphy_cgx_ptp_rx_disable(struct roc_bphy_cgx *roc_cgx, unsigned int lmac); +__roc_api int roc_bphy_cgx_fec_set(struct roc_bphy_cgx *roc_cgx, + unsigned int lmac, + enum roc_bphy_cgx_eth_link_fec fec); __roc_api int roc_bphy_cgx_fec_supported_get(struct roc_bphy_cgx *roc_cgx, unsigned int lmac, enum roc_bphy_cgx_eth_link_fec *fec); diff --git a/drivers/common/cnxk/roc_bphy_cgx_priv.h b/drivers/common/cnxk/roc_bphy_cgx_priv.h index 93aa43ef5a..e45a13ef09 100644 --- a/drivers/common/cnxk/roc_bphy_cgx_priv.h +++ b/drivers/common/cnxk/roc_bphy_cgx_priv.h @@ -67,6 +67,7 @@ enum eth_cmd_id { ETH_CMD_MODE_CHANGE = 11, /* hot plug support */ ETH_CMD_INTF_SHUTDOWN = 12, ETH_CMD_GET_SUPPORTED_FEC = 18, + ETH_CMD_SET_FEC = 19, ETH_CMD_SET_PTP_MODE = 34, }; @@ -130,6 +131,9 @@ enum eth_cmd_own { #define SCR1_ETH_MODE_CHANGE_ARGS_PORT GENMASK_ULL(21, 14) #define SCR1_ETH_MODE_CHANGE_ARGS_MODE GENMASK_ULL(63, 22) +/* struct eth_set_fec_args */ +#define SCR1_ETH_SET_FEC_ARGS GENMASK_ULL(9, 8) + #define SCR1_OWN_STATUS GENMASK_ULL(1, 0) #endif /* _ROC_BPHY_CGX_PRIV_H_ */ diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map index 6923116256..2cbcc4b93a 100644 --- a/drivers/common/cnxk/version.map +++ b/drivers/common/cnxk/version.map @@ -24,6 +24,7 @@ INTERNAL { roc_ae_fpm_put; roc_bphy_cgx_dev_fini; roc_bphy_cgx_dev_init; + roc_bphy_cgx_fec_set; roc_bphy_cgx_fec_supported_get; roc_bphy_cgx_get_linkinfo; roc_bphy_cgx_intlbk_disable;