net/mlx5: add port to metadata conversion
This adds conversion functions between both ethdev port_id and IB context to internal corresponding tag/mask values. Signed-off-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
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@ -1554,8 +1554,16 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
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if (!priv->hrxqs)
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goto error;
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rte_rwlock_init(&priv->ind_tbls_lock);
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if (priv->sh->config.dv_flow_en == 2)
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if (priv->sh->config.dv_flow_en == 2) {
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#ifdef HAVE_IBV_FLOW_DV_SUPPORT
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if (priv->vport_meta_mask)
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flow_hw_set_port_info(eth_dev);
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return eth_dev;
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#else
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DRV_LOG(ERR, "DV support is missing for HWS.");
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goto error;
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#endif
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}
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/* Port representor shares the same max priority with pf port. */
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if (!priv->sh->flow_priority_check_flag) {
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/* Supported Verbs flow priority number detection. */
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@ -1944,6 +1944,7 @@ mlx5_dev_close(struct rte_eth_dev *dev)
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mlx5_flex_item_port_cleanup(dev);
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#if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
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flow_hw_resource_release(dev);
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flow_hw_clear_port_info(dev);
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#endif
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if (priv->rxq_privs != NULL) {
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/* XXX race condition if mlx5_rx_burst() is still running. */
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@ -33,6 +33,12 @@
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#include "mlx5_common_os.h"
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#include "rte_pmd_mlx5.h"
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/*
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* Shared array for quick translation between port_id and vport mask/values
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* used for HWS rules.
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*/
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struct flow_hw_port_info mlx5_flow_hw_port_infos[RTE_MAX_ETHPORTS];
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struct tunnel_default_miss_ctx {
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uint16_t *queue;
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__extension__
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@ -1326,6 +1326,58 @@ struct mlx5_flow_split_info {
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uint64_t prefix_layers; /**< Prefix subflow layers. */
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};
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struct flow_hw_port_info {
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uint32_t regc_mask;
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uint32_t regc_value;
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uint32_t is_wire:1;
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};
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extern struct flow_hw_port_info mlx5_flow_hw_port_infos[RTE_MAX_ETHPORTS];
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/*
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* Get metadata match tag and mask for given rte_eth_dev port.
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* Used in HWS rule creation.
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*/
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static __rte_always_inline const struct flow_hw_port_info *
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flow_hw_conv_port_id(const uint16_t port_id)
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{
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struct flow_hw_port_info *port_info;
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if (port_id >= RTE_MAX_ETHPORTS)
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return NULL;
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port_info = &mlx5_flow_hw_port_infos[port_id];
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return !!port_info->regc_mask ? port_info : NULL;
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}
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#ifdef HAVE_IBV_FLOW_DV_SUPPORT
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/*
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* Get metadata match tag and mask for the uplink port represented
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* by given IB context. Used in HWS context creation.
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*/
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static __rte_always_inline const struct flow_hw_port_info *
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flow_hw_get_wire_port(struct ibv_context *ibctx)
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{
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struct ibv_device *ibdev = ibctx->device;
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uint16_t port_id;
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MLX5_ETH_FOREACH_DEV(port_id, NULL) {
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const struct mlx5_priv *priv =
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rte_eth_devices[port_id].data->dev_private;
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if (priv && priv->master) {
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struct ibv_context *port_ibctx = priv->sh->cdev->ctx;
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if (port_ibctx->device == ibdev)
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return flow_hw_conv_port_id(port_id);
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}
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}
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return NULL;
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}
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#endif
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void flow_hw_set_port_info(struct rte_eth_dev *dev);
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void flow_hw_clear_port_info(struct rte_eth_dev *dev);
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typedef int (*mlx5_flow_validate_t)(struct rte_eth_dev *dev,
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const struct rte_flow_attr *attr,
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const struct rte_flow_item items[],
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@ -2211,6 +2211,35 @@ flow_hw_resource_release(struct rte_eth_dev *dev)
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priv->nb_queue = 0;
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}
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/* Sets vport tag and mask, for given port, used in HWS rules. */
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void
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flow_hw_set_port_info(struct rte_eth_dev *dev)
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{
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struct mlx5_priv *priv = dev->data->dev_private;
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uint16_t port_id = dev->data->port_id;
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struct flow_hw_port_info *info;
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MLX5_ASSERT(port_id < RTE_MAX_ETHPORTS);
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info = &mlx5_flow_hw_port_infos[port_id];
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info->regc_mask = priv->vport_meta_mask;
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info->regc_value = priv->vport_meta_tag;
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info->is_wire = priv->master;
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}
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/* Clears vport tag and mask used for HWS rules. */
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void
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flow_hw_clear_port_info(struct rte_eth_dev *dev)
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{
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uint16_t port_id = dev->data->port_id;
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struct flow_hw_port_info *info;
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MLX5_ASSERT(port_id < RTE_MAX_ETHPORTS);
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info = &mlx5_flow_hw_port_infos[port_id];
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info->regc_mask = 0;
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info->regc_value = 0;
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info->is_wire = 0;
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}
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/**
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* Create shared action.
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*
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