qede: add L2 support

This patch adds the features to supports configuration of various Layer 2
elements, such as channels and filtering options.

Signed-off-by: Harish Patil <harish.patil@qlogic.com>
Signed-off-by: Rasesh Mody <rasesh.mody@qlogic.com>
Signed-off-by: Sony Chacko <sony.chacko@qlogic.com>
This commit is contained in:
Rasesh Mody 2016-04-27 07:18:39 -07:00 committed by Bruce Richardson
parent 3eae93a9bf
commit 5cdd769a26
12 changed files with 2799 additions and 1 deletions

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@ -74,6 +74,7 @@ $(foreach obj, $(BASE_DRIVER_OBJS), $(eval CFLAGS+=$(CFLAGS_BASE_DRIVER)))
SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += base/ecore_dev.c
SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += base/ecore_hw.c
SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += base/ecore_cxt.c
SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += base/ecore_l2.c
SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += base/ecore_sp_commands.c
SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += base/ecore_init_fw_funcs.c
SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += base/ecore_spq.c
@ -82,6 +83,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += base/ecore_mcp.c
SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += base/ecore_int.c
SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += base/bcm_osal.c
SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += qede_ethdev.c
SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += qede_eth_if.c
SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += qede_main.c
SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += qede_rxtx.c

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@ -251,6 +251,12 @@ static OSAL_INLINE u32 ecore_chain_get_page_cnt(struct ecore_chain *p_chain)
return p_chain->page_cnt;
}
static OSAL_INLINE
dma_addr_t ecore_chain_get_pbl_phys(struct ecore_chain *p_chain)
{
return p_chain->pbl.p_phys_table;
}
/**
* @brief ecore_chain_advance_page -
*

File diff suppressed because it is too large Load Diff

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@ -0,0 +1,101 @@
/*
* Copyright (c) 2016 QLogic Corporation.
* All rights reserved.
* www.qlogic.com
*
* See LICENSE.qede_pmd for copyright and licensing details.
*/
#ifndef __ECORE_L2_H__
#define __ECORE_L2_H__
#include "ecore.h"
#include "ecore_hw.h"
#include "ecore_spq.h"
#include "ecore_l2_api.h"
/**
* @brief ecore_sp_eth_tx_queue_update -
*
* This ramrod updates a TX queue. It is used for setting the active
* state of the queue.
*
* @note Final phase API.
*
* @param p_hwfn
*
* @return enum _ecore_status_t
*/
enum _ecore_status_t ecore_sp_eth_tx_queue_update(struct ecore_hwfn *p_hwfn);
enum _ecore_status_t
ecore_sp_eth_vport_start(struct ecore_hwfn *p_hwfn,
struct ecore_sp_vport_start_params *p_params);
/**
* @brief - Starts an Rx queue; Should be used where contexts are handled
* outside of the ramrod area [specifically iov scenarios]
*
* @param p_hwfn
* @param opaque_fid
* @param cid
* @param rx_queue_id
* @param vport_id
* @param stats_id
* @param sb
* @param sb_index
* @param bd_max_bytes
* @param bd_chain_phys_addr
* @param cqe_pbl_addr
* @param cqe_pbl_size
* @param leading
*
* @return enum _ecore_status_t
*/
enum _ecore_status_t
ecore_sp_eth_rxq_start_ramrod(struct ecore_hwfn *p_hwfn,
u16 opaque_fid,
u32 cid,
u16 rx_queue_id,
u8 vport_id,
u8 stats_id,
u16 sb,
u8 sb_index,
u16 bd_max_bytes,
dma_addr_t bd_chain_phys_addr,
dma_addr_t cqe_pbl_addr, u16 cqe_pbl_size);
/**
* @brief - Starts a Tx queue; Should be used where contexts are handled
* outside of the ramrod area [specifically iov scenarios]
*
* @param p_hwfn
* @param opaque_fid
* @param tx_queue_id
* @param cid
* @param vport_id
* @param stats_id
* @param sb
* @param sb_index
* @param pbl_addr
* @param pbl_size
* @param p_pq_params - parameters for choosing the PQ for this Tx queue
*
* @return enum _ecore_status_t
*/
enum _ecore_status_t
ecore_sp_eth_txq_start_ramrod(struct ecore_hwfn *p_hwfn,
u16 opaque_fid,
u16 tx_queue_id,
u32 cid,
u8 vport_id,
u8 stats_id,
u16 sb,
u8 sb_index,
dma_addr_t pbl_addr,
u16 pbl_size,
union ecore_qm_pq_params *p_pq_params);
u8 ecore_mcast_bin_from_mac(u8 *mac);
#endif

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@ -0,0 +1,401 @@
/*
* Copyright (c) 2016 QLogic Corporation.
* All rights reserved.
* www.qlogic.com
*
* See LICENSE.qede_pmd for copyright and licensing details.
*/
#ifndef __ECORE_L2_API_H__
#define __ECORE_L2_API_H__
#include "ecore_status.h"
#include "ecore_sp_api.h"
#ifndef __EXTRACT__LINUX__
enum ecore_rss_caps {
ECORE_RSS_IPV4 = 0x1,
ECORE_RSS_IPV6 = 0x2,
ECORE_RSS_IPV4_TCP = 0x4,
ECORE_RSS_IPV6_TCP = 0x8,
ECORE_RSS_IPV4_UDP = 0x10,
ECORE_RSS_IPV6_UDP = 0x20,
};
/* Should be the same as ETH_RSS_IND_TABLE_ENTRIES_NUM */
#define ECORE_RSS_IND_TABLE_SIZE 128
#define ECORE_RSS_KEY_SIZE 10 /* size in 32b chunks */
#endif
struct ecore_rss_params {
u8 update_rss_config;
u8 rss_enable;
u8 rss_eng_id;
u8 update_rss_capabilities;
u8 update_rss_ind_table;
u8 update_rss_key;
u8 rss_caps;
u8 rss_table_size_log; /* The table size is 2 ^ rss_table_size_log */
u16 rss_ind_table[ECORE_RSS_IND_TABLE_SIZE];
u32 rss_key[ECORE_RSS_KEY_SIZE];
};
struct ecore_sge_tpa_params {
u8 max_buffers_per_cqe;
u8 update_tpa_en_flg;
u8 tpa_ipv4_en_flg;
u8 tpa_ipv6_en_flg;
u8 tpa_ipv4_tunn_en_flg;
u8 tpa_ipv6_tunn_en_flg;
u8 update_tpa_param_flg;
u8 tpa_pkt_split_flg;
u8 tpa_hdr_data_split_flg;
u8 tpa_gro_consistent_flg;
u8 tpa_max_aggs_num;
u16 tpa_max_size;
u16 tpa_min_size_to_start;
u16 tpa_min_size_to_cont;
};
enum ecore_filter_opcode {
ECORE_FILTER_ADD,
ECORE_FILTER_REMOVE,
ECORE_FILTER_MOVE,
ECORE_FILTER_REPLACE, /* Delete all MACs and add new one instead */
ECORE_FILTER_FLUSH, /* Removes all filters */
};
enum ecore_filter_ucast_type {
ECORE_FILTER_MAC,
ECORE_FILTER_VLAN,
ECORE_FILTER_MAC_VLAN,
ECORE_FILTER_INNER_MAC,
ECORE_FILTER_INNER_VLAN,
ECORE_FILTER_INNER_PAIR,
ECORE_FILTER_INNER_MAC_VNI_PAIR,
ECORE_FILTER_MAC_VNI_PAIR,
ECORE_FILTER_VNI,
};
struct ecore_filter_ucast {
enum ecore_filter_opcode opcode;
enum ecore_filter_ucast_type type;
u8 is_rx_filter;
u8 is_tx_filter;
u8 vport_to_add_to;
u8 vport_to_remove_from;
unsigned char mac[ETH_ALEN];
u8 assert_on_error;
u16 vlan;
u32 vni;
};
struct ecore_filter_mcast {
/* MOVE is not supported for multicast */
enum ecore_filter_opcode opcode;
u8 vport_to_add_to;
u8 vport_to_remove_from;
u8 num_mc_addrs;
#define ECORE_MAX_MC_ADDRS 64
unsigned char mac[ECORE_MAX_MC_ADDRS][ETH_ALEN];
};
struct ecore_filter_accept_flags {
u8 update_rx_mode_config;
u8 update_tx_mode_config;
u8 rx_accept_filter;
u8 tx_accept_filter;
#define ECORE_ACCEPT_NONE 0x01
#define ECORE_ACCEPT_UCAST_MATCHED 0x02
#define ECORE_ACCEPT_UCAST_UNMATCHED 0x04
#define ECORE_ACCEPT_MCAST_MATCHED 0x08
#define ECORE_ACCEPT_MCAST_UNMATCHED 0x10
#define ECORE_ACCEPT_BCAST 0x20
};
/* Add / remove / move / remove-all unicast MAC-VLAN filters.
* FW will assert in the following cases, so driver should take care...:
* 1. Adding a filter to a full table.
* 2. Adding a filter which already exists on that vport.
* 3. Removing a filter which doesn't exist.
*/
enum _ecore_status_t
ecore_filter_ucast_cmd(struct ecore_dev *p_dev,
struct ecore_filter_ucast *p_filter_cmd,
enum spq_mode comp_mode,
struct ecore_spq_comp_cb *p_comp_data);
/* Add / remove / move multicast MAC filters. */
enum _ecore_status_t
ecore_filter_mcast_cmd(struct ecore_dev *p_dev,
struct ecore_filter_mcast *p_filter_cmd,
enum spq_mode comp_mode,
struct ecore_spq_comp_cb *p_comp_data);
/* Set "accept" filters */
enum _ecore_status_t
ecore_filter_accept_cmd(struct ecore_dev *p_dev,
u8 vport,
struct ecore_filter_accept_flags accept_flags,
u8 update_accept_any_vlan,
u8 accept_any_vlan,
enum spq_mode comp_mode,
struct ecore_spq_comp_cb *p_comp_data);
/**
* @brief ecore_sp_eth_rx_queue_start - RX Queue Start Ramrod
*
* This ramrod initializes an RX Queue for a VPort. An Assert is generated if
* the VPort ID is not currently initialized.
*
* @param p_hwfn
* @param opaque_fid
* @param rx_queue_id RX Queue ID: Zero based, per VPort, allocated
* by assignment (=rssId)
* @param vport_id VPort ID
* @param u8 stats_id VPort ID which the queue stats
* will be added to
* @param sb Status Block of the Function Event Ring
* @param sb_index Index into the status block of the
* Function Event Ring
* @param bd_max_bytes Maximum bytes that can be placed on a BD
* @param bd_chain_phys_addr Physical address of BDs for receive.
* @param cqe_pbl_addr Physical address of the CQE PBL Table.
* @param cqe_pbl_size Size of the CQE PBL Table
* @param pp_prod Pointer to place producer's
* address for the Rx Q (May be
* NULL).
*
* @return enum _ecore_status_t
*/
enum _ecore_status_t ecore_sp_eth_rx_queue_start(struct ecore_hwfn *p_hwfn,
u16 opaque_fid,
u8 rx_queue_id,
u8 vport_id,
u8 stats_id,
u16 sb,
u8 sb_index,
u16 bd_max_bytes,
dma_addr_t bd_chain_phys_addr,
dma_addr_t cqe_pbl_addr,
u16 cqe_pbl_size,
void OSAL_IOMEM * *pp_prod);
/**
* @brief ecore_sp_eth_rx_queue_stop -
*
* This ramrod closes an RX queue. It sends RX queue stop ramrod
* + CFC delete ramrod
*
* @param p_hwfn
* @param rx_queue_id RX Queue ID
* @param eq_completion_only If True completion will be on
* EQe, if False completion will be
* on EQe if p_hwfn opaque
* different from the RXQ opaque
* otherwise on CQe.
* @param cqe_completion If True completion will be
* receive on CQe.
* @return enum _ecore_status_t
*/
enum _ecore_status_t
ecore_sp_eth_rx_queue_stop(struct ecore_hwfn *p_hwfn,
u16 rx_queue_id,
bool eq_completion_only, bool cqe_completion);
/**
* @brief ecore_sp_eth_tx_queue_start - TX Queue Start Ramrod
*
* This ramrod initializes a TX Queue for a VPort. An Assert is generated if
* the VPort is not currently initialized.
*
* @param p_hwfn
* @param opaque_fid
* @param tx_queue_id TX Queue ID
* @param vport_id VPort ID
* @param stats_id VPort ID which the queue stats
* will be added to
* @param sb Status Block of the Function Event Ring
* @param sb_index Index into the status block of the Function
* Event Ring
* @param pbl_addr address of the pbl array
* @param pbl_size number of entries in pbl
* @param pp_doorbell Pointer to place doorbell pointer (May be NULL).
* This address should be used with the
* DIRECT_REG_WR macro.
*
* @return enum _ecore_status_t
*/
enum _ecore_status_t ecore_sp_eth_tx_queue_start(struct ecore_hwfn *p_hwfn,
u16 opaque_fid,
u16 tx_queue_id,
u8 vport_id,
u8 stats_id,
u16 sb,
u8 sb_index,
dma_addr_t pbl_addr,
u16 pbl_size,
void OSAL_IOMEM * *
pp_doorbell);
/**
* @brief ecore_sp_eth_tx_queue_stop -
*
* This ramrod closes a TX queue. It sends TX queue stop ramrod
* + CFC delete ramrod
*
* @param p_hwfn
* @param tx_queue_id TX Queue ID
*
* @return enum _ecore_status_t
*/
enum _ecore_status_t ecore_sp_eth_tx_queue_stop(struct ecore_hwfn *p_hwfn,
u16 tx_queue_id);
enum ecore_tpa_mode {
ECORE_TPA_MODE_NONE,
ECORE_TPA_MODE_RSC,
ECORE_TPA_MODE_GRO,
ECORE_TPA_MODE_MAX
};
struct ecore_sp_vport_start_params {
enum ecore_tpa_mode tpa_mode;
bool remove_inner_vlan; /* Inner VLAN removal is enabled */
bool tx_switching; /* Vport supports tx-switching */
bool handle_ptp_pkts; /* Handle PTP packets */
bool only_untagged; /* Untagged pkt control */
bool drop_ttl0; /* Drop packets with TTL = 0 */
u8 max_buffers_per_cqe;
u32 concrete_fid;
u16 opaque_fid;
u8 vport_id; /* VPORT ID */
u16 mtu; /* VPORT MTU */
bool zero_placement_offset;
};
/**
* @brief ecore_sp_vport_start -
*
* This ramrod initializes a VPort. An Assert if generated if the Function ID
* of the VPort is not enabled.
*
* @param p_hwfn
* @param p_params VPORT start params
*
* @return enum _ecore_status_t
*/
enum _ecore_status_t
ecore_sp_vport_start(struct ecore_hwfn *p_hwfn,
struct ecore_sp_vport_start_params *p_params);
struct ecore_sp_vport_update_params {
u16 opaque_fid;
u8 vport_id;
u8 update_vport_active_rx_flg;
u8 vport_active_rx_flg;
u8 update_vport_active_tx_flg;
u8 vport_active_tx_flg;
u8 update_inner_vlan_removal_flg;
u8 inner_vlan_removal_flg;
u8 silent_vlan_removal_flg;
u8 update_default_vlan_enable_flg;
u8 default_vlan_enable_flg;
u8 update_default_vlan_flg;
u16 default_vlan;
u8 update_tx_switching_flg;
u8 tx_switching_flg;
u8 update_approx_mcast_flg;
u8 update_anti_spoofing_en_flg;
u8 anti_spoofing_en;
u8 update_accept_any_vlan_flg;
u8 accept_any_vlan;
unsigned long bins[8];
struct ecore_rss_params *rss_params;
struct ecore_filter_accept_flags accept_flags;
struct ecore_sge_tpa_params *sge_tpa_params;
};
/**
* @brief ecore_sp_vport_update -
*
* This ramrod updates the parameters of the VPort. Every field can be updated
* independently, according to flags.
*
* This ramrod is also used to set the VPort state to active after creation.
* An Assert is generated if the VPort does not contain an RX queue.
*
* @param p_hwfn
* @param p_params
*
* @return enum _ecore_status_t
*/
enum _ecore_status_t
ecore_sp_vport_update(struct ecore_hwfn *p_hwfn,
struct ecore_sp_vport_update_params *p_params,
enum spq_mode comp_mode,
struct ecore_spq_comp_cb *p_comp_data);
/**
* @brief ecore_sp_vport_stop -
*
* This ramrod closes a VPort after all its RX and TX queues are terminated.
* An Assert is generated if any queues are left open.
*
* @param p_hwfn
* @param opaque_fid
* @param vport_id VPort ID
*
* @return enum _ecore_status_t
*/
enum _ecore_status_t ecore_sp_vport_stop(struct ecore_hwfn *p_hwfn,
u16 opaque_fid, u8 vport_id);
enum _ecore_status_t
ecore_sp_eth_filter_ucast(struct ecore_hwfn *p_hwfn,
u16 opaque_fid,
struct ecore_filter_ucast *p_filter_cmd,
enum spq_mode comp_mode,
struct ecore_spq_comp_cb *p_comp_data);
/**
* @brief ecore_sp_rx_eth_queues_update -
*
* This ramrod updates an RX queue. It is used for setting the active state
* of the queue and updating the TPA and SGE parameters.
*
* @note Final phase API.
*
* @param p_hwfn
* @param rx_queue_id RX Queue ID
* @param num_rxqs Allow to update multiple rx
* queues, from rx_queue_id to
* (rx_queue_id + num_rxqs)
* @param complete_cqe_flg Post completion to the CQE Ring if set
* @param complete_event_flg Post completion to the Event Ring if set
*
* @return enum _ecore_status_t
*/
enum _ecore_status_t
ecore_sp_eth_rx_queues_update(struct ecore_hwfn *p_hwfn,
u16 rx_queue_id,
u8 num_rxqs,
u8 complete_cqe_flg,
u8 complete_event_flg,
enum spq_mode comp_mode,
struct ecore_spq_comp_cb *p_comp_data);
void __ecore_get_vport_stats(struct ecore_hwfn *p_hwfn,
struct ecore_ptt *p_ptt,
struct ecore_eth_stats *stats,
u16 statistics_bin, bool b_get_port_stats);
void ecore_get_vport_stats(struct ecore_dev *p_dev,
struct ecore_eth_stats *stats);
void ecore_reset_vport_stats(struct ecore_dev *p_dev);
#endif

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@ -0,0 +1,458 @@
/*
* Copyright (c) 2016 QLogic Corporation.
* All rights reserved.
* www.qlogic.com
*
* See LICENSE.qede_pmd for copyright and licensing details.
*/
#include "qede_ethdev.h"
static int
qed_start_vport(struct ecore_dev *edev, struct qed_start_vport_params *p_params)
{
int rc, i;
for_each_hwfn(edev, i) {
struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
u8 tx_switching = 0;
struct ecore_sp_vport_start_params start = { 0 };
start.tpa_mode = p_params->gro_enable ? ECORE_TPA_MODE_GRO :
ECORE_TPA_MODE_NONE;
start.remove_inner_vlan = p_params->remove_inner_vlan;
start.tx_switching = tx_switching;
start.only_untagged = false; /* untagged only */
start.drop_ttl0 = p_params->drop_ttl0;
start.concrete_fid = p_hwfn->hw_info.concrete_fid;
start.opaque_fid = p_hwfn->hw_info.opaque_fid;
start.concrete_fid = p_hwfn->hw_info.concrete_fid;
start.handle_ptp_pkts = p_params->handle_ptp_pkts;
start.vport_id = p_params->vport_id;
start.max_buffers_per_cqe = 16; /* TODO-is this right */
start.mtu = p_params->mtu;
/* @DPDK - Disable FW placement */
start.zero_placement_offset = 1;
rc = ecore_sp_vport_start(p_hwfn, &start);
if (rc) {
DP_ERR(edev, "Failed to start VPORT\n");
return rc;
}
ecore_hw_start_fastpath(p_hwfn);
DP_VERBOSE(edev, ECORE_MSG_SPQ,
"Started V-PORT %d with MTU %d\n",
p_params->vport_id, p_params->mtu);
}
ecore_reset_vport_stats(edev);
return 0;
}
static int qed_stop_vport(struct ecore_dev *edev, uint8_t vport_id)
{
int rc, i;
for_each_hwfn(edev, i) {
struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
rc = ecore_sp_vport_stop(p_hwfn,
p_hwfn->hw_info.opaque_fid, vport_id);
if (rc) {
DP_ERR(edev, "Failed to stop VPORT\n");
return rc;
}
}
return 0;
}
static int
qed_update_vport(struct ecore_dev *edev, struct qed_update_vport_params *params)
{
struct ecore_sp_vport_update_params sp_params;
struct ecore_rss_params sp_rss_params;
int rc, i;
memset(&sp_params, 0, sizeof(sp_params));
memset(&sp_rss_params, 0, sizeof(sp_rss_params));
/* Translate protocol params into sp params */
sp_params.vport_id = params->vport_id;
sp_params.update_vport_active_rx_flg = params->update_vport_active_flg;
sp_params.update_vport_active_tx_flg = params->update_vport_active_flg;
sp_params.vport_active_rx_flg = params->vport_active_flg;
sp_params.vport_active_tx_flg = params->vport_active_flg;
sp_params.update_inner_vlan_removal_flg =
params->update_inner_vlan_removal_flg;
sp_params.inner_vlan_removal_flg = params->inner_vlan_removal_flg;
sp_params.update_tx_switching_flg = params->update_tx_switching_flg;
sp_params.tx_switching_flg = params->tx_switching_flg;
sp_params.accept_any_vlan = params->accept_any_vlan;
sp_params.update_accept_any_vlan_flg =
params->update_accept_any_vlan_flg;
/* RSS - is a bit tricky, since upper-layer isn't familiar with hwfns.
* We need to re-fix the rss values per engine for CMT.
*/
if (edev->num_hwfns > 1 && params->update_rss_flg) {
struct qed_update_vport_rss_params *rss = &params->rss_params;
int k, max = 0;
/* Find largest entry, since it's possible RSS needs to
* be disabled [in case only 1 queue per-hwfn]
*/
for (k = 0; k < ECORE_RSS_IND_TABLE_SIZE; k++)
max = (max > rss->rss_ind_table[k]) ?
max : rss->rss_ind_table[k];
/* Either fix RSS values or disable RSS */
if (edev->num_hwfns < max + 1) {
int divisor = (max + edev->num_hwfns - 1) /
edev->num_hwfns;
DP_VERBOSE(edev, ECORE_MSG_SPQ,
"CMT - fixing RSS values (modulo %02x)\n",
divisor);
for (k = 0; k < ECORE_RSS_IND_TABLE_SIZE; k++)
rss->rss_ind_table[k] =
rss->rss_ind_table[k] % divisor;
} else {
DP_VERBOSE(edev, ECORE_MSG_SPQ,
"CMT - 1 queue per-hwfn; Disabling RSS\n");
params->update_rss_flg = 0;
}
}
/* Now, update the RSS configuration for actual configuration */
if (params->update_rss_flg) {
sp_rss_params.update_rss_config = 1;
sp_rss_params.rss_enable = 1;
sp_rss_params.update_rss_capabilities = 1;
sp_rss_params.update_rss_ind_table = 1;
sp_rss_params.update_rss_key = 1;
sp_rss_params.rss_caps = ECORE_RSS_IPV4 | ECORE_RSS_IPV6 |
ECORE_RSS_IPV4_TCP | ECORE_RSS_IPV6_TCP;
sp_rss_params.rss_table_size_log = 7; /* 2^7 = 128 */
rte_memcpy(sp_rss_params.rss_ind_table,
params->rss_params.rss_ind_table,
ECORE_RSS_IND_TABLE_SIZE * sizeof(uint16_t));
rte_memcpy(sp_rss_params.rss_key, params->rss_params.rss_key,
ECORE_RSS_KEY_SIZE * sizeof(uint32_t));
}
sp_params.rss_params = &sp_rss_params;
for_each_hwfn(edev, i) {
struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
sp_params.opaque_fid = p_hwfn->hw_info.opaque_fid;
rc = ecore_sp_vport_update(p_hwfn, &sp_params,
ECORE_SPQ_MODE_EBLOCK, NULL);
if (rc) {
DP_ERR(edev, "Failed to update VPORT\n");
return rc;
}
DP_VERBOSE(edev, ECORE_MSG_SPQ,
"Updated V-PORT %d: active_flag %d [update %d]\n",
params->vport_id, params->vport_active_flg,
params->update_vport_active_flg);
}
return 0;
}
static int
qed_start_rxq(struct ecore_dev *edev,
uint8_t rss_id, uint8_t rx_queue_id,
uint8_t vport_id, uint16_t sb,
uint8_t sb_index, uint16_t bd_max_bytes,
dma_addr_t bd_chain_phys_addr,
dma_addr_t cqe_pbl_addr,
uint16_t cqe_pbl_size, void OSAL_IOMEM * *pp_prod)
{
struct ecore_hwfn *p_hwfn;
int rc, hwfn_index;
hwfn_index = rss_id % edev->num_hwfns;
p_hwfn = &edev->hwfns[hwfn_index];
rc = ecore_sp_eth_rx_queue_start(p_hwfn,
p_hwfn->hw_info.opaque_fid,
rx_queue_id / edev->num_hwfns,
vport_id,
vport_id,
sb,
sb_index,
bd_max_bytes,
bd_chain_phys_addr,
cqe_pbl_addr, cqe_pbl_size, pp_prod);
if (rc) {
DP_ERR(edev, "Failed to start RXQ#%d\n", rx_queue_id);
return rc;
}
DP_VERBOSE(edev, ECORE_MSG_SPQ,
"Started RX-Q %d [rss %d] on V-PORT %d and SB %d\n",
rx_queue_id, rss_id, vport_id, sb);
return 0;
}
static int
qed_stop_rxq(struct ecore_dev *edev, struct qed_stop_rxq_params *params)
{
int rc, hwfn_index;
struct ecore_hwfn *p_hwfn;
hwfn_index = params->rss_id % edev->num_hwfns;
p_hwfn = &edev->hwfns[hwfn_index];
rc = ecore_sp_eth_rx_queue_stop(p_hwfn,
params->rx_queue_id / edev->num_hwfns,
params->eq_completion_only, false);
if (rc) {
DP_ERR(edev, "Failed to stop RXQ#%d\n", params->rx_queue_id);
return rc;
}
return 0;
}
static int
qed_start_txq(struct ecore_dev *edev,
uint8_t rss_id, uint16_t tx_queue_id,
uint8_t vport_id, uint16_t sb,
uint8_t sb_index,
dma_addr_t pbl_addr,
uint16_t pbl_size, void OSAL_IOMEM * *pp_doorbell)
{
struct ecore_hwfn *p_hwfn;
int rc, hwfn_index;
hwfn_index = rss_id % edev->num_hwfns;
p_hwfn = &edev->hwfns[hwfn_index];
rc = ecore_sp_eth_tx_queue_start(p_hwfn,
p_hwfn->hw_info.opaque_fid,
tx_queue_id / edev->num_hwfns,
vport_id,
vport_id,
sb,
sb_index,
pbl_addr, pbl_size, pp_doorbell);
if (rc) {
DP_ERR(edev, "Failed to start TXQ#%d\n", tx_queue_id);
return rc;
}
DP_VERBOSE(edev, ECORE_MSG_SPQ,
"Started TX-Q %d [rss %d] on V-PORT %d and SB %d\n",
tx_queue_id, rss_id, vport_id, sb);
return 0;
}
static int
qed_stop_txq(struct ecore_dev *edev, struct qed_stop_txq_params *params)
{
struct ecore_hwfn *p_hwfn;
int rc, hwfn_index;
hwfn_index = params->rss_id % edev->num_hwfns;
p_hwfn = &edev->hwfns[hwfn_index];
rc = ecore_sp_eth_tx_queue_stop(p_hwfn,
params->tx_queue_id / edev->num_hwfns);
if (rc) {
DP_ERR(edev, "Failed to stop TXQ#%d\n", params->tx_queue_id);
return rc;
}
return 0;
}
static int
qed_fp_cqe_completion(struct ecore_dev *edev,
uint8_t rss_id, struct eth_slow_path_rx_cqe *cqe)
{
return ecore_eth_cqe_completion(&edev->hwfns[rss_id % edev->num_hwfns],
cqe);
}
static int qed_fastpath_stop(struct ecore_dev *edev)
{
ecore_hw_stop_fastpath(edev);
return 0;
}
static void
qed_get_vport_stats(struct ecore_dev *edev, struct ecore_eth_stats *stats)
{
ecore_get_vport_stats(edev, stats);
}
static int
qed_configure_filter_ucast(struct ecore_dev *edev,
struct qed_filter_ucast_params *params)
{
struct ecore_filter_ucast ucast;
if (!params->vlan_valid && !params->mac_valid) {
DP_NOTICE(edev, true,
"Tried configuring a unicast filter,"
"but both MAC and VLAN are not set\n");
return -EINVAL;
}
memset(&ucast, 0, sizeof(ucast));
switch (params->type) {
case QED_FILTER_XCAST_TYPE_ADD:
ucast.opcode = ECORE_FILTER_ADD;
break;
case QED_FILTER_XCAST_TYPE_DEL:
ucast.opcode = ECORE_FILTER_REMOVE;
break;
case QED_FILTER_XCAST_TYPE_REPLACE:
ucast.opcode = ECORE_FILTER_REPLACE;
break;
default:
DP_NOTICE(edev, true, "Unknown unicast filter type %d\n",
params->type);
}
if (params->vlan_valid && params->mac_valid) {
ucast.type = ECORE_FILTER_MAC_VLAN;
ether_addr_copy((struct ether_addr *)&params->mac,
(struct ether_addr *)&ucast.mac);
ucast.vlan = params->vlan;
} else if (params->mac_valid) {
ucast.type = ECORE_FILTER_MAC;
ether_addr_copy((struct ether_addr *)&params->mac,
(struct ether_addr *)&ucast.mac);
} else {
ucast.type = ECORE_FILTER_VLAN;
ucast.vlan = params->vlan;
}
ucast.is_rx_filter = true;
ucast.is_tx_filter = true;
return ecore_filter_ucast_cmd(edev, &ucast, ECORE_SPQ_MODE_CB, NULL);
}
static int
qed_configure_filter_mcast(struct ecore_dev *edev,
struct qed_filter_mcast_params *params)
{
struct ecore_filter_mcast mcast;
int i;
memset(&mcast, 0, sizeof(mcast));
switch (params->type) {
case QED_FILTER_XCAST_TYPE_ADD:
mcast.opcode = ECORE_FILTER_ADD;
break;
case QED_FILTER_XCAST_TYPE_DEL:
mcast.opcode = ECORE_FILTER_REMOVE;
break;
default:
DP_NOTICE(edev, true, "Unknown multicast filter type %d\n",
params->type);
}
mcast.num_mc_addrs = params->num;
for (i = 0; i < mcast.num_mc_addrs; i++)
ether_addr_copy((struct ether_addr *)&params->mac[i],
(struct ether_addr *)&mcast.mac[i]);
return ecore_filter_mcast_cmd(edev, &mcast, ECORE_SPQ_MODE_CB, NULL);
}
int
qed_configure_filter_rx_mode(struct ecore_dev *edev,
enum qed_filter_rx_mode_type type)
{
struct ecore_filter_accept_flags accept_flags;
memset(&accept_flags, 0, sizeof(accept_flags));
accept_flags.update_rx_mode_config = 1;
accept_flags.update_tx_mode_config = 1;
accept_flags.rx_accept_filter = ECORE_ACCEPT_UCAST_MATCHED |
ECORE_ACCEPT_MCAST_MATCHED |
ECORE_ACCEPT_BCAST;
accept_flags.tx_accept_filter = ECORE_ACCEPT_UCAST_MATCHED |
ECORE_ACCEPT_MCAST_MATCHED |
ECORE_ACCEPT_BCAST;
if (type == QED_FILTER_RX_MODE_TYPE_PROMISC)
accept_flags.rx_accept_filter |= ECORE_ACCEPT_UCAST_UNMATCHED;
else if (type == QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC)
accept_flags.rx_accept_filter |= ECORE_ACCEPT_MCAST_UNMATCHED;
else if (type == (QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC |
QED_FILTER_RX_MODE_TYPE_PROMISC))
accept_flags.rx_accept_filter |= ECORE_ACCEPT_UCAST_UNMATCHED |
ECORE_ACCEPT_MCAST_UNMATCHED;
return ecore_filter_accept_cmd(edev, 0, accept_flags, false, false,
ECORE_SPQ_MODE_CB, NULL);
}
static int
qed_configure_filter(struct ecore_dev *edev, struct qed_filter_params *params)
{
switch (params->type) {
case QED_FILTER_TYPE_UCAST:
return qed_configure_filter_ucast(edev, &params->filter.ucast);
case QED_FILTER_TYPE_MCAST:
return qed_configure_filter_mcast(edev, &params->filter.mcast);
case QED_FILTER_TYPE_RX_MODE:
return qed_configure_filter_rx_mode(edev,
params->filter.
accept_flags);
default:
DP_NOTICE(edev, true, "Unknown filter type %d\n",
(int)params->type);
return -EINVAL;
}
}
static const struct qed_eth_ops qed_eth_ops_pass = {
INIT_STRUCT_FIELD(common, &qed_common_ops_pass),
INIT_STRUCT_FIELD(fill_dev_info, &qed_fill_eth_dev_info),
INIT_STRUCT_FIELD(vport_start, &qed_start_vport),
INIT_STRUCT_FIELD(vport_stop, &qed_stop_vport),
INIT_STRUCT_FIELD(vport_update, &qed_update_vport),
INIT_STRUCT_FIELD(q_rx_start, &qed_start_rxq),
INIT_STRUCT_FIELD(q_tx_start, &qed_start_txq),
INIT_STRUCT_FIELD(q_rx_stop, &qed_stop_rxq),
INIT_STRUCT_FIELD(q_tx_stop, &qed_stop_txq),
INIT_STRUCT_FIELD(eth_cqe_completion, &qed_fp_cqe_completion),
INIT_STRUCT_FIELD(fastpath_stop, &qed_fastpath_stop),
INIT_STRUCT_FIELD(get_vport_stats, &qed_get_vport_stats),
INIT_STRUCT_FIELD(filter_config, &qed_configure_filter),
};
uint32_t qed_get_protocol_version(enum qed_protocol protocol)
{
switch (protocol) {
case QED_PROTOCOL_ETH:
return QED_ETH_INTERFACE_VERSION;
default:
return 0;
}
}
const struct qed_eth_ops *qed_get_eth_ops(void)
{
return &qed_eth_ops_pass;
}

View File

@ -168,7 +168,7 @@ struct qed_eth_ops {
extern const struct qed_common_ops qed_common_ops_pass;
void qed_put_eth_ops(void);
const struct qed_eth_ops *qed_get_eth_ops();
int qed_configure_filter_rx_mode(struct ecore_dev *edev,
enum qed_filter_rx_mode_type type);

View File

@ -420,6 +420,7 @@ qede_dev_info_get(struct rte_eth_dev *eth_dev,
dev_info->max_mac_addrs = qdev->dev_info.num_mac_addrs;
dev_info->max_vfs = (uint16_t)NUM_OF_VFS(&qdev->edev);
dev_info->driver_name = qdev->drv_ver;
dev_info->reta_size = ECORE_RSS_IND_TABLE_SIZE;
dev_info->flow_type_rss_offloads = (uint64_t)QEDE_RSS_OFFLOAD_ALL;
dev_info->default_txconf = (struct rte_eth_txconf) {
@ -637,6 +638,14 @@ static int qede_dev_set_link_down(struct rte_eth_dev *eth_dev)
return qede_dev_set_link_state(eth_dev, false);
}
static void qede_reset_stats(struct rte_eth_dev *eth_dev)
{
struct qede_dev *qdev = eth_dev->data->dev_private;
struct ecore_dev *edev = &qdev->edev;
ecore_reset_vport_stats(edev);
}
static void qede_allmulticast_enable(struct rte_eth_dev *eth_dev)
{
enum qed_filter_rx_mode_type type =
@ -751,6 +760,7 @@ static const struct eth_dev_ops qede_eth_dev_ops = {
.dev_stop = qede_dev_stop,
.dev_close = qede_dev_close,
.stats_get = qede_get_stats,
.stats_reset = qede_reset_stats,
.mac_addr_add = qede_mac_addr_add,
.mac_addr_remove = qede_mac_addr_remove,
.mac_addr_set = qede_mac_addr_set,
@ -814,6 +824,14 @@ static int qede_common_dev_init(struct rte_eth_dev *eth_dev, bool is_vf)
rte_eth_copy_pci_info(eth_dev, pci_dev);
qed_ver = qed_get_protocol_version(QED_PROTOCOL_ETH);
qed_ops = qed_get_eth_ops();
if (!qed_ops) {
DP_ERR(edev, "Failed to get qed_eth_ops_pass\n");
return -EINVAL;
}
DP_INFO(edev, "Starting qede probe\n");
rc = qed_ops->common->probe(edev, pci_dev, QED_PROTOCOL_ETH,

View File

@ -18,6 +18,7 @@
#include "base/bcm_osal.h"
#include "base/ecore.h"
#include "base/ecore_dev_api.h"
#include "base/ecore_l2_api.h"
#include "base/ecore_sp_api.h"
#include "base/ecore_mcp_api.h"
#include "base/ecore_hsi_common.h"

View File

@ -152,4 +152,13 @@ struct qed_common_ops {
uint32_t dp_module, uint8_t dp_level);
};
/**
* @brief qed_get_protocol_version
*
* @param protocol
*
* @return version supported by qed for given protocol driver
*/
uint32_t qed_get_protocol_version(enum qed_protocol protocol);
#endif /* _QEDE_IF_H */

View File

@ -236,6 +236,8 @@ static int qed_slowpath_start(struct ecore_dev *edev,
return rc;
}
ecore_reset_vport_stats(edev);
return 0;
ecore_hw_stop(edev);

View File

@ -529,6 +529,196 @@ qede_rxfh_indir_default(uint32_t index, uint32_t n_rx_rings)
return index % n_rx_rings;
}
static void qede_prandom_bytes(uint32_t *buff, size_t bytes)
{
unsigned int i;
srand((unsigned int)time(NULL));
for (i = 0; i < ECORE_RSS_KEY_SIZE; i++)
buff[i] = rand();
}
static int
qede_config_rss(struct rte_eth_dev *eth_dev,
struct qed_update_vport_rss_params *rss_params)
{
enum rte_eth_rx_mq_mode mode = eth_dev->data->dev_conf.rxmode.mq_mode;
struct rte_eth_rss_conf rss_conf =
eth_dev->data->dev_conf.rx_adv_conf.rss_conf;
struct qede_dev *qdev = eth_dev->data->dev_private;
struct ecore_dev *edev = &qdev->edev;
unsigned int i;
PMD_INIT_FUNC_TRACE(edev);
/* Check if RSS conditions are met.
* Note: Even though its meaningless to enable RSS with one queue, it
* could be used to produce RSS Hash, so skipping that check.
*/
if (!(mode & ETH_MQ_RX_RSS)) {
DP_INFO(edev, "RSS flag is not set\n");
return -EINVAL;
}
DP_INFO(edev, "RSS flag is set\n");
if (rss_conf.rss_hf == 0) {
DP_NOTICE(edev, false, "No RSS hash function to apply\n");
return -EINVAL;
}
if (rss_conf.rss_key != NULL) {
DP_NOTICE(edev, false,
"User provided RSS key is not supported\n");
return -EINVAL;
}
memset(rss_params, 0, sizeof(*rss_params));
for (i = 0; i < ECORE_RSS_IND_TABLE_SIZE; i++)
rss_params->rss_ind_table[i] = qede_rxfh_indir_default(i,
QEDE_RSS_CNT(qdev));
qede_prandom_bytes(rss_params->rss_key,
sizeof(rss_params->rss_key));
DP_INFO(edev, "RSS check passes\n");
return 0;
}
static int qede_start_queues(struct rte_eth_dev *eth_dev, bool clear_stats)
{
struct qede_dev *qdev = eth_dev->data->dev_private;
struct ecore_dev *edev = &qdev->edev;
struct qed_update_vport_rss_params *rss_params = &qdev->rss_params;
struct qed_dev_info *qed_info = &qdev->dev_info.common;
struct qed_update_vport_params vport_update_params;
struct qed_start_vport_params start = { 0 };
int vlan_removal_en = 1;
int rc, tc, i;
if (!qdev->num_rss) {
DP_ERR(edev,
"Cannot update V-VPORT as active as "
"there are no Rx queues\n");
return -EINVAL;
}
start.remove_inner_vlan = vlan_removal_en;
start.gro_enable = !qdev->gro_disable;
start.mtu = qdev->mtu;
start.vport_id = 0;
start.drop_ttl0 = true;
start.clear_stats = clear_stats;
rc = qdev->ops->vport_start(edev, &start);
if (rc) {
DP_ERR(edev, "Start V-PORT failed %d\n", rc);
return rc;
}
DP_INFO(edev,
"Start vport ramrod passed, vport_id = %d,"
" MTU = %d, vlan_removal_en = %d\n",
start.vport_id, qdev->mtu, vlan_removal_en);
for_each_rss(i) {
struct qede_fastpath *fp = &qdev->fp_array[i];
dma_addr_t p_phys_table;
uint16_t page_cnt;
p_phys_table = ecore_chain_get_pbl_phys(&fp->rxq->rx_comp_ring);
page_cnt = ecore_chain_get_page_cnt(&fp->rxq->rx_comp_ring);
ecore_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0); /* @DPDK */
rc = qdev->ops->q_rx_start(edev, i, i, 0,
fp->sb_info->igu_sb_id,
RX_PI,
fp->rxq->rx_buf_size,
fp->rxq->rx_bd_ring.p_phys_addr,
p_phys_table,
page_cnt,
&fp->rxq->hw_rxq_prod_addr);
if (rc) {
DP_ERR(edev, "Start RXQ #%d failed %d\n", i, rc);
return rc;
}
fp->rxq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[RX_PI];
qede_update_rx_prod(qdev, fp->rxq);
for (tc = 0; tc < qdev->num_tc; tc++) {
struct qede_tx_queue *txq = fp->txqs[tc];
int txq_index = tc * QEDE_RSS_CNT(qdev) + i;
p_phys_table = ecore_chain_get_pbl_phys(&txq->tx_pbl);
page_cnt = ecore_chain_get_page_cnt(&txq->tx_pbl);
rc = qdev->ops->q_tx_start(edev, i, txq_index,
0,
fp->sb_info->igu_sb_id,
TX_PI(tc),
p_phys_table, page_cnt,
&txq->doorbell_addr);
if (rc) {
DP_ERR(edev, "Start txq %u failed %d\n",
txq_index, rc);
return rc;
}
txq->hw_cons_ptr =
&fp->sb_info->sb_virt->pi_array[TX_PI(tc)];
SET_FIELD(txq->tx_db.data.params,
ETH_DB_DATA_DEST, DB_DEST_XCM);
SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD,
DB_AGG_CMD_SET);
SET_FIELD(txq->tx_db.data.params,
ETH_DB_DATA_AGG_VAL_SEL,
DQ_XCM_ETH_TX_BD_PROD_CMD);
txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
}
}
/* Prepare and send the vport enable */
memset(&vport_update_params, 0, sizeof(vport_update_params));
vport_update_params.vport_id = start.vport_id;
vport_update_params.update_vport_active_flg = 1;
vport_update_params.vport_active_flg = 1;
/* @DPDK */
if (qed_info->mf_mode == MF_NPAR && qed_info->tx_switching) {
/* TBD: Check SRIOV enabled for VF */
vport_update_params.update_tx_switching_flg = 1;
vport_update_params.tx_switching_flg = 1;
}
if (!qede_config_rss(eth_dev, rss_params)) {
vport_update_params.update_rss_flg = 1;
qdev->rss_enabled = 1;
DP_INFO(edev, "Updating RSS flag\n");
} else {
qdev->rss_enabled = 0;
DP_INFO(edev, "Not Updating RSS flag\n");
}
rte_memcpy(&vport_update_params.rss_params, rss_params,
sizeof(*rss_params));
rc = qdev->ops->vport_update(edev, &vport_update_params);
if (rc) {
DP_ERR(edev, "Update V-PORT failed %d\n", rc);
return rc;
}
return 0;
}
#ifdef ENC_SUPPORTED
static bool qede_tunn_exist(uint16_t flag)
{
@ -977,6 +1167,8 @@ int qede_dev_start(struct rte_eth_dev *eth_dev)
return -EINVAL;
}
rc = qede_start_queues(eth_dev, true);
if (rc) {
DP_ERR(edev, "Failed to start queues\n");
/* TBD: free */