net/ixgbe: remove fallback code for x86 non-SSE4
Since SSE4 is now part of minimum requirements for DPDK on x86, we no longer need this fallback code. Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
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@ -216,26 +216,11 @@ desc_to_olflags_v(__m128i descs[4], __m128i mbuf_init, uint8_t vlan_flags,
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* appropriate flags means that we have to do a shift and blend for
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* each mbuf before we do the write.
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*/
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#ifdef RTE_MACHINE_CPUFLAG_SSE4_2
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rearm0 = _mm_blend_epi16(mbuf_init, _mm_slli_si128(vtag1, 8), 0x10);
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rearm1 = _mm_blend_epi16(mbuf_init, _mm_slli_si128(vtag1, 6), 0x10);
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rearm2 = _mm_blend_epi16(mbuf_init, _mm_slli_si128(vtag1, 4), 0x10);
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rearm3 = _mm_blend_epi16(mbuf_init, _mm_slli_si128(vtag1, 2), 0x10);
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#else
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rearm0 = _mm_slli_si128(vtag1, 14);
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rearm1 = _mm_slli_si128(vtag1, 12);
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rearm2 = _mm_slli_si128(vtag1, 10);
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rearm3 = _mm_slli_si128(vtag1, 8);
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rearm0 = _mm_or_si128(mbuf_init, _mm_srli_epi64(rearm0, 48));
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rearm1 = _mm_or_si128(mbuf_init, _mm_srli_epi64(rearm1, 48));
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rearm2 = _mm_or_si128(mbuf_init, _mm_srli_epi64(rearm2, 48));
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rearm3 = _mm_or_si128(mbuf_init, _mm_srli_epi64(rearm3, 48));
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#endif /* RTE_MACHINE_CPUFLAG_SSE4_2 */
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/* write the rearm data and the olflags in one write */
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RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, ol_flags) !=
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offsetof(struct rte_mbuf, rearm_data) + 8);
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