net/ice/base: add OS specific implementation
Add some MACRO defination and small functions which are specific for DPDK. Add readme too. Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
This commit is contained in:
Wenzhuo Lu
Ferruh Yigit
parent
64e9587d56
commit
5f0978e962
22
drivers/net/ice/base/README
Normal file
22
drivers/net/ice/base/README
Normal file
@ -0,0 +1,22 @@
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/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2018 Intel Corporation
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*/
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Intel® ICE driver
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==================
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This directory contains source code of FreeBSD ice driver of version
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2018.12.11 released by the team which develops
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basic drivers for any ice NIC. The directory of base/ contains the
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original source package.
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This driver is valid for the product(s) listed below
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* Intel® Ethernet Network Adapters E810
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Updating the driver
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===================
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NOTE: The source code in this directory should not be modified apart from
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the following file(s):
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ice_osdep.h
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524
drivers/net/ice/base/ice_osdep.h
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524
drivers/net/ice/base/ice_osdep.h
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@ -0,0 +1,524 @@
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/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2018 Intel Corporation
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*/
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#ifndef _ICE_OSDEP_H_
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#define _ICE_OSDEP_H_
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#include <string.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <stdarg.h>
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#include <inttypes.h>
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#include <sys/queue.h>
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#include <stdbool.h>
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#include <rte_common.h>
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#include <rte_memcpy.h>
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#include <rte_malloc.h>
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#include <rte_memzone.h>
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#include <rte_byteorder.h>
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#include <rte_cycles.h>
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#include <rte_spinlock.h>
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#include <rte_log.h>
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#include <rte_random.h>
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#include <rte_io.h>
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#include "../ice_logs.h"
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#define INLINE inline
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#define STATIC static
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typedef uint8_t u8;
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typedef int8_t s8;
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typedef uint16_t u16;
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typedef int16_t s16;
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typedef uint32_t u32;
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typedef int32_t s32;
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typedef uint64_t u64;
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typedef uint64_t s64;
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#define __iomem
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#define hw_dbg(hw, S, A...) do {} while (0)
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#define upper_32_bits(n) ((u32)(((n) >> 16) >> 16))
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#define lower_32_bits(n) ((u32)(n))
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#define low_16_bits(x) ((x) & 0xFFFF)
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#define high_16_bits(x) (((x) & 0xFFFF0000) >> 16)
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#ifndef ETH_ADDR_LEN
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#define ETH_ADDR_LEN 6
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#endif
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#ifndef __le16
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#define __le16 uint16_t
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#endif
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#ifndef __le32
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#define __le32 uint32_t
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#endif
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#ifndef __le64
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#define __le64 uint64_t
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#endif
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#ifndef __be16
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#define __be16 uint16_t
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#endif
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#ifndef __be32
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#define __be32 uint32_t
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#endif
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#ifndef __be64
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#define __be64 uint64_t
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#endif
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#ifndef __always_unused
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#define __always_unused __attribute__((unused))
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#endif
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#ifndef __maybe_unused
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#define __maybe_unused __attribute__((unused))
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#endif
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#ifndef __packed
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#define __packed __attribute__((packed))
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#endif
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#ifndef BIT_ULL
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#define BIT_ULL(a) (1ULL << (a))
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#endif
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#define FALSE 0
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#define TRUE 1
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#define false 0
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#define true 1
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#define min(a, b) RTE_MIN(a, b)
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#define max(a, b) RTE_MAX(a, b)
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#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof(arr[0]))
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#define FIELD_SIZEOF(t, f) (sizeof(((t *)0)->f))
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#define MAKEMASK(m, s) ((m) << (s))
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#define DEBUGOUT(S, A...) PMD_DRV_LOG_RAW(DEBUG, S, ##A)
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#define DEBUGFUNC(F) PMD_DRV_LOG_RAW(DEBUG, F)
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#define ice_debug(h, m, s, ...) \
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do { \
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if (((m) & (h)->debug_mask)) \
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PMD_DRV_LOG_RAW(DEBUG, "ice %02x.%x " s, \
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(h)->bus.device, (h)->bus.func, \
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##__VA_ARGS__); \
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} while (0)
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#define ice_info(hw, fmt, args...) ice_debug(hw, ICE_DBG_ALL, fmt, ##args)
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#define ice_warn(hw, fmt, args...) ice_debug(hw, ICE_DBG_ALL, fmt, ##args)
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#define ice_debug_array(hw, type, rowsize, groupsize, buf, len) \
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do { \
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struct ice_hw *hw_l = hw; \
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u16 len_l = len; \
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u8 *buf_l = buf; \
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int i; \
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for (i = 0; i < len_l; i += 8) \
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ice_debug(hw_l, type, \
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"0x%04X 0x%016"PRIx64"\n", \
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i, *((u64 *)((buf_l) + i))); \
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} while (0)
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#define ice_snprintf snprintf
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#ifndef SNPRINTF
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#define SNPRINTF ice_snprintf
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#endif
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#define ICE_PCI_REG(reg) rte_read32(reg)
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#define ICE_PCI_REG_ADDR(a, reg) \
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((volatile uint32_t *)((char *)(a)->hw_addr + (reg)))
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static inline uint32_t ice_read_addr(volatile void *addr)
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{
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return rte_le_to_cpu_32(ICE_PCI_REG(addr));
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}
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#define ICE_PCI_REG_WRITE(reg, value) \
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rte_write32((rte_cpu_to_le_32(value)), reg)
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#define ice_flush(a) ICE_READ_REG((a), GLGEN_STAT)
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#define icevf_flush(a) ICE_READ_REG((a), VFGEN_RSTAT)
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#define ICE_READ_REG(hw, reg) ice_read_addr(ICE_PCI_REG_ADDR((hw), (reg)))
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#define ICE_WRITE_REG(hw, reg, value) \
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ICE_PCI_REG_WRITE(ICE_PCI_REG_ADDR((hw), (reg)), (value))
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#define rd32(a, reg) ice_read_addr(ICE_PCI_REG_ADDR((a), (reg)))
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#define wr32(a, reg, value) \
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ICE_PCI_REG_WRITE(ICE_PCI_REG_ADDR((a), (reg)), (value))
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#define flush(a) ice_read_addr(ICE_PCI_REG_ADDR((a), (GLGEN_STAT)))
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#define div64_long(n, d) ((n) / (d))
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#define BITS_PER_BYTE 8
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typedef u32 ice_bitmap_t;
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#define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
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#define BITS_TO_CHUNKS(nr) DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(ice_bitmap_t))
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#define ice_declare_bitmap(name, bits) \
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ice_bitmap_t name[BITS_TO_CHUNKS(bits)]
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#define BITS_CHUNK_MASK(nr) (((ice_bitmap_t)~0) >> \
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((BITS_PER_BYTE * sizeof(ice_bitmap_t)) - \
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(((nr) - 1) % (BITS_PER_BYTE * sizeof(ice_bitmap_t)) \
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+ 1)))
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#define BITS_PER_CHUNK (BITS_PER_BYTE * sizeof(ice_bitmap_t))
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#define BIT_CHUNK(nr) ((nr) / BITS_PER_CHUNK)
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#define BIT_IN_CHUNK(nr) BIT((nr) % BITS_PER_CHUNK)
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static inline bool ice_is_bit_set(const ice_bitmap_t *bitmap, u16 nr)
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{
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return !!(bitmap[BIT_CHUNK(nr)] & BIT_IN_CHUNK(nr));
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}
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#define ice_and_bitmap(d, b1, b2, sz) \
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ice_intersect_bitmaps((u8 *)d, (u8 *)b1, (const u8 *)b2, (u16)sz)
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static inline int
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ice_intersect_bitmaps(u8 *dst, const u8 *bmp1, const u8 *bmp2, u16 sz)
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{
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u32 res = 0;
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int cnt;
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u16 i;
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/* Utilize 32-bit operations */
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cnt = (sz % BITS_PER_BYTE) ?
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(sz / BITS_PER_BYTE) + 1 : sz / BITS_PER_BYTE;
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for (i = 0; i < cnt / 4; i++) {
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((u32 *)dst)[i] = ((const u32 *)bmp1)[i] &
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((const u32 *)bmp2)[i];
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res |= ((u32 *)dst)[i];
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}
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for (i *= 4; i < cnt; i++) {
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if ((sz % 8 == 0) || (i + 1 < cnt)) {
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dst[i] = bmp1[i] & bmp2[i];
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} else {
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/* Remaining bits that do not occupy the whole byte */
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u8 mask = ~0u >> (8 - (sz % 8));
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dst[i] = bmp1[i] & bmp2[i] & mask;
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}
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res |= dst[i];
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}
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return res != 0;
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}
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static inline int ice_find_first_bit(ice_bitmap_t *name, u16 size)
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{
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u16 i;
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for (i = 0; i < BITS_PER_BYTE * (size / BITS_PER_BYTE); i++)
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if (ice_is_bit_set(name, i))
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return i;
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return size;
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}
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static inline int ice_find_next_bit(ice_bitmap_t *name, u16 size, u16 bits)
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{
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u16 i;
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for (i = bits; i < BITS_PER_BYTE * (size / BITS_PER_BYTE); i++)
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if (ice_is_bit_set(name, i))
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return i;
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return bits;
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}
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#define for_each_set_bit(bit, addr, size) \
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for ((bit) = ice_find_first_bit((addr), (size)); \
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(bit) < (size); \
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(bit) = ice_find_next_bit((addr), (size), (bit) + 1))
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static inline bool ice_is_any_bit_set(ice_bitmap_t *bitmap, u32 bits)
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{
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u32 max_index = BITS_TO_CHUNKS(bits);
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u32 i;
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for (i = 0; i < max_index; i++) {
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if (bitmap[i])
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return true;
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}
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return false;
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}
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/* memory allocation tracking */
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struct ice_dma_mem {
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void *va;
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u64 pa;
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u32 size;
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const void *zone;
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} __attribute__((packed));
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struct ice_virt_mem {
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void *va;
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u32 size;
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} __attribute__((packed));
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#define ice_malloc(h, s) rte_zmalloc(NULL, s, 0)
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#define ice_calloc(h, c, s) rte_zmalloc(NULL, (c) * (s), 0)
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#define ice_free(h, m) rte_free(m)
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#define ice_memset(a, b, c, d) memset((a), (b), (c))
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#define ice_memcpy(a, b, c, d) rte_memcpy((a), (b), (c))
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#define ice_memdup(a, b, c, d) rte_memcpy(ice_malloc(a, c), b, c)
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#define CPU_TO_BE16(o) rte_cpu_to_be_16(o)
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#define CPU_TO_BE32(o) rte_cpu_to_be_32(o)
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#define CPU_TO_BE64(o) rte_cpu_to_be_64(o)
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#define CPU_TO_LE16(o) rte_cpu_to_le_16(o)
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#define CPU_TO_LE32(s) rte_cpu_to_le_32(s)
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#define CPU_TO_LE64(h) rte_cpu_to_le_64(h)
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#define LE16_TO_CPU(a) rte_le_to_cpu_16(a)
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#define LE32_TO_CPU(c) rte_le_to_cpu_32(c)
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#define LE64_TO_CPU(k) rte_le_to_cpu_64(k)
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#define NTOHS(a) rte_be_to_cpu_16(a)
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#define NTOHL(a) rte_be_to_cpu_32(a)
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#define HTONS(a) rte_cpu_to_be_16(a)
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#define HTONL(a) rte_cpu_to_be_32(a)
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static inline void
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ice_set_bit(unsigned int nr, volatile ice_bitmap_t *addr)
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{
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__sync_fetch_and_or(addr, (1UL << nr));
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}
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static inline void
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ice_clear_bit(unsigned int nr, volatile ice_bitmap_t *addr)
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{
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__sync_fetch_and_and(addr, (0UL << nr));
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}
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static inline void
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ice_zero_bitmap(ice_bitmap_t *bmp, u16 size)
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{
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unsigned long mask;
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u16 i;
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for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
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bmp[i] = 0;
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mask = BITS_CHUNK_MASK(size);
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bmp[i] &= ~mask;
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}
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static inline void
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ice_or_bitmap(ice_bitmap_t *dst, const ice_bitmap_t *bmp1,
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const ice_bitmap_t *bmp2, u16 size)
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{
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unsigned long mask;
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u16 i;
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/* Handle all but last chunk*/
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for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
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dst[i] = bmp1[i] | bmp2[i];
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/* We want to only OR bits within the size. Furthermore, we also do
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* not want to modify destination bits which are beyond the specified
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* size. Use a bitmask to ensure that we only modify the bits that are
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* within the specified size.
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*/
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mask = BITS_CHUNK_MASK(size);
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dst[i] &= ~mask;
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dst[i] |= (bmp1[i] | bmp2[i]) & mask;
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}
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static inline void ice_cp_bitmap(ice_bitmap_t *dst, ice_bitmap_t *src, u16 size)
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{
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ice_bitmap_t mask;
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u16 i;
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/* Handle all but last chunk*/
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for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
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dst[i] = src[i];
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/* We want to only copy bits within the size.*/
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mask = BITS_CHUNK_MASK(size);
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dst[i] &= ~mask;
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dst[i] |= src[i] & mask;
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}
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static inline bool
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ice_cmp_bitmap(ice_bitmap_t *bmp1, ice_bitmap_t *bmp2, u16 size)
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{
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ice_bitmap_t mask;
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u16 i;
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/* Handle all but last chunk*/
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for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
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if (bmp1[i] != bmp2[i])
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return false;
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/* We want to only compare bits within the size.*/
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mask = BITS_CHUNK_MASK(size);
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if ((bmp1[i] & mask) != (bmp2[i] & mask))
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return false;
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return true;
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}
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/* SW spinlock */
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struct ice_lock {
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rte_spinlock_t spinlock;
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};
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static inline void
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ice_init_lock(struct ice_lock *sp)
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{
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rte_spinlock_init(&sp->spinlock);
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}
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static inline void
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ice_acquire_lock(struct ice_lock *sp)
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{
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rte_spinlock_lock(&sp->spinlock);
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}
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static inline void
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ice_release_lock(struct ice_lock *sp)
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{
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rte_spinlock_unlock(&sp->spinlock);
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}
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static inline void
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ice_destroy_lock(__attribute__((unused)) struct ice_lock *sp)
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{
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}
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struct ice_hw;
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static inline void *
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ice_alloc_dma_mem(__attribute__((unused)) struct ice_hw *hw,
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struct ice_dma_mem *mem, u64 size)
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{
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const struct rte_memzone *mz = NULL;
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char z_name[RTE_MEMZONE_NAMESIZE];
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if (!mem)
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return NULL;
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snprintf(z_name, sizeof(z_name), "ice_dma_%"PRIu64, rte_rand());
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mz = rte_memzone_reserve_bounded(z_name, size, SOCKET_ID_ANY, 0,
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0, RTE_PGSIZE_2M);
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if (!mz)
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return NULL;
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mem->size = size;
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mem->va = mz->addr;
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mem->pa = mz->phys_addr;
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mem->zone = (const void *)mz;
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PMD_DRV_LOG(DEBUG, "memzone %s allocated with physical address: "
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"%"PRIu64, mz->name, mem->pa);
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return mem->va;
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}
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static inline void
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ice_free_dma_mem(__attribute__((unused)) struct ice_hw *hw,
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struct ice_dma_mem *mem)
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{
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PMD_DRV_LOG(DEBUG, "memzone %s to be freed with physical address: "
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"%"PRIu64, ((const struct rte_memzone *)mem->zone)->name,
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mem->pa);
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rte_memzone_free((const struct rte_memzone *)mem->zone);
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mem->zone = NULL;
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mem->va = NULL;
|
||||
mem->pa = (u64)0;
|
||||
}
|
||||
|
||||
static inline u8
|
||||
ice_hweight8(u32 num)
|
||||
{
|
||||
u8 bits = 0;
|
||||
u32 i;
|
||||
|
||||
for (i = 0; i < 8; i++) {
|
||||
bits += (u8)(num & 0x1);
|
||||
num >>= 1;
|
||||
}
|
||||
|
||||
return bits;
|
||||
}
|
||||
|
||||
#define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
|
||||
#define DELAY(x) rte_delay_us(x)
|
||||
#define ice_usec_delay(x) rte_delay_us(x)
|
||||
#define ice_msec_delay(x, y) rte_delay_us(1000 * (x))
|
||||
#define udelay(x) DELAY(x)
|
||||
#define msleep(x) DELAY(1000 * (x))
|
||||
#define usleep_range(min, max) msleep(DIV_ROUND_UP(min, 1000))
|
||||
|
||||
struct ice_list_entry {
|
||||
LIST_ENTRY(ice_list_entry) next;
|
||||
};
|
||||
|
||||
LIST_HEAD(ice_list_head, ice_list_entry);
|
||||
|
||||
#define LIST_ENTRY_TYPE ice_list_entry
|
||||
#define LIST_HEAD_TYPE ice_list_head
|
||||
#define INIT_LIST_HEAD(list_head) LIST_INIT(list_head)
|
||||
#define LIST_DEL(entry) LIST_REMOVE(entry, next)
|
||||
/* LIST_EMPTY(list_head)) the same in sys/queue.h */
|
||||
|
||||
/*Note parameters are swapped*/
|
||||
#define LIST_FIRST_ENTRY(head, type, field) (type *)((head)->lh_first)
|
||||
#define LIST_ADD(entry, list_head) LIST_INSERT_HEAD(list_head, entry, next)
|
||||
#define LIST_ADD_AFTER(entry, list_entry) \
|
||||
LIST_INSERT_AFTER(list_entry, entry, next)
|
||||
#define LIST_FOR_EACH_ENTRY(pos, head, type, member) \
|
||||
for ((pos) = (head)->lh_first ? \
|
||||
container_of((head)->lh_first, struct type, member) : \
|
||||
0; \
|
||||
(pos); \
|
||||
(pos) = (pos)->member.next.le_next ? \
|
||||
container_of((pos)->member.next.le_next, struct type, \
|
||||
member) : \
|
||||
0)
|
||||
|
||||
#define LIST_REPLACE_INIT(list_head, head) do { \
|
||||
(head)->lh_first = (list_head)->lh_first; \
|
||||
INIT_LIST_HEAD(list_head); \
|
||||
} while (0)
|
||||
|
||||
#define HLIST_NODE_TYPE LIST_ENTRY_TYPE
|
||||
#define HLIST_HEAD_TYPE LIST_HEAD_TYPE
|
||||
#define INIT_HLIST_HEAD(list_head) INIT_LIST_HEAD(list_head)
|
||||
#define HLIST_ADD_HEAD(entry, list_head) LIST_ADD(entry, list_head)
|
||||
#define HLIST_EMPTY(list_head) LIST_EMPTY(list_head)
|
||||
#define HLIST_DEL(entry) LIST_DEL(entry)
|
||||
#define HLIST_FOR_EACH_ENTRY(pos, head, type, member) \
|
||||
LIST_FOR_EACH_ENTRY(pos, head, type, member)
|
||||
#define LIST_FOR_EACH_ENTRY_SAFE(pos, tmp, head, type, member) \
|
||||
LIST_FOR_EACH_ENTRY(pos, head, type, member)
|
||||
|
||||
#ifndef ICE_DBG_TRACE
|
||||
#define ICE_DBG_TRACE BIT_ULL(0)
|
||||
#endif
|
||||
|
||||
#ifndef DIVIDE_AND_ROUND_UP
|
||||
#define DIVIDE_AND_ROUND_UP(a, b) (((a) + (b) - 1) / (b))
|
||||
#endif
|
||||
|
||||
#ifndef ICE_INTEL_VENDOR_ID
|
||||
#define ICE_INTEL_VENDOR_ID 0x8086
|
||||
#endif
|
||||
|
||||
#ifndef IS_UNICAST_ETHER_ADDR
|
||||
#define IS_UNICAST_ETHER_ADDR(addr) \
|
||||
((bool)((((u8 *)(addr))[0] % ((u8)0x2)) == 0))
|
||||
#endif
|
||||
|
||||
#ifndef IS_MULTICAST_ETHER_ADDR
|
||||
#define IS_MULTICAST_ETHER_ADDR(addr) \
|
||||
((bool)((((u8 *)(addr))[0] % ((u8)0x2)) == 1))
|
||||
#endif
|
||||
|
||||
#ifndef IS_BROADCAST_ETHER_ADDR
|
||||
/* Check whether an address is broadcast. */
|
||||
#define IS_BROADCAST_ETHER_ADDR(addr) \
|
||||
((bool)((((u16 *)(addr))[0] == ((u16)0xffff))))
|
||||
#endif
|
||||
|
||||
#ifndef IS_ZERO_ETHER_ADDR
|
||||
#define IS_ZERO_ETHER_ADDR(addr) \
|
||||
(((bool)((((u16 *)(addr))[0] == ((u16)0x0)))) && \
|
||||
((bool)((((u16 *)(addr))[1] == ((u16)0x0)))) && \
|
||||
((bool)((((u16 *)(addr))[2] == ((u16)0x0)))))
|
||||
#endif
|
||||
|
||||
#endif /* _ICE_OSDEP_H_ */
|
||||
Loading…
Reference in New Issue
Block a user