ethdev: reduce alignment requirement for 128-byte cache line
slow-path data structures need not be 128-byte cache aligned. Reduce the alignment to 64-byte to save the memory. No behavior change for 64-byte cache aligned systems as minimum cache line size as 64. Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
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@ -863,7 +863,7 @@ struct rte_eth_rxq_info {
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struct rte_eth_rxconf conf; /**< queue config parameters. */
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uint8_t scattered_rx; /**< scattered packets RX supported. */
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uint16_t nb_desc; /**< configured number of RXDs. */
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} __rte_cache_aligned;
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} __rte_cache_min_aligned;
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/**
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* Ethernet device TX queue information structure.
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@ -872,7 +872,7 @@ struct rte_eth_rxq_info {
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struct rte_eth_txq_info {
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struct rte_eth_txconf conf; /**< queue config parameters. */
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uint16_t nb_desc; /**< configured number of TXDs. */
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} __rte_cache_aligned;
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} __rte_cache_min_aligned;
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/** Maximum name length for extended statistics counters */
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#define RTE_ETH_XSTATS_NAME_SIZE 64
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