event/sw: support event queues
Add in the data structures for the event queues, and the eventdev functions to create and destroy those queues. Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Signed-off-by: Harry van Haaren <harry.van.haaren@intel.com> Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
This commit is contained in:
Bruce Richardson
Jerin Jacob
parent
1a3a4531dc
commit
5ffb2f142d
176
drivers/event/sw/iq_ring.h
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176
drivers/event/sw/iq_ring.h
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@ -0,0 +1,176 @@
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/*-
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* BSD LICENSE
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*
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* Copyright(c) 2016-2017 Intel Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Ring structure definitions used for the internal ring buffers of the
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* SW eventdev implementation. These are designed for single-core use only.
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*/
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#ifndef _IQ_RING_
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#define _IQ_RING_
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#include <stdint.h>
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#include <rte_common.h>
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#include <rte_memory.h>
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#include <rte_malloc.h>
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#include <rte_eventdev.h>
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#define IQ_RING_NAMESIZE 12
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#define QID_IQ_DEPTH 512
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#define QID_IQ_MASK (uint16_t)(QID_IQ_DEPTH - 1)
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struct iq_ring {
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char name[IQ_RING_NAMESIZE] __rte_cache_aligned;
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uint16_t write_idx;
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uint16_t read_idx;
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struct rte_event ring[QID_IQ_DEPTH];
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};
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#ifndef force_inline
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#define force_inline inline __attribute__((always_inline))
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#endif
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static inline struct iq_ring *
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iq_ring_create(const char *name, unsigned int socket_id)
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{
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struct iq_ring *retval;
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retval = rte_malloc_socket(NULL, sizeof(*retval), 0, socket_id);
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if (retval == NULL)
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goto end;
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snprintf(retval->name, sizeof(retval->name), "%s", name);
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retval->write_idx = retval->read_idx = 0;
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end:
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return retval;
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}
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static inline void
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iq_ring_destroy(struct iq_ring *r)
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{
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rte_free(r);
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}
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static force_inline uint16_t
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iq_ring_count(const struct iq_ring *r)
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{
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return r->write_idx - r->read_idx;
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}
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static force_inline uint16_t
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iq_ring_free_count(const struct iq_ring *r)
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{
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return QID_IQ_MASK - iq_ring_count(r);
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}
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static force_inline uint16_t
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iq_ring_enqueue_burst(struct iq_ring *r, struct rte_event *qes, uint16_t nb_qes)
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{
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const uint16_t read = r->read_idx;
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uint16_t write = r->write_idx;
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const uint16_t space = read + QID_IQ_MASK - write;
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uint16_t i;
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if (space < nb_qes)
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nb_qes = space;
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for (i = 0; i < nb_qes; i++, write++)
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r->ring[write & QID_IQ_MASK] = qes[i];
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r->write_idx = write;
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return nb_qes;
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}
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static force_inline uint16_t
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iq_ring_dequeue_burst(struct iq_ring *r, struct rte_event *qes, uint16_t nb_qes)
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{
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uint16_t read = r->read_idx;
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const uint16_t write = r->write_idx;
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const uint16_t items = write - read;
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uint16_t i;
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for (i = 0; i < nb_qes; i++, read++)
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qes[i] = r->ring[read & QID_IQ_MASK];
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if (items < nb_qes)
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nb_qes = items;
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r->read_idx += nb_qes;
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return nb_qes;
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}
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/* assumes there is space, from a previous dequeue_burst */
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static force_inline uint16_t
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iq_ring_put_back(struct iq_ring *r, struct rte_event *qes, uint16_t nb_qes)
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{
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uint16_t i, read = r->read_idx;
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for (i = nb_qes; i-- > 0; )
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r->ring[--read & QID_IQ_MASK] = qes[i];
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r->read_idx = read;
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return nb_qes;
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}
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static force_inline const struct rte_event *
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iq_ring_peek(const struct iq_ring *r)
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{
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return &r->ring[r->read_idx & QID_IQ_MASK];
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}
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static force_inline void
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iq_ring_pop(struct iq_ring *r)
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{
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r->read_idx++;
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}
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static force_inline int
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iq_ring_enqueue(struct iq_ring *r, const struct rte_event *qe)
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{
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const uint16_t read = r->read_idx;
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const uint16_t write = r->write_idx;
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const uint16_t space = read + QID_IQ_MASK - write;
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if (space == 0)
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return -1;
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r->ring[write & QID_IQ_MASK] = *qe;
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r->write_idx = write + 1;
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return 0;
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}
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#endif
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@ -38,12 +38,178 @@
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#include <rte_ring.h>
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#include "sw_evdev.h"
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#include "iq_ring.h"
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#define EVENTDEV_NAME_SW_PMD event_sw
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#define NUMA_NODE_ARG "numa_node"
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#define SCHED_QUANTA_ARG "sched_quanta"
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#define CREDIT_QUANTA_ARG "credit_quanta"
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static int32_t
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qid_init(struct sw_evdev *sw, unsigned int idx, int type,
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const struct rte_event_queue_conf *queue_conf)
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{
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unsigned int i;
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int dev_id = sw->data->dev_id;
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int socket_id = sw->data->socket_id;
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char buf[IQ_RING_NAMESIZE];
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struct sw_qid *qid = &sw->qids[idx];
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for (i = 0; i < SW_IQS_MAX; i++) {
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snprintf(buf, sizeof(buf), "q_%u_iq_%d", idx, i);
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qid->iq[i] = iq_ring_create(buf, socket_id);
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if (!qid->iq[i]) {
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SW_LOG_DBG("ring create failed");
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goto cleanup;
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}
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}
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/* Initialize the FID structures to no pinning (-1), and zero packets */
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const struct sw_fid_t fid = {.cq = -1, .pcount = 0};
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for (i = 0; i < RTE_DIM(qid->fids); i++)
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qid->fids[i] = fid;
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qid->id = idx;
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qid->type = type;
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qid->priority = queue_conf->priority;
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if (qid->type == RTE_SCHED_TYPE_ORDERED) {
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char ring_name[RTE_RING_NAMESIZE];
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uint32_t window_size;
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/* rte_ring and window_size_mask require require window_size to
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* be a power-of-2.
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*/
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window_size = rte_align32pow2(
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queue_conf->nb_atomic_order_sequences);
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qid->window_size = window_size - 1;
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if (!window_size) {
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SW_LOG_DBG(
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"invalid reorder_window_size for ordered queue\n"
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);
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goto cleanup;
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}
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snprintf(buf, sizeof(buf), "sw%d_iq_%d_rob", dev_id, i);
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qid->reorder_buffer = rte_zmalloc_socket(buf,
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window_size * sizeof(qid->reorder_buffer[0]),
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0, socket_id);
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if (!qid->reorder_buffer) {
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SW_LOG_DBG("reorder_buffer malloc failed\n");
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goto cleanup;
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}
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memset(&qid->reorder_buffer[0],
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0,
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window_size * sizeof(qid->reorder_buffer[0]));
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snprintf(ring_name, sizeof(ring_name), "sw%d_q%d_freelist",
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dev_id, idx);
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/* lookup the ring, and if it already exists, free it */
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struct rte_ring *cleanup = rte_ring_lookup(ring_name);
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if (cleanup)
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rte_ring_free(cleanup);
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qid->reorder_buffer_freelist = rte_ring_create(ring_name,
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window_size,
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socket_id,
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RING_F_SP_ENQ | RING_F_SC_DEQ);
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if (!qid->reorder_buffer_freelist) {
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SW_LOG_DBG("freelist ring create failed");
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goto cleanup;
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}
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/* Populate the freelist with reorder buffer entries. Enqueue
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* 'window_size - 1' entries because the rte_ring holds only
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* that many.
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*/
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for (i = 0; i < window_size - 1; i++) {
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if (rte_ring_sp_enqueue(qid->reorder_buffer_freelist,
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&qid->reorder_buffer[i]) < 0)
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goto cleanup;
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}
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qid->reorder_buffer_index = 0;
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qid->cq_next_tx = 0;
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}
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qid->initialized = 1;
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return 0;
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cleanup:
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for (i = 0; i < SW_IQS_MAX; i++) {
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if (qid->iq[i])
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iq_ring_destroy(qid->iq[i]);
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}
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if (qid->reorder_buffer) {
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rte_free(qid->reorder_buffer);
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qid->reorder_buffer = NULL;
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}
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if (qid->reorder_buffer_freelist) {
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rte_ring_free(qid->reorder_buffer_freelist);
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qid->reorder_buffer_freelist = NULL;
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}
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return -EINVAL;
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}
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static int
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sw_queue_setup(struct rte_eventdev *dev, uint8_t queue_id,
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const struct rte_event_queue_conf *conf)
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{
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int type;
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/* SINGLE_LINK can be OR-ed with other types, so handle first */
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if (RTE_EVENT_QUEUE_CFG_SINGLE_LINK & conf->event_queue_cfg) {
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type = SW_SCHED_TYPE_DIRECT;
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} else {
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switch (conf->event_queue_cfg) {
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case RTE_EVENT_QUEUE_CFG_ATOMIC_ONLY:
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type = RTE_SCHED_TYPE_ATOMIC;
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break;
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case RTE_EVENT_QUEUE_CFG_ORDERED_ONLY:
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type = RTE_SCHED_TYPE_ORDERED;
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break;
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case RTE_EVENT_QUEUE_CFG_PARALLEL_ONLY:
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type = RTE_SCHED_TYPE_PARALLEL;
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break;
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case RTE_EVENT_QUEUE_CFG_ALL_TYPES:
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SW_LOG_ERR("QUEUE_CFG_ALL_TYPES not supported\n");
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return -ENOTSUP;
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default:
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SW_LOG_ERR("Unknown queue type %d requested\n",
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conf->event_queue_cfg);
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return -EINVAL;
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}
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}
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struct sw_evdev *sw = sw_pmd_priv(dev);
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return qid_init(sw, queue_id, type, conf);
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}
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static void
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sw_queue_release(struct rte_eventdev *dev, uint8_t id)
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{
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struct sw_evdev *sw = sw_pmd_priv(dev);
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struct sw_qid *qid = &sw->qids[id];
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uint32_t i;
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for (i = 0; i < SW_IQS_MAX; i++)
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iq_ring_destroy(qid->iq[i]);
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if (qid->type == RTE_SCHED_TYPE_ORDERED) {
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rte_free(qid->reorder_buffer);
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rte_ring_free(qid->reorder_buffer_freelist);
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}
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memset(qid, 0, sizeof(*qid));
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}
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static void
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sw_queue_def_conf(struct rte_eventdev *dev, uint8_t queue_id,
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struct rte_event_queue_conf *conf)
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@ -150,6 +316,8 @@ sw_probe(const char *name, const char *params)
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.dev_infos_get = sw_info_get,
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.queue_def_conf = sw_queue_def_conf,
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.queue_setup = sw_queue_setup,
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.queue_release = sw_queue_release,
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.port_def_conf = sw_port_def_conf,
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};
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@ -52,6 +52,8 @@
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#define EVENTDEV_NAME_SW_PMD event_sw
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#define SW_PMD_NAME RTE_STR(event_sw)
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#define SW_SCHED_TYPE_DIRECT (RTE_SCHED_TYPE_PARALLEL + 1)
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#ifdef RTE_LIBRTE_PMD_EVDEV_SW_DEBUG
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#define SW_LOG_INFO(fmt, args...) \
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RTE_LOG(INFO, EVENTDEV, "[%s] %s() line %u: " fmt "\n", \
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@ -139,6 +141,9 @@ struct sw_evdev {
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*/
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uint32_t nb_events_limit;
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/* Internal queues - one per logical queue */
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struct sw_qid qids[RTE_EVENT_MAX_QUEUES_PER_DEV] __rte_cache_aligned;
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int32_t sched_quanta;
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uint32_t credit_update_quanta;
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