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common/mlx5: read software parsing capabilities from DevX

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mlx5 in Windows needs the software parsing hca capabilities
to query the NIC for TSO and Checksum offloading support.

Added the capability as part of the capabilities
queried by the PMD using DevX.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Tested-by: Idan Hackmon <idanhac@nvidia.com>
This commit is contained in:
Tal Shnaiderman 2021-10-12 15:45:43 +03:00 committed by Raslan Darawsheh
parent accf3cfce4
commit 643e4db076
2 changed files with 9 additions and 0 deletions
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6
drivers/common/mlx5/mlx5_devx_cmds.c
View File

@ -1000,6 +1000,12 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
hcattr, tunnel_lro_gre);
attr->tunnel_lro_vxlan = MLX5_GET(per_protocol_networking_offload_caps,
hcattr, tunnel_lro_vxlan);
attr->swp = MLX5_GET(per_protocol_networking_offload_caps,
hcattr, swp);
attr->swp_csum = MLX5_GET(per_protocol_networking_offload_caps,
hcattr, swp_csum);
attr->swp_lso = MLX5_GET(per_protocol_networking_offload_caps,
hcattr, swp_lso);
attr->lro_max_msg_sz_mode = MLX5_GET
(per_protocol_networking_offload_caps,
hcattr, lro_max_msg_sz_mode);

3
drivers/common/mlx5/mlx5_devx_cmds.h
View File

@ -116,6 +116,9 @@ struct mlx5_hca_attr {
uint32_t lro_cap:1;
uint32_t tunnel_lro_gre:1;
uint32_t tunnel_lro_vxlan:1;
uint32_t swp:1;
uint32_t swp_csum:1;
uint32_t swp_lso:1;
uint32_t lro_max_msg_sz_mode:2;
uint32_t lro_timer_supported_periods[MLX5_LRO_NUM_SUPP_PERIODS];
uint16_t lro_min_mss_size;