ixgbe/base: add X550em LPLU support
This patch adds SW Low Power Link Up (LPLU) support for x550em PHY. Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com> Acked-by: Helin Zhang <helin.zhang@intel.com>
This commit is contained in:
Wenzhuo Lu
Thomas Monjalon
parent
f3430431ab
commit
64b91e05b1
@ -1267,6 +1267,19 @@ void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf)
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hw->mac.ops.restore_mdd_vf(hw, vf);
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}
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/**
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* ixgbe_enter_lplu - Transition to low power states
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* @hw: pointer to hardware structure
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*
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* Configures Low Power Link Up on transition to low power states
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* (from D0 to non-D0).
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**/
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s32 ixgbe_enter_lplu(struct ixgbe_hw *hw)
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{
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return ixgbe_call_func(hw, hw->phy.ops.enter_lplu, (hw),
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IXGBE_NOT_IMPLEMENTED);
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}
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/**
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* ixgbe_read_analog_reg8 - Reads 8 bit analog register
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* @hw: pointer to hardware structure
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@ -210,6 +210,7 @@ void ixgbe_disable_mdd(struct ixgbe_hw *hw);
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void ixgbe_enable_mdd(struct ixgbe_hw *hw);
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void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap);
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void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf);
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s32 ixgbe_enter_lplu(struct ixgbe_hw *hw);
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void ixgbe_set_rate_select_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed);
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void ixgbe_disable_rx(struct ixgbe_hw *hw);
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void ixgbe_enable_rx(struct ixgbe_hw *hw);
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@ -1377,6 +1377,7 @@ struct ixgbe_dmac_config {
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#define IXGBE_MDIO_AUTO_NEG_CONTROL 0x0 /* AUTO_NEG Control Reg */
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#define IXGBE_MDIO_AUTO_NEG_STATUS 0x1 /* AUTO_NEG Status Reg */
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#define IXGBE_MDIO_AUTO_NEG_VENDOR_STAT 0xC800 /* AUTO_NEG Vendor Status Reg */
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#define IXGBE_MDIO_AUTO_NEG_VENDOR_TX_ALARM 0xCC00 /* AUTO_NEG Vendor TX Reg */
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#define IXGBE_MDIO_AUTO_NEG_ADVT 0x10 /* AUTO_NEG Advt Reg */
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#define IXGBE_MDIO_AUTO_NEG_LP 0x13 /* AUTO_NEG LP Status Reg */
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#define IXGBE_MDIO_AUTO_NEG_EEE_ADVT 0x3C /* AUTO_NEG EEE Advt Reg */
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@ -1396,6 +1397,10 @@ struct ixgbe_dmac_config {
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#define IXGBE_MDIO_PHY_1000BASET_ABILITY 0x0020 /* 1000BaseT capable */
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#define IXGBE_MDIO_PHY_100BASETX_ABILITY 0x0080 /* 100BaseTX capable */
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#define IXGBE_MDIO_PHY_SET_LOW_POWER_MODE 0x0800 /* Set low power mode */
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#define IXGBE_AUTO_NEG_LP_STATUS 0xE820 /* AUTO NEG Rx LP Status Reg */
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#define IXGBE_AUTO_NEG_LP_1000BASE_CAP 0x8000 /* AUTO NEG Rx LP 1000BaseT Cap */
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#define IXGBE_AUTO_NEG_LP_10GBASE_CAP 0x0800 /* AUTO NEG Rx LP 10GBaseT Cap */
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#define IXGBE_AUTO_NEG_10GBASET_STAT 0x0021 /* AUTO NEG 10G BaseT Stat */
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#define IXGBE_MDIO_TX_VENDOR_ALARMS_3 0xCC02 /* Vendor Alarms 3 Reg */
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#define IXGBE_MDIO_TX_VENDOR_ALARMS_3_RST_MASK 0x3 /* PHY Reset Complete Mask */
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@ -1423,7 +1428,8 @@ struct ixgbe_dmac_config {
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#define IXGBE_MDIO_AUTO_NEG_LINK_STATUS 0x4 /* Indicates if link is up */
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#define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_MASK 0x7 /* Speed/Duplex Mask */
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#define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_MASK 0x7 /* Speed/Duplex Mask */
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#define IXGBE_MDIO_AUTO_NEG_VEN_STAT_SPEED_MASK 0x6 /* Speed Mask */
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#define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_10M_HALF 0x0 /* 10Mb/s Half Duplex */
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#define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_10M_FULL 0x1 /* 10Mb/s Full Duplex */
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#define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_100M_HALF 0x2 /* 100Mb/s Half Duplex */
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@ -1432,6 +1438,8 @@ struct ixgbe_dmac_config {
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#define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_1GB_FULL 0x5 /* 1Gb/s Full Duplex */
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#define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_10GB_HALF 0x6 /* 10Gb/s Half Duplex */
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#define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_10GB_FULL 0x7 /* 10Gb/s Full Duplex */
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#define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_1GB 0x4 /* 1Gb/s */
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#define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_10GB 0x6 /* 10Gb/s */
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#define IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG 0x20 /* 10G Control Reg */
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#define IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG 0xC400 /* 1G Provisioning 1 */
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@ -2165,6 +2173,11 @@ enum {
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#define IXGBE_NVM_POLL_WRITE 1 /* Flag for polling for wr complete */
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#define IXGBE_NVM_POLL_READ 0 /* Flag for polling for rd complete */
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#define NVM_INIT_CTRL_3 0x38
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#define NVM_INIT_CTRL_3_LPLU 0x8
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#define NVM_INIT_CTRL_3_D10GMP_PORT0 0x40
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#define NVM_INIT_CTRL_3_D10GMP_PORT1 0x100
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#define IXGBE_ETH_LENGTH_OF_ADDRESS 6
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#define IXGBE_EEPROM_PAGE_SIZE_MAX 128
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@ -3627,6 +3640,7 @@ struct ixgbe_phy_operations {
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s32 (*write_i2c_combined)(struct ixgbe_hw *, u8 addr, u16 reg, u16 val);
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s32 (*check_overtemp)(struct ixgbe_hw *);
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s32 (*set_phy_power)(struct ixgbe_hw *, bool on);
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s32 (*enter_lplu)(struct ixgbe_hw *);
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s32 (*read_i2c_combined_unlocked)(struct ixgbe_hw *, u8 addr, u16 reg,
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u16 *value);
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s32 (*write_i2c_combined_unlocked)(struct ixgbe_hw *, u8 addr, u16 reg,
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@ -3644,6 +3658,7 @@ struct ixgbe_eeprom_info {
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u16 word_size;
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u16 address_bits;
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u16 word_page_size;
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u16 ctrl_word_3;
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};
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#define IXGBE_FLAGS_DOUBLE_RESET_REQUIRED 0x01
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@ -1143,6 +1143,7 @@ s32 ixgbe_init_phy_ops_X550em(struct ixgbe_hw *hw)
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break;
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case ixgbe_phy_x550em_ext_t:
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phy->ops.setup_internal_link = ixgbe_setup_internal_phy_x550em;
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phy->ops.enter_lplu = ixgbe_enter_lplu_t_x550em;
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break;
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default:
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break;
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@ -2334,3 +2335,175 @@ void ixgbe_disable_rx_x550(struct ixgbe_hw *hw)
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}
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}
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}
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/**
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* ixgbe_enter_lplu_x550em - Transition to low power states
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* @hw: pointer to hardware structure
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*
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* Configures Low Power Link Up on transition to low power states
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* (from D0 to non-D0). Link is required to enter LPLU so avoid resetting the
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* X557 PHY immediately prior to entering LPLU.
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**/
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s32 ixgbe_enter_lplu_t_x550em(struct ixgbe_hw *hw)
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{
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u16 autoneg_status, an_10g_cntl_reg, autoneg_reg, speed;
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s32 status;
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ixgbe_link_speed lcd_speed;
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/* If blocked by MNG FW, then don't restart AN */
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if (ixgbe_check_reset_blocked(hw))
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return IXGBE_SUCCESS;
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status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS,
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IXGBE_MDIO_AUTO_NEG_DEV_TYPE,
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&autoneg_status);
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if (status != IXGBE_SUCCESS)
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return status;
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status = ixgbe_read_eeprom(hw, NVM_INIT_CTRL_3, &hw->eeprom.ctrl_word_3);
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if (status != IXGBE_SUCCESS)
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return status;
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/* If link is down, LPLU disabled in NVM, WoL disabled, or manageability
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* disabled, then force link down by entering low power mode.
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*/
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if (!(autoneg_status & IXGBE_MDIO_AUTO_NEG_LINK_STATUS) ||
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!(hw->eeprom.ctrl_word_3 & NVM_INIT_CTRL_3_LPLU) ||
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!(hw->wol_enabled || ixgbe_mng_present(hw)))
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return ixgbe_set_copper_phy_power(hw, FALSE);
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/* Determine LCD */
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status = ixgbe_get_lcd_t_x550em(hw, &lcd_speed);
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if (status != IXGBE_SUCCESS)
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return status;
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/* If no valid LCD link speed, then force link down and exit. */
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if (lcd_speed == IXGBE_LINK_SPEED_UNKNOWN)
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return ixgbe_set_copper_phy_power(hw, FALSE);
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status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_VENDOR_STAT,
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IXGBE_MDIO_AUTO_NEG_DEV_TYPE,
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&speed);
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if (status != IXGBE_SUCCESS)
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return status;
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/* clear everything but the speed bits */
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speed &= IXGBE_MDIO_AUTO_NEG_VEN_STAT_SPEED_MASK;
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/* If current speed is already LCD, then exit. */
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if (((speed == IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_1GB) &&
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(lcd_speed == IXGBE_LINK_SPEED_1GB_FULL)) ||
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((speed == IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_10GB) &&
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(lcd_speed == IXGBE_LINK_SPEED_10GB_FULL)))
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return status;
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/* Clear AN completed indication */
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status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_VENDOR_TX_ALARM,
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IXGBE_MDIO_AUTO_NEG_DEV_TYPE,
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&autoneg_status);
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if (status != IXGBE_SUCCESS)
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return status;
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status = hw->phy.ops.read_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG,
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IXGBE_MDIO_AUTO_NEG_DEV_TYPE,
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&an_10g_cntl_reg);
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if (status != IXGBE_SUCCESS)
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return status;
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status = hw->phy.ops.read_reg(hw,
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IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG,
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IXGBE_MDIO_AUTO_NEG_DEV_TYPE,
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&autoneg_reg);
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if (status != IXGBE_SUCCESS)
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return status;
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/* Set AN advertizement to only include LCD */
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if (lcd_speed == IXGBE_LINK_SPEED_1GB_FULL) {
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an_10g_cntl_reg &= ~IXGBE_MII_10GBASE_T_ADVERTISE;
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autoneg_reg |= IXGBE_MII_1GBASE_T_ADVERTISE;
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}
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if (lcd_speed == IXGBE_LINK_SPEED_10GB_FULL) {
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an_10g_cntl_reg |= IXGBE_MII_10GBASE_T_ADVERTISE;
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autoneg_reg &= ~IXGBE_MII_1GBASE_T_ADVERTISE;
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}
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status = hw->phy.ops.write_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG,
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IXGBE_MDIO_AUTO_NEG_DEV_TYPE,
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an_10g_cntl_reg);
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if (status != IXGBE_SUCCESS)
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return status;
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status = hw->phy.ops.write_reg(hw,
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IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG,
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IXGBE_MDIO_AUTO_NEG_DEV_TYPE,
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autoneg_reg);
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if (status != IXGBE_SUCCESS)
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return status;
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/* Restart PHY auto-negotiation. */
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status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_CONTROL,
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IXGBE_MDIO_AUTO_NEG_DEV_TYPE, &autoneg_reg);
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if (status != IXGBE_SUCCESS)
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return status;
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autoneg_reg |= IXGBE_MII_RESTART;
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status = hw->phy.ops.write_reg(hw, IXGBE_MDIO_AUTO_NEG_CONTROL,
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IXGBE_MDIO_AUTO_NEG_DEV_TYPE, autoneg_reg);
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if (status != IXGBE_SUCCESS)
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return status;
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status = ixgbe_setup_ixfi_x550em(hw, &lcd_speed);
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return status;
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}
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/**
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* ixgbe_get_lcd_x550em - Determine lowest common denominator
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* @hw: pointer to hardware structure
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* @lcd_speed: pointer to lowest common link speed
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*
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* Determine lowest common link speed with link partner.
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**/
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s32 ixgbe_get_lcd_t_x550em(struct ixgbe_hw *hw, ixgbe_link_speed *lcd_speed)
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{
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u16 an_lp_status;
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s32 status;
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u16 word = hw->eeprom.ctrl_word_3;
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*lcd_speed = IXGBE_LINK_SPEED_UNKNOWN;
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status = hw->phy.ops.read_reg(hw, IXGBE_AUTO_NEG_LP_STATUS,
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IXGBE_MDIO_AUTO_NEG_DEV_TYPE,
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&an_lp_status);
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if (status != IXGBE_SUCCESS)
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return status;
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/* If link partner advertised 1G, return 1G */
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if (an_lp_status & IXGBE_AUTO_NEG_LP_1000BASE_CAP) {
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*lcd_speed = IXGBE_LINK_SPEED_1GB_FULL;
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return status;
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}
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/* If 10G disabled for LPLU via NVM D10GMP, then return no valid LCD */
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if ((hw->bus.lan_id && (word & NVM_INIT_CTRL_3_D10GMP_PORT1)) ||
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(word & NVM_INIT_CTRL_3_D10GMP_PORT0))
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return status;
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/* Link partner not capable of lower speeds, return 10G */
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*lcd_speed = IXGBE_LINK_SPEED_10GB_FULL;
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return status;
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}
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@ -87,6 +87,8 @@ s32 ixgbe_setup_internal_phy_x550em(struct ixgbe_hw *hw);
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s32 ixgbe_setup_phy_loopback_x550em(struct ixgbe_hw *hw);
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u32 ixgbe_get_supported_physical_layer_X550em(struct ixgbe_hw *hw);
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void ixgbe_disable_rx_x550(struct ixgbe_hw *hw);
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s32 ixgbe_get_lcd_t_x550em(struct ixgbe_hw *hw, ixgbe_link_speed *lcd_speed);
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s32 ixgbe_enter_lplu_t_x550em(struct ixgbe_hw *hw);
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s32 ixgbe_setup_mac_link_sfp_x550em(struct ixgbe_hw *hw,
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ixgbe_link_speed speed,
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bool autoneg_wait_to_complete);
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