net/hns3: support Tx descriptor status query
Add support for query Tx descriptor status in hns3 driver. Check the descriptor specified and provide the status information of the corresponding descriptor. Signed-off-by: Hongbo Zheng <zhenghongbo3@huawei.com> Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
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@ -35,6 +35,7 @@ L4 checksum offload = Y
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Inner L3 checksum = Y
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Inner L4 checksum = Y
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Packet type parsing = Y
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Tx descriptor status = Y
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Basic stats = Y
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Extended stats = Y
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Stats per queue = Y
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@ -32,6 +32,7 @@ L4 checksum offload = Y
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Inner L3 checksum = Y
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Inner L4 checksum = Y
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Packet type parsing = Y
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Tx descriptor status = Y
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Basic stats = Y
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Extended stats = Y
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Stats per queue = Y
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@ -88,6 +88,7 @@ New Features
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* Added support for copper port in Kunpeng930.
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* Added support for runtime config to select IO burst function.
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* Added support for outer UDP checksum in Kunpeng930.
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* Added support for query Tx descriptor status.
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* **Updated NXP DPAA driver.**
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@ -6774,6 +6774,7 @@ hns3_dev_init(struct rte_eth_dev *eth_dev)
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eth_dev->rx_pkt_burst = NULL;
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eth_dev->tx_pkt_burst = NULL;
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eth_dev->tx_pkt_prepare = NULL;
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eth_dev->tx_descriptor_status = NULL;
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rte_free(eth_dev->process_private);
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eth_dev->process_private = NULL;
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return ret;
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@ -2917,6 +2917,7 @@ hns3vf_dev_init(struct rte_eth_dev *eth_dev)
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eth_dev->rx_pkt_burst = NULL;
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eth_dev->tx_pkt_burst = NULL;
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eth_dev->tx_pkt_prepare = NULL;
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eth_dev->tx_descriptor_status = NULL;
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rte_free(eth_dev->process_private);
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eth_dev->process_private = NULL;
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@ -4044,6 +4044,7 @@ void hns3_set_rxtx_function(struct rte_eth_dev *eth_dev)
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eth_dev->rx_pkt_burst = hns3_get_rx_function(eth_dev);
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eth_dev->tx_pkt_burst = hns3_get_tx_function(eth_dev, &prep);
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eth_dev->tx_pkt_prepare = prep;
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eth_dev->tx_descriptor_status = hns3_dev_tx_descriptor_status;
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} else {
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eth_dev->rx_pkt_burst = hns3_dummy_rxtx_burst;
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eth_dev->tx_pkt_burst = hns3_dummy_rxtx_burst;
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@ -4256,6 +4257,33 @@ hns3_tx_done_cleanup(void *txq, uint32_t free_cnt)
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return -ENOTSUP;
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}
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int
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hns3_dev_tx_descriptor_status(void *tx_queue, uint16_t offset)
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{
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volatile struct hns3_desc *txdp;
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struct hns3_tx_queue *txq;
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struct rte_eth_dev *dev;
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uint16_t desc_id;
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txq = (struct hns3_tx_queue *)tx_queue;
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if (offset >= txq->nb_tx_desc)
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return -EINVAL;
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dev = &rte_eth_devices[txq->port_id];
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if (dev->tx_pkt_burst != hns3_xmit_pkts_simple &&
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dev->tx_pkt_burst != hns3_xmit_pkts &&
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dev->tx_pkt_burst != hns3_xmit_pkts_vec_sve &&
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dev->tx_pkt_burst != hns3_xmit_pkts_vec)
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return RTE_ETH_TX_DESC_UNAVAIL;
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desc_id = (txq->next_to_use + offset) % txq->nb_tx_desc;
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txdp = &txq->tx_ring[desc_id];
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if (txdp->tx.tp_fe_sc_vld_ra_ri & rte_cpu_to_le_16(BIT(HNS3_TXD_VLD_B)))
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return RTE_ETH_TX_DESC_FULL;
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else
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return RTE_ETH_TX_DESC_DONE;
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}
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uint32_t
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hns3_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
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{
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@ -720,5 +720,6 @@ void hns3_stop_all_txqs(struct rte_eth_dev *dev);
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void hns3_restore_tqp_enable_state(struct hns3_hw *hw);
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int hns3_tx_done_cleanup(void *txq, uint32_t free_cnt);
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void hns3_enable_rxd_adv_layout(struct hns3_hw *hw);
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int hns3_dev_tx_descriptor_status(void *tx_queue, uint16_t offset);
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#endif /* _HNS3_RXTX_H_ */
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