net/bnx2x: fix supported max Rx/Tx descriptor count
Driver does not provide limit on number Rx and Tx descriptors per queue,
this may result in application configuring 64k descriptors (default set
by rte_eth_dev_info_get()) and further result in issues in PMD and HW
flows due to unsupported number.
Fixes: 540a211084
("bnx2x: driver core")
Cc: stable@dpdk.org
Signed-off-by: Shahed Shaikh <shshaikh@marvell.com>
Acked-by: Rasesh Mody <rmody@marvell.com>
This commit is contained in:
parent
6c5b9b2aaf
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65a45ecc76
@ -155,13 +155,14 @@ struct bnx2x_device_type {
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* Transmit Buffer Descriptor (tx_bd) definitions*
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* Transmit Buffer Descriptor (tx_bd) definitions*
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*/
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*/
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/* NUM_TX_PAGES must be a power of 2. */
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/* NUM_TX_PAGES must be a power of 2. */
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#define NUM_TX_PAGES 16
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#define TOTAL_TX_BD_PER_PAGE (BNX2X_PAGE_SIZE / sizeof(union eth_tx_bd_types)) /* 256 */
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#define TOTAL_TX_BD_PER_PAGE (BNX2X_PAGE_SIZE / sizeof(union eth_tx_bd_types)) /* 256 */
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#define USABLE_TX_BD_PER_PAGE (TOTAL_TX_BD_PER_PAGE - 1) /* 255 */
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#define USABLE_TX_BD_PER_PAGE (TOTAL_TX_BD_PER_PAGE - 1) /* 255 */
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#define TOTAL_TX_BD(q) (TOTAL_TX_BD_PER_PAGE * q->nb_tx_pages) /* 512 */
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#define TOTAL_TX_BD(q) (TOTAL_TX_BD_PER_PAGE * q->nb_tx_pages) /* 512 */
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#define USABLE_TX_BD(q) (USABLE_TX_BD_PER_PAGE * q->nb_tx_pages) /* 510 */
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#define USABLE_TX_BD(q) (USABLE_TX_BD_PER_PAGE * q->nb_tx_pages) /* 510 */
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#define MAX_TX_BD(q) (TOTAL_TX_BD(q) - 1) /* 511 */
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#define MAX_TX_BD(q) (TOTAL_TX_BD(q) - 1) /* 511 */
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#define MAX_TX_AVAIL (USABLE_TX_BD_PER_PAGE * NUM_TX_PAGES - 2)
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#define NEXT_TX_BD(x) \
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#define NEXT_TX_BD(x) \
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((((x) & USABLE_TX_BD_PER_PAGE) == \
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((((x) & USABLE_TX_BD_PER_PAGE) == \
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(USABLE_TX_BD_PER_PAGE - 1)) ? (x) + 2 : (x) + 1)
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(USABLE_TX_BD_PER_PAGE - 1)) ? (x) + 2 : (x) + 1)
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@ -182,13 +183,14 @@ struct bnx2x_device_type {
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/*
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/*
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* Receive Buffer Descriptor (rx_bd) definitions*
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* Receive Buffer Descriptor (rx_bd) definitions*
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*/
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*/
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//#define NUM_RX_PAGES 1
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#define MAX_RX_PAGES 8
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#define TOTAL_RX_BD_PER_PAGE (BNX2X_PAGE_SIZE / sizeof(struct eth_rx_bd)) /* 512 */
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#define TOTAL_RX_BD_PER_PAGE (BNX2X_PAGE_SIZE / sizeof(struct eth_rx_bd)) /* 512 */
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#define USABLE_RX_BD_PER_PAGE (TOTAL_RX_BD_PER_PAGE - 2) /* 510 */
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#define USABLE_RX_BD_PER_PAGE (TOTAL_RX_BD_PER_PAGE - 2) /* 510 */
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#define RX_BD_PER_PAGE_MASK (TOTAL_RX_BD_PER_PAGE - 1) /* 511 */
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#define RX_BD_PER_PAGE_MASK (TOTAL_RX_BD_PER_PAGE - 1) /* 511 */
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#define TOTAL_RX_BD(q) (TOTAL_RX_BD_PER_PAGE * q->nb_rx_pages) /* 512 */
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#define TOTAL_RX_BD(q) (TOTAL_RX_BD_PER_PAGE * q->nb_rx_pages) /* 512 */
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#define USABLE_RX_BD(q) (USABLE_RX_BD_PER_PAGE * q->nb_rx_pages) /* 510 */
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#define USABLE_RX_BD(q) (USABLE_RX_BD_PER_PAGE * q->nb_rx_pages) /* 510 */
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#define MAX_RX_BD(q) (TOTAL_RX_BD(q) - 1) /* 511 */
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#define MAX_RX_BD(q) (TOTAL_RX_BD(q) - 1) /* 511 */
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#define MAX_RX_AVAIL (USABLE_RX_BD_PER_PAGE * MAX_RX_PAGES - 2)
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#define RX_BD_NEXT_PAGE_DESC_CNT 2
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#define RX_BD_NEXT_PAGE_DESC_CNT 2
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#define NEXT_RX_BD(x) \
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#define NEXT_RX_BD(x) \
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@ -244,6 +246,10 @@ struct bnx2x_device_type {
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#define MIN_RX_AVAIL(sc) \
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#define MIN_RX_AVAIL(sc) \
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((sc)->dropless_fc ? BD_TH_HI(sc) + 128 : 128)
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((sc)->dropless_fc ? BD_TH_HI(sc) + 128 : 128)
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#define MIN_RX_SIZE_NONTPA_HW ETH_MIN_RX_CQES_WITHOUT_TPA
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#define MIN_RX_SIZE_NONTPA (RTE_MAX((uint32_t)MIN_RX_SIZE_NONTPA_HW,\
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(uint32_t)MIN_RX_AVAIL(sc)))
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/*
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/*
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* dropless fc calculations for RCQs
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* dropless fc calculations for RCQs
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* Number of RCQs should be as number of buffers in BRB:
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* Number of RCQs should be as number of buffers in BRB:
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@ -480,6 +480,7 @@ static void
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bnx2x_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
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bnx2x_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
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{
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{
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struct bnx2x_softc *sc = dev->data->dev_private;
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struct bnx2x_softc *sc = dev->data->dev_private;
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dev_info->max_rx_queues = sc->max_rx_queues;
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dev_info->max_rx_queues = sc->max_rx_queues;
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dev_info->max_tx_queues = sc->max_tx_queues;
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dev_info->max_tx_queues = sc->max_tx_queues;
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dev_info->min_rx_bufsize = BNX2X_MIN_RX_BUF_SIZE;
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dev_info->min_rx_bufsize = BNX2X_MIN_RX_BUF_SIZE;
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@ -487,6 +488,10 @@ bnx2x_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
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dev_info->max_mac_addrs = BNX2X_MAX_MAC_ADDRS;
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dev_info->max_mac_addrs = BNX2X_MAX_MAC_ADDRS;
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dev_info->speed_capa = ETH_LINK_SPEED_10G | ETH_LINK_SPEED_20G;
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dev_info->speed_capa = ETH_LINK_SPEED_10G | ETH_LINK_SPEED_20G;
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dev_info->rx_offload_capa = DEV_RX_OFFLOAD_JUMBO_FRAME;
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dev_info->rx_offload_capa = DEV_RX_OFFLOAD_JUMBO_FRAME;
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dev_info->rx_desc_lim.nb_max = MAX_RX_AVAIL;
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dev_info->rx_desc_lim.nb_min = MIN_RX_SIZE_NONTPA;
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dev_info->tx_desc_lim.nb_max = MAX_TX_AVAIL;
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}
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}
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static int
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static int
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