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acl/arm: enable acl for ARMv7

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Implement vqtbl1q_u8 intrinsic function, which is not supported in armv7-a.

Signed-off-by: Jianbo Liu <jianbo.liu@linaro.org>
Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
This commit is contained in:
Jianbo Liu 2015-12-03 23:02:55 +08:00 committed by Thomas Monjalon
parent afcd65c444
commit 68b67f9724
4 changed files with 28 additions and 3 deletions
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1
config/defconfig_arm-armv7a-linuxapp-gcc
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@ -53,7 +53,6 @@ CONFIG_RTE_LIBRTE_KNI=n
CONFIG_RTE_EAL_IGB_UIO=n
# fails to compile on ARM
CONFIG_RTE_LIBRTE_ACL=n
CONFIG_RTE_LIBRTE_LPM=n
CONFIG_RTE_LIBRTE_TABLE=n
CONFIG_RTE_LIBRTE_PIPELINE=n

2
lib/librte_acl/Makefile
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@ -49,7 +49,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_bld.c
SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_gen.c
SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_scalar.c
ifeq ($(CONFIG_RTE_ARCH_ARM64),y)
ifneq ($(filter y,$(CONFIG_RTE_ARCH_ARM) $(CONFIG_RTE_ARCH_ARM64)),)
SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_neon.c
CFLAGS_acl_run_neon.o += -flax-vector-conversions -Wno-maybe-uninitialized
else

5
lib/librte_acl/rte_acl.c
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@ -114,8 +114,11 @@ rte_acl_init(void)
{
enum rte_acl_classify_alg alg = RTE_ACL_CLASSIFY_DEFAULT;
#ifdef RTE_ARCH_ARM64
#if defined(RTE_ARCH_ARM64)
alg = RTE_ACL_CLASSIFY_NEON;
#elif defined(RTE_ARCH_ARM)
if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_NEON))
alg = RTE_ACL_CLASSIFY_NEON;
#else
#ifdef CC_AVX2_SUPPORT
if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2))

23
lib/librte_eal/common/include/arch/arm/rte_vect.h
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@ -53,6 +53,29 @@ typedef union rte_xmm {
double pd[XMM_SIZE / sizeof(double)];
} __attribute__((aligned(16))) rte_xmm_t;
#ifdef RTE_ARCH_ARM
/* NEON intrinsic vqtbl1q_u8() is not supported in ARMv7-A(AArch32) */
static __inline uint8x16_t
vqtbl1q_u8(uint8x16_t a, uint8x16_t b)
{
uint8_t i, pos;
rte_xmm_t rte_a, rte_b, rte_ret;
vst1q_u8(rte_a.u8, a);
vst1q_u8(rte_b.u8, b);
for (i = 0; i < 16; i++) {
pos = rte_b.u8[i];
if (pos < 16)
rte_ret.u8[i] = rte_a.u8[pos];
else
rte_ret.u8[i] = 0;
}
return vld1q_u8(rte_ret.u8);
}
#endif
#ifdef __cplusplus
}
#endif