common/mlx5: fix MR search inlining
Memory region management has recently been shared between drivers,
including the search for caches in the data plane.
The initial search in the local linear cache of the queue,
usually yields a result and one should not continue searching
in the next layer caches.
Prior to cache sharing the local linear cache lookup function
was defined with "static inline" attributes,
those were missed in routine commoditizing step
and this caused performance degradation.
Set the common function as static inline.
Fixes: fc59a1ec55
("common/mlx5: share MR mempool registration")
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Reviewed-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
This commit is contained in:
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@ -417,13 +417,6 @@ void
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mlx5_dev_mempool_unregister(struct mlx5_common_device *cdev,
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struct rte_mempool *mp);
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/* mlx5_common_mr.c */
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__rte_internal
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uint32_t
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mlx5_mr_mb2mr(struct mlx5_common_device *cdev, struct mlx5_mp_id *mp_id,
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struct mlx5_mr_ctrl *mr_ctrl, struct rte_mbuf *mbuf);
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/* mlx5_common_os.c */
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int mlx5_os_open_device(struct mlx5_common_device *cdev, uint32_t classes);
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@ -1859,23 +1859,7 @@ mlx5_mr_mempool2mr_bh(struct mlx5_mr_share_cache *share_cache,
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return lkey;
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}
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/**
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* Bottom-half of LKey search on. If supported, lookup for the address from
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* the mempool. Otherwise, search in old mechanism caches.
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*
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* @param cdev
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* Pointer to mlx5 device.
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* @param mp_id
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* Multi-process identifier, may be NULL for the primary process.
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* @param mr_ctrl
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* Pointer to per-queue MR control structure.
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* @param mb
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* Pointer to mbuf.
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*
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* @return
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* Searched LKey on success, UINT32_MAX on no match.
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*/
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static uint32_t
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uint32_t
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mlx5_mr_mb2mr_bh(struct mlx5_common_device *cdev, struct mlx5_mp_id *mp_id,
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struct mlx5_mr_ctrl *mr_ctrl, struct rte_mbuf *mb)
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{
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@ -1908,36 +1892,3 @@ mlx5_mr_mb2mr_bh(struct mlx5_common_device *cdev, struct mlx5_mp_id *mp_id,
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return mlx5_mr_addr2mr_bh(cdev->pd, mp_id, &cdev->mr_scache, mr_ctrl,
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addr, cdev->config.mr_ext_memseg_en);
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}
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/**
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* Query LKey from a packet buffer.
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*
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* @param cdev
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* Pointer to the mlx5 device structure.
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* @param mp_id
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* Multi-process identifier, may be NULL for the primary process.
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* @param mr_ctrl
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* Pointer to per-queue MR control structure.
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* @param mbuf
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* Pointer to mbuf.
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*
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* @return
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* Searched LKey on success, UINT32_MAX on no match.
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*/
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uint32_t
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mlx5_mr_mb2mr(struct mlx5_common_device *cdev, struct mlx5_mp_id *mp_id,
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struct mlx5_mr_ctrl *mr_ctrl, struct rte_mbuf *mbuf)
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{
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uint32_t lkey;
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/* Check generation bit to see if there's any change on existing MRs. */
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if (unlikely(*mr_ctrl->dev_gen_ptr != mr_ctrl->cur_gen))
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mlx5_mr_flush_local_cache(mr_ctrl);
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/* Linear search on MR cache array. */
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lkey = mlx5_mr_lookup_lkey(mr_ctrl->cache, &mr_ctrl->mru,
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MLX5_MR_CACHE_N, (uintptr_t)mbuf->buf_addr);
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if (likely(lkey != UINT32_MAX))
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return lkey;
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/* Take slower bottom-half on miss. */
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return mlx5_mr_mb2mr_bh(cdev, mp_id, mr_ctrl, mbuf);
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}
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@ -62,6 +62,8 @@ struct mlx5_mr_btree {
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struct mr_cache_entry (*table)[];
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} __rte_packed;
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struct mlx5_common_device;
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/* Per-queue MR control descriptor. */
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struct mlx5_mr_ctrl {
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uint32_t *dev_gen_ptr; /* Generation number of device to poll. */
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@ -160,6 +162,63 @@ mlx5_mr_lookup_lkey(struct mr_cache_entry *lkp_tbl, uint16_t *cached_idx,
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return UINT32_MAX;
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}
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__rte_internal
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void mlx5_mr_flush_local_cache(struct mlx5_mr_ctrl *mr_ctrl);
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/**
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* Bottom-half of LKey search on. If supported, lookup for the address from
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* the mempool. Otherwise, search in old mechanism caches.
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*
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* @param cdev
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* Pointer to mlx5 device.
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* @param mp_id
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* Multi-process identifier, may be NULL for the primary process.
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* @param mr_ctrl
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* Pointer to per-queue MR control structure.
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* @param mb
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* Pointer to mbuf.
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*
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* @return
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* Searched LKey on success, UINT32_MAX on no match.
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*/
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__rte_internal
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uint32_t mlx5_mr_mb2mr_bh(struct mlx5_common_device *cdev,
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struct mlx5_mp_id *mp_id,
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struct mlx5_mr_ctrl *mr_ctrl, struct rte_mbuf *mb);
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/**
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* Query LKey from a packet buffer.
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*
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* @param cdev
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* Pointer to the mlx5 device structure.
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* @param mp_id
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* Multi-process identifier, may be NULL for the primary process.
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* @param mr_ctrl
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* Pointer to per-queue MR control structure.
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* @param mbuf
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* Pointer to mbuf.
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*
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* @return
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* Searched LKey on success, UINT32_MAX on no match.
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*/
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static __rte_always_inline uint32_t
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mlx5_mr_mb2mr(struct mlx5_common_device *cdev, struct mlx5_mp_id *mp_id,
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struct mlx5_mr_ctrl *mr_ctrl, struct rte_mbuf *mbuf)
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{
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uint32_t lkey;
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/* Check generation bit to see if there's any change on existing MRs. */
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if (unlikely(*mr_ctrl->dev_gen_ptr != mr_ctrl->cur_gen))
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mlx5_mr_flush_local_cache(mr_ctrl);
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/* Linear search on MR cache array. */
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lkey = mlx5_mr_lookup_lkey(mr_ctrl->cache, &mr_ctrl->mru,
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MLX5_MR_CACHE_N, (uintptr_t)mbuf->buf_addr);
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if (likely(lkey != UINT32_MAX))
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return lkey;
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/* Take slower bottom-half on miss. */
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return mlx5_mr_mb2mr_bh(cdev, mp_id, mr_ctrl, mbuf);
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}
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/* mlx5_common_mr.c */
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__rte_internal
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@ -176,8 +235,6 @@ void mlx5_mr_release_cache(struct mlx5_mr_share_cache *mr_cache);
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int mlx5_mr_create_cache(struct mlx5_mr_share_cache *share_cache, int socket);
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void mlx5_mr_dump_cache(struct mlx5_mr_share_cache *share_cache __rte_unused);
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void mlx5_mr_rebuild_cache(struct mlx5_mr_share_cache *share_cache);
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__rte_internal
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void mlx5_mr_flush_local_cache(struct mlx5_mr_ctrl *mr_ctrl);
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void mlx5_free_mr_by_addr(struct mlx5_mr_share_cache *share_cache,
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const char *ibdev_name, const void *addr, size_t len);
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int mlx5_mr_insert_cache(struct mlx5_mr_share_cache *share_cache,
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@ -113,7 +113,7 @@ INTERNAL {
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mlx5_mr_create_primary;
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mlx5_mr_ctrl_init;
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mlx5_mr_flush_local_cache;
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mlx5_mr_mb2mr;
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mlx5_mr_mb2mr_bh;
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mlx5_nl_allmulti; # WINDOWS_NO_EXPORT
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mlx5_nl_ifindex; # WINDOWS_NO_EXPORT
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