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common/mlx5: fix DevX register read error severity

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PMD attempt to read HW UTC counter properties can fail because the feature
has no support in port FW or mlx5 kernel module.

In that case PMD still can produce correct time-stamps if it runs on core
with nanosecond time resolution.

Fixes: b006786095 ("common/mlx5: update log for DevX general command failure")
Cc: stable@dpdk.org

Reported-by: David Marchand <david.marchand@redhat.com>
Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Acked-by: David Marchand <david.marchand@redhat.com>
This commit is contained in:
Gregory Etelson 2022-11-10 15:05:20 +02:00 committed by Raslan Darawsheh
parent e2b05b22ec
commit 6b3c67212f
1 changed files with 1 additions and 1 deletions
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2
drivers/common/mlx5/mlx5_devx_cmds.c
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@ -111,7 +111,7 @@ mlx5_devx_cmd_register_read(void *ctx, uint16_t reg_id, uint32_t arg,
MLX5_ST_SZ_BYTES(access_register_out) +
sizeof(uint32_t) * dw_cnt);
if (rc || MLX5_FW_STATUS(out)) {
DEVX_DRV_LOG(ERR, out, "read access", "NIC register", reg_id);
DEVX_DRV_LOG(DEBUG, out, "read access", "NIC register", reg_id);
return MLX5_DEVX_ERR_RC(rc);
}
memcpy(data, &out[MLX5_ST_SZ_DW(access_register_out)],