common/sfc_efx/base: add API to get Rx prefix information
Define default Siena, EF10 default, packed stream, equal-stride superbuffer and Riverhead default prefixes in order to make an API to get Rx prefix layout information generic and usable on all NICs. Riverhead supports many Rx prefixes. Riverhead FW supports MCDI to choose Rx prefix based on required Rx prefix fields and allows to query the prefix layout using MCDI. The patch prepares to introduce the support in libefx and provides fallback for NICs and FW which lacks the support. Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com> Reviewed-by: Andy Moreton <amoreton@xilinx.com>
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@ -549,8 +549,8 @@ fail1:
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#if EFX_OPTS_EF10()
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/*
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* EF10 RX pseudo-header
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* ---------------------
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* EF10 RX pseudo-header (aka Rx prefix)
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* -------------------------------------
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*
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* Receive packets are prefixed by an (optional) 14 byte pseudo-header:
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*
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@ -566,7 +566,77 @@ fail1:
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* (32bit little-endian)
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*
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* See "The RX Pseudo-header" in SF-109306-TC.
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*
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* EF10 does not support Rx prefix choice using MC_CMD_GET_RX_PREFIX_ID
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* and query its layout using MC_CMD_QUERY_RX_PREFIX_ID.
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*/
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static const efx_rx_prefix_layout_t ef10_default_rx_prefix_layout = {
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.erpl_id = 0,
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.erpl_length = 14,
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.erpl_fields = {
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[EFX_RX_PREFIX_FIELD_RSS_HASH] =
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{ 0, 32, B_FALSE },
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[EFX_RX_PREFIX_FIELD_VLAN_STRIP_TCI] =
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{ 32, 16, B_TRUE },
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[EFX_RX_PREFIX_FIELD_INNER_VLAN_STRIP_TCI] =
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{ 48, 16, B_TRUE },
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[EFX_RX_PREFIX_FIELD_LENGTH] =
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{ 64, 16, B_FALSE },
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[EFX_RX_PREFIX_FIELD_PARTIAL_TSTAMP] =
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{ 80, 32, B_FALSE },
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}
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};
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#if EFSYS_OPT_RX_PACKED_STREAM
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/*
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* EF10 packed stream Rx prefix layout.
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*
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* See SF-112241-TC Full speed capture for Huntington and Medford section 4.5.
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*/
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static const efx_rx_prefix_layout_t ef10_packed_stream_rx_prefix_layout = {
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.erpl_id = 0,
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.erpl_length = 8,
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.erpl_fields = {
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#define EF10_PS_RX_PREFIX_FIELD(_efx, _ef10) \
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EFX_RX_PREFIX_FIELD(_efx, ES_DZ_PS_RX_PREFIX_ ## _ef10, B_FALSE)
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EF10_PS_RX_PREFIX_FIELD(PARTIAL_TSTAMP, TSTAMP),
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EF10_PS_RX_PREFIX_FIELD(LENGTH, CAP_LEN),
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EF10_PS_RX_PREFIX_FIELD(ORIG_LENGTH, ORIG_LEN),
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#undef EF10_PS_RX_PREFIX_FIELD
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}
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};
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#endif /* EFSYS_OPT_RX_PACKED_STREAM */
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#if EFSYS_OPT_RX_ES_SUPER_BUFFER
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/*
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* EF10 equal stride super-buffer Rx prefix layout.
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*
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* See SF-119419-TC DPDK Firmware Driver Interface section 3.4.
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*/
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static const efx_rx_prefix_layout_t ef10_essb_rx_prefix_layout = {
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.erpl_id = 0,
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.erpl_length = ES_EZ_ESSB_RX_PREFIX_LEN,
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.erpl_fields = {
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#define EF10_ESSB_RX_PREFIX_FIELD(_efx, _ef10) \
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EFX_RX_PREFIX_FIELD(_efx, ES_EZ_ESSB_RX_PREFIX_ ## _ef10, B_FALSE)
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EF10_ESSB_RX_PREFIX_FIELD(LENGTH, DATA_LEN),
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EF10_ESSB_RX_PREFIX_FIELD(USER_MARK, MARK),
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EF10_ESSB_RX_PREFIX_FIELD(RSS_HASH_VALID, HASH_VALID),
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EF10_ESSB_RX_PREFIX_FIELD(USER_MARK_VALID, MARK_VALID),
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EF10_ESSB_RX_PREFIX_FIELD(USER_FLAG, MATCH_FLAG),
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EF10_ESSB_RX_PREFIX_FIELD(RSS_HASH, HASH),
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#undef EF10_ESSB_RX_PREFIX_FIELD
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}
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};
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#endif /* EFSYS_OPT_RX_ES_SUPER_BUFFER */
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__checkReturn efx_rc_t
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ef10_rx_prefix_pktlen(
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@ -836,6 +906,7 @@ ef10_rx_qcreate(
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__in efx_rxq_t *erp)
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{
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efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
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const efx_rx_prefix_layout_t *erpl;
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efx_rc_t rc;
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boolean_t disable_scatter;
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boolean_t want_inner_classes;
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@ -852,6 +923,7 @@ ef10_rx_qcreate(
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switch (type) {
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case EFX_RXQ_TYPE_DEFAULT:
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erpl = &ef10_default_rx_prefix_layout;
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if (type_data == NULL) {
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rc = EINVAL;
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goto fail1;
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@ -861,6 +933,7 @@ ef10_rx_qcreate(
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break;
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#if EFSYS_OPT_RX_PACKED_STREAM
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case EFX_RXQ_TYPE_PACKED_STREAM:
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erpl = &ef10_packed_stream_rx_prefix_layout;
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if (type_data == NULL) {
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rc = EINVAL;
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goto fail2;
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@ -890,6 +963,7 @@ ef10_rx_qcreate(
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#endif /* EFSYS_OPT_RX_PACKED_STREAM */
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#if EFSYS_OPT_RX_ES_SUPER_BUFFER
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case EFX_RXQ_TYPE_ES_SUPER_BUFFER:
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erpl = &ef10_essb_rx_prefix_layout;
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if (type_data == NULL) {
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rc = EINVAL;
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goto fail4;
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@ -973,6 +1047,8 @@ ef10_rx_qcreate(
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erp->er_ev_qstate = &erp->er_eep->ee_rxq_state[label];
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erp->er_prefix_layout = *erpl;
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return (0);
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fail11:
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@ -1396,6 +1396,7 @@ typedef struct efx_nic_cfg_s {
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uint32_t enc_ev_desc_size;
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uint32_t enc_rx_desc_size;
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uint32_t enc_tx_desc_size;
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/* Maximum Rx prefix size if many Rx prefixes are supported */
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uint32_t enc_rx_prefix_size;
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uint32_t enc_rx_buf_align_start;
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uint32_t enc_rx_buf_align_end;
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@ -2760,6 +2761,66 @@ efx_rxq_nbufs(
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#define EFX_RXQ_LIMIT(_ndescs) ((_ndescs) - 16)
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/*
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* libefx representation of the Rx prefix layout information.
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*
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* The information may be used inside libefx to implement Rx prefix fields
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* accessors and by drivers which process Rx prefix itself.
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*/
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/*
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* All known Rx prefix fields.
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*
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* An Rx prefix may have a subset of these fields.
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*/
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typedef enum efx_rx_prefix_field_e {
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EFX_RX_PREFIX_FIELD_LENGTH = 0,
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EFX_RX_PREFIX_FIELD_ORIG_LENGTH,
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EFX_RX_PREFIX_FIELD_CLASS,
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EFX_RX_PREFIX_FIELD_RSS_HASH,
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EFX_RX_PREFIX_FIELD_RSS_HASH_VALID,
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EFX_RX_PREFIX_FIELD_PARTIAL_TSTAMP,
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EFX_RX_PREFIX_FIELD_VLAN_STRIP_TCI,
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EFX_RX_PREFIX_FIELD_INNER_VLAN_STRIP_TCI,
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EFX_RX_PREFIX_FIELD_USER_FLAG,
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EFX_RX_PREFIX_FIELD_USER_MARK,
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EFX_RX_PREFIX_FIELD_USER_MARK_VALID,
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EFX_RX_PREFIX_FIELD_CSUM_FRAME,
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EFX_RX_PREFIX_FIELD_INGRESS_VPORT,
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EFX_RX_PREFIX_NFIELDS
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} efx_rx_prefix_field_t;
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/*
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* Location and endianness of a field in Rx prefix.
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*
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* If width is zero, the field is not present.
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*/
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typedef struct efx_rx_prefix_field_info_s {
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uint16_t erpfi_offset_bits;
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uint8_t erpfi_width_bits;
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boolean_t erpfi_big_endian;
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} efx_rx_prefix_field_info_t;
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/* Helper macro to define Rx prefix fields */
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#define EFX_RX_PREFIX_FIELD(_efx, _field, _big_endian) \
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[EFX_RX_PREFIX_FIELD_ ## _efx] = { \
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.erpfi_offset_bits = EFX_LOW_BIT(_field), \
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.erpfi_width_bits = EFX_WIDTH(_field), \
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.erpfi_big_endian = (_big_endian), \
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}
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typedef struct efx_rx_prefix_layout_s {
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uint32_t erpl_id;
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uint8_t erpl_length;
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efx_rx_prefix_field_info_t erpl_fields[EFX_RX_PREFIX_NFIELDS];
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} efx_rx_prefix_layout_t;
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LIBEFX_API
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extern __checkReturn efx_rc_t
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efx_rx_prefix_get_layout(
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__in const efx_rxq_t *erp,
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__out efx_rx_prefix_layout_t *erplp);
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typedef enum efx_rxq_type_e {
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EFX_RXQ_TYPE_DEFAULT,
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EFX_RXQ_TYPE_PACKED_STREAM,
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@ -944,6 +944,7 @@ struct efx_rxq_s {
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size_t er_buf_size;
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efsys_mem_t *er_esmp;
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efx_evq_rxq_state_t *er_ev_qstate;
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efx_rx_prefix_layout_t er_prefix_layout;
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};
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#define EFX_RXQ_MAGIC 0x15022005
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@ -1059,6 +1059,18 @@ efx_pseudo_hdr_hash_get(
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}
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#endif /* EFSYS_OPT_RX_SCALE */
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__checkReturn efx_rc_t
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efx_rx_prefix_get_layout(
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__in const efx_rxq_t *erp,
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__out efx_rx_prefix_layout_t *erplp)
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{
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EFSYS_ASSERT3U(erp->er_magic, ==, EFX_RXQ_MAGIC);
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*erplp = erp->er_prefix_layout;
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return (0);
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}
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#if EFSYS_OPT_SIENA
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static __checkReturn efx_rc_t
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@ -1477,6 +1489,21 @@ fail1:
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* LL.LL LFSR hash (16-bit big-endian)
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*/
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/*
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* Provide Rx prefix layout with Toeplitz hash only since LSFR is
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* used by no supported drivers.
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*
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* Siena does not support Rx prefix choice via MC_CMD_GET_RX_PREFIX_ID
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* and query its layout using MC_CMD_QUERY_RX_PREFIX_ID.
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*/
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static const efx_rx_prefix_layout_t siena_toeplitz_rx_prefix_layout = {
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.erpl_id = 0,
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.erpl_length = 16,
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.erpl_fields = {
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[EFX_RX_PREFIX_FIELD_RSS_HASH] = { 12 * 8, 32, B_TRUE },
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}
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};
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#if EFSYS_OPT_RX_SCALE
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static __checkReturn uint32_t
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siena_rx_prefix_hash(
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@ -1719,6 +1746,8 @@ siena_rx_qcreate(
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EFX_BAR_TBL_WRITEO(enp, FR_AZ_RX_DESC_PTR_TBL,
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erp->er_index, &oword, B_TRUE);
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erp->er_prefix_layout = siena_toeplitz_rx_prefix_layout;
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return (0);
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#if !EFSYS_OPT_RX_SCATTER
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@ -1628,6 +1628,7 @@ extern int fix_lint;
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#define EFX_AND_QWORD EFX_AND_QWORD32
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#endif
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#ifdef __cplusplus
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}
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#endif
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#if EFSYS_OPT_RIVERHEAD
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/*
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* Default Rx prefix layout on Riverhead if FW does not support Rx
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* prefix choice using MC_CMD_GET_RX_PREFIX_ID and query its layout
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* using MC_CMD_QUERY_RX_PREFIX_ID.
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*
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* See SF-119689-TC Riverhead Host Interface section 6.4.
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*/
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static const efx_rx_prefix_layout_t rhead_default_rx_prefix_layout = {
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.erpl_id = 0,
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.erpl_length = ESE_GZ_RX_PKT_PREFIX_LEN,
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.erpl_fields = {
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#define RHEAD_RX_PREFIX_FIELD(_name, _big_endian) \
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EFX_RX_PREFIX_FIELD(_name, ESF_GZ_RX_PREFIX_ ## _name, _big_endian)
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RHEAD_RX_PREFIX_FIELD(LENGTH, B_FALSE),
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RHEAD_RX_PREFIX_FIELD(RSS_HASH_VALID, B_FALSE),
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RHEAD_RX_PREFIX_FIELD(USER_FLAG, B_FALSE),
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RHEAD_RX_PREFIX_FIELD(CLASS, B_FALSE),
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RHEAD_RX_PREFIX_FIELD(PARTIAL_TSTAMP, B_FALSE),
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RHEAD_RX_PREFIX_FIELD(RSS_HASH, B_FALSE),
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RHEAD_RX_PREFIX_FIELD(USER_MARK, B_FALSE),
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RHEAD_RX_PREFIX_FIELD(INGRESS_VPORT, B_FALSE),
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RHEAD_RX_PREFIX_FIELD(CSUM_FRAME, B_TRUE),
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RHEAD_RX_PREFIX_FIELD(VLAN_STRIP_TCI, B_TRUE),
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#undef RHEAD_RX_PREFIX_FIELD
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}
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};
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__checkReturn efx_rc_t
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rhead_rx_init(
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__in efx_nic_t *enp)
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@ -292,6 +321,7 @@ rhead_rx_qcreate(
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erp->er_eep = eep;
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erp->er_label = label;
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erp->er_prefix_layout = rhead_default_rx_prefix_layout;
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return (0);
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@ -130,6 +130,7 @@ INTERNAL {
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efx_rx_fini;
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efx_rx_hash_default_support_get;
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efx_rx_init;
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efx_rx_prefix_get_layout;
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efx_rx_qcreate;
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efx_rx_qcreate_es_super_buffer;
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efx_rx_qdestroy;
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