drivers/net: use ack in interrupt handlers

Replace rte_intr_enable() with rte_intr_ack() API
for acking an interrupt in interrupt handlers and
rx_queue_intr_enable() callbacks of PMD's.

This is inline with original intent of this change in PMDs
to ack interrupts after handling is completed if
device is backed by UIO, IGB_UIO or VFIO(with INTx).

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Shahed Shaikh <shshaikh@marvell.com>
Tested-by: Shahed Shaikh <shshaikh@marvell.com>
Signed-off-by: David Marchand <david.marchand@redhat.com>
This commit is contained in:
Nithin Dabilpuram 2019-07-23 10:04:19 +02:00 committed by Thomas Monjalon
parent a159730c2f
commit 6bee9d5f45
30 changed files with 62 additions and 29 deletions

View File

@ -10,6 +10,7 @@ LIB = librte_pmd_atlantic.a
CFLAGS += -O3
CFLAGS += $(WERROR_FLAGS)
CFLAGS += -DALLOW_EXPERIMENTAL_API
EXPORT_MAP := rte_pmd_atlantic_version.map

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@ -1393,7 +1393,7 @@ atl_dev_interrupt_action(struct rte_eth_dev *dev,
}
done:
atl_enable_intr(dev);
rte_intr_enable(intr_handle);
rte_intr_ack(intr_handle);
return 0;
}

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@ -1,6 +1,8 @@
# SPDX-License-Identifier: BSD-3-Clause
# Copyright(c) 2018 Aquantia Corporation
allow_experimental_apis = true
sources = files(
'atl_rxtx.c',
'atl_ethdev.c',

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@ -10,6 +10,7 @@ LIB = librte_pmd_avp.a
CFLAGS += -O3
CFLAGS += $(WERROR_FLAGS) -I$(SRCDIR)
CFLAGS += -DALLOW_EXPERIMENTAL_API
LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_ring
LDLIBS += -lrte_ethdev -lrte_net -lrte_kvargs
LDLIBS += -lrte_bus_pci

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@ -713,7 +713,7 @@ avp_dev_interrupt_handler(void *data)
status);
/* re-enable UIO interrupt handling */
ret = rte_intr_enable(&pci_dev->intr_handle);
ret = rte_intr_ack(&pci_dev->intr_handle);
if (ret < 0) {
PMD_DRV_LOG(ERR, "Failed to re-enable UIO interrupts, ret=%d\n",
ret);

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@ -5,5 +5,6 @@ if not is_linux
build = false
reason = 'only supported on linux'
endif
allow_experimental_apis = true
sources = files('avp_ethdev.c')
install_headers('rte_avp_common.h', 'rte_avp_fifo.h')

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@ -10,6 +10,7 @@ LIB = librte_pmd_axgbe.a
CFLAGS += -O3
CFLAGS += $(WERROR_FLAGS)
CFLAGS += -DALLOW_EXPERIMENTAL_API
EXPORT_MAP := rte_pmd_axgbe_version.map

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@ -136,8 +136,8 @@ axgbe_dev_interrupt_handler(void *param)
DMA_CH_SR, dma_ch_isr);
}
}
/* Enable interrupts since disabled after generation*/
rte_intr_enable(&pdata->pci_dev->intr_handle);
/* Unmask interrupts since disabled after generation */
rte_intr_ack(&pdata->pci_dev->intr_handle);
}
/*

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@ -6,6 +6,8 @@ if not is_linux
reason = 'only supported on linux'
endif
allow_experimental_apis = true
sources = files('axgbe_ethdev.c',
'axgbe_dev.c',
'axgbe_mdio.c',

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@ -12,6 +12,7 @@ LIB = librte_pmd_bnx2x.a
CFLAGS += -O3
CFLAGS += $(WERROR_FLAGS)
CFLAGS += -DZLIB_CONST
CFLAGS += -DALLOW_EXPERIMENTAL_API
LDLIBS += -lz
LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_ring
LDLIBS += -lrte_ethdev -lrte_net -lrte_kvargs

View File

@ -133,7 +133,7 @@ bnx2x_interrupt_handler(void *param)
PMD_DEBUG_PERIODIC_LOG(INFO, sc, "Interrupt handled");
bnx2x_interrupt_action(dev, 1);
rte_intr_enable(&sc->pci_dev->intr_handle);
rte_intr_ack(&sc->pci_dev->intr_handle);
}
static void bnx2x_periodic_start(void *param)

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@ -5,6 +5,7 @@ dep = dependency('zlib', required: false)
build = dep.found()
reason = 'missing dependency, "zlib"'
ext_deps += dep
allow_experimental_apis = true
cflags += '-DZLIB_CONST'
sources = files('bnx2x.c',
'bnx2x_ethdev.c',

View File

@ -1000,7 +1000,7 @@ eth_em_rx_queue_intr_enable(struct rte_eth_dev *dev, __rte_unused uint16_t queue
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
em_rxq_intr_enable(hw);
rte_intr_enable(intr_handle);
rte_intr_ack(intr_handle);
return 0;
}
@ -1567,7 +1567,7 @@ eth_em_interrupt_action(struct rte_eth_dev *dev,
return -1;
intr->flags &= ~E1000_FLAG_NEED_LINK_UPDATE;
rte_intr_enable(intr_handle);
rte_intr_ack(intr_handle);
/* set get_link_status to check register later */
hw->mac.get_link_status = 1;

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@ -2875,7 +2875,7 @@ eth_igb_interrupt_action(struct rte_eth_dev *dev,
}
igb_intr_enable(dev);
rte_intr_enable(intr_handle);
rte_intr_ack(intr_handle);
if (intr->flags & E1000_FLAG_NEED_LINK_UPDATE) {
intr->flags &= ~E1000_FLAG_NEED_LINK_UPDATE;
@ -2986,7 +2986,7 @@ eth_igbvf_interrupt_action(struct rte_eth_dev *dev, struct rte_intr_handle *intr
}
igbvf_intr_enable(dev);
rte_intr_enable(intr_handle);
rte_intr_ack(intr_handle);
return 0;
}
@ -5499,7 +5499,7 @@ eth_igb_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
E1000_WRITE_REG(hw, E1000_EIMS, regval | mask);
E1000_WRITE_FLUSH(hw);
rte_intr_enable(intr_handle);
rte_intr_ack(intr_handle);
return 0;
}

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@ -10,6 +10,7 @@ LIB = librte_pmd_fm10k.a
CFLAGS += -O3
CFLAGS += $(WERROR_FLAGS)
CFLAGS += -DALLOW_EXPERIMENTAL_API
EXPORT_MAP := rte_pmd_fm10k_version.map

View File

@ -2381,7 +2381,7 @@ fm10k_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
else
FM10K_WRITE_REG(hw, FM10K_VFITR(Q2V(pdev, queue_id)),
FM10K_ITR_AUTOMASK | FM10K_ITR_MASK_CLEAR);
rte_intr_enable(&pdev->intr_handle);
rte_intr_ack(&pdev->intr_handle);
return 0;
}
@ -2680,7 +2680,7 @@ fm10k_dev_interrupt_handler_pf(void *param)
FM10K_WRITE_REG(hw, FM10K_ITR(0), FM10K_ITR_AUTOMASK |
FM10K_ITR_MASK_CLEAR);
/* Re-enable interrupt from host side */
rte_intr_enable(dev->intr_handle);
rte_intr_ack(dev->intr_handle);
}
/**
@ -2760,7 +2760,7 @@ fm10k_dev_interrupt_handler_vf(void *param)
FM10K_WRITE_REG(hw, FM10K_VFITR(0), FM10K_ITR_AUTOMASK |
FM10K_ITR_MASK_CLEAR);
/* Re-enable interrupt from host side */
rte_intr_enable(dev->intr_handle);
rte_intr_ack(dev->intr_handle);
}
/* Mailbox message handler in VF */

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@ -1,6 +1,8 @@
# SPDX-License-Identifier: BSD-3-Clause
# Copyright(c) 2017 Intel Corporation
allow_experimental_apis = true
subdir('base')
objs = [base_objs]

View File

@ -11645,7 +11645,7 @@ i40e_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
I40E_PFINT_DYN_CTLN_ITR_INDX_MASK);
I40E_WRITE_FLUSH(hw);
rte_intr_enable(&pci_dev->intr_handle);
rte_intr_ack(&pci_dev->intr_handle);
return 0;
}

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@ -1098,7 +1098,7 @@ iavf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
IAVF_WRITE_FLUSH(hw);
rte_intr_enable(&pci_dev->intr_handle);
rte_intr_ack(&pci_dev->intr_handle);
return 0;
}

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@ -10,6 +10,7 @@ LIB = librte_pmd_ice.a
CFLAGS += -O3
CFLAGS += $(WERROR_FLAGS)
CFLAGS += -DALLOW_EXPERIMENTAL_API
LDLIBS += -lrte_eal -lrte_mbuf -lrte_ethdev -lrte_kvargs
LDLIBS += -lrte_bus_pci -lrte_mempool

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@ -1118,7 +1118,7 @@ ice_interrupt_handler(void *param)
done:
/* Enable interrupt */
ice_pf_enable_irq0(hw);
rte_intr_enable(dev->intr_handle);
rte_intr_ack(dev->intr_handle);
}
/* Initialize SW parameters of PF */
@ -3002,7 +3002,7 @@ static int ice_rx_queue_intr_enable(struct rte_eth_dev *dev,
val &= ~GLINT_DYN_CTL_WB_ON_ITR_M;
ICE_WRITE_REG(hw, GLINT_DYN_CTL(msix_intr), val);
rte_intr_enable(&pci_dev->intr_handle);
rte_intr_ack(&pci_dev->intr_handle);
return 0;
}

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@ -1,6 +1,8 @@
# SPDX-License-Identifier: BSD-3-Clause
# Copyright(c) 2018 Intel Corporation
allow_experimental_apis = true
subdir('base')
objs = [base_objs]

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@ -4501,7 +4501,7 @@ ixgbe_dev_interrupt_delayed_handler(void *param)
PMD_DRV_LOG(DEBUG, "enable intr in delayed handler S[%08x]", eicr);
ixgbe_enable_intr(dev);
rte_intr_enable(intr_handle);
rte_intr_ack(intr_handle);
}
/**
@ -5762,7 +5762,7 @@ ixgbevf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
RTE_SET_USED(queue_id);
IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, intr->mask);
rte_intr_enable(intr_handle);
rte_intr_ack(intr_handle);
return 0;
}
@ -5811,7 +5811,7 @@ ixgbe_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
mask &= (1 << (queue_id - 32));
IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
}
rte_intr_enable(intr_handle);
rte_intr_ack(intr_handle);
return 0;
}

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@ -1412,7 +1412,7 @@ nfp_net_irq_unmask(struct rte_eth_dev *dev)
if (hw->ctrl & NFP_NET_CFG_CTRL_MSIXAUTO) {
/* If MSI-X auto-masking is used, clear the entry */
rte_wmb();
rte_intr_enable(&pci_dev->intr_handle);
rte_intr_ack(&pci_dev->intr_handle);
} else {
/* Make sure all updates are written before un-masking */
rte_wmb();

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@ -12,6 +12,7 @@ LIB = librte_pmd_qede.a
CFLAGS += -O3
CFLAGS += $(WERROR_FLAGS)
CFLAGS += -DALLOW_EXPERIMENTAL_API
LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_ring
LDLIBS += -lrte_ethdev -lrte_net -lrte_kvargs
LDLIBS += -lrte_bus_pci

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@ -1,6 +1,8 @@
# SPDX-License-Identifier: BSD-3-Clause
# Copyright(c) 2018 Luca Boccassi <bluca@debian.org>
allow_experimental_apis = true
subdir('base')
objs = [base_objs]

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@ -248,8 +248,8 @@ qede_interrupt_handler_intx(void *param)
if (status & 0x1) {
qede_interrupt_action(ECORE_LEADING_HWFN(edev));
if (rte_intr_enable(eth_dev->intr_handle))
DP_ERR(edev, "rte_intr_enable failed\n");
if (rte_intr_ack(eth_dev->intr_handle))
DP_ERR(edev, "rte_intr_ack failed\n");
}
}
@ -261,8 +261,8 @@ qede_interrupt_handler(void *param)
struct ecore_dev *edev = &qdev->edev;
qede_interrupt_action(ECORE_LEADING_HWFN(edev));
if (rte_intr_enable(eth_dev->intr_handle))
DP_ERR(edev, "rte_intr_enable failed\n");
if (rte_intr_ack(eth_dev->intr_handle))
DP_ERR(edev, "rte_intr_ack failed\n");
}
static void

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@ -79,7 +79,7 @@ sfc_intr_line_handler(void *cb_arg)
if (qmask & (1 << sa->mgmt_evq_index))
sfc_intr_handle_mgmt_evq(sa);
if (rte_intr_enable(&pci_dev->intr_handle) != 0)
if (rte_intr_ack(&pci_dev->intr_handle) != 0)
sfc_err(sa, "cannot reenable interrupts");
sfc_log_init(sa, "done");
@ -123,7 +123,7 @@ sfc_intr_message_handler(void *cb_arg)
sfc_intr_handle_mgmt_evq(sa);
if (rte_intr_enable(&pci_dev->intr_handle) != 0)
if (rte_intr_ack(&pci_dev->intr_handle) != 0)
sfc_err(sa, "cannot reenable interrupts");
sfc_log_init(sa, "done");

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@ -1264,6 +1264,20 @@ virtio_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
return virtio_send_command(hw->cvq, &ctrl, &len, 1);
}
static int
virtio_intr_unmask(struct rte_eth_dev *dev)
{
struct virtio_hw *hw = dev->data->dev_private;
if (rte_intr_ack(dev->intr_handle) < 0)
return -1;
if (!hw->virtio_user_dev)
hw->use_msix = vtpci_msix_detect(RTE_ETH_DEV_TO_PCI(dev));
return 0;
}
static int
virtio_intr_enable(struct rte_eth_dev *dev)
{
@ -1457,7 +1471,7 @@ virtio_interrupt_handler(void *param)
isr = vtpci_isr(hw);
PMD_DRV_LOG(INFO, "interrupt status = %#x", isr);
if (virtio_intr_enable(dev) < 0)
if (virtio_intr_unmask(dev) < 0)
PMD_DRV_LOG(ERR, "interrupt enable failed");
if (isr & VIRTIO_PCI_ISR_CONFIG) {

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@ -1426,7 +1426,7 @@ vmxnet3_interrupt_handler(void *param)
vmxnet3_process_events(dev);
if (rte_intr_enable(&pci_dev->intr_handle) < 0)
if (rte_intr_ack(&pci_dev->intr_handle) < 0)
PMD_DRV_LOG(ERR, "interrupt enable failed");
}