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net/octeontx/base: add remaining PKI operations

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Adding remaining PKI operations and sync up the mailbox
definitions with PF driver.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
This commit is contained in:
Jerin Jacob 2017-10-08 18:14:12 +05:30 committed by Ferruh Yigit
parent b95c3413fa
commit 6d28968ed1
3 changed files with 681 additions and 0 deletions
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237
drivers/net/octeontx/base/octeontx_pki_var.h Normal file
View File

@ -0,0 +1,237 @@
/*
* BSD LICENSE
*
* Copyright (C) Cavium Inc. 2017. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Cavium networks nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __OCTEONTX_PKI_VAR_H__
#define __OCTEONTX_PKI_VAR_H__
#include <rte_byteorder.h>
#define OCTTX_PACKET_WQE_SKIP 128
#define OCTTX_PACKET_FIRST_SKIP 240
#define OCTTX_PACKET_LATER_SKIP 128
/* WQE descriptor */
typedef union octtx_wqe_s {
uint64_t w[6];
struct {
#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
struct {
uint64_t pknd : 6;
uint64_t rsvd0 : 10;
uint64_t style : 8;
uint64_t bufs : 8;
uint64_t chan : 12;
uint64_t apad : 3;
uint64_t rsvd1 : 1;
uint64_t aura : 12;
uint64_t rsvd2 : 4;
} w0;
struct {
uint64_t tag : 32;
uint64_t tt : 2;
uint64_t grp : 10;
uint64_t rsvd0 : 2;
uint64_t rsvd1 : 2;
uint64_t len : 16;
} w1;
struct {
uint64_t op_code : 8;
uint64_t err_lev : 3;
uint64_t raw : 1;
uint64_t l2m : 1;
uint64_t l2b : 1;
uint64_t l3m : 1;
uint64_t l3b : 1;
uint64_t l3fr : 1;
uint64_t pf1 : 1;
uint64_t pf2 : 1;
uint64_t pf3 : 1;
uint64_t pf4 : 1;
uint64_t sh : 1;
uint64_t vs : 1;
uint64_t vv : 1;
uint64_t rsvd0 : 8;
uint64_t lae : 1;
uint64_t lbty : 5;
uint64_t lcty : 5;
uint64_t ldty : 5;
uint64_t lety : 5;
uint64_t lfty : 5;
uint64_t lgty : 5;
uint64_t sw : 1;
} w2;
struct {
uint64_t addr; /* Byte addr of start-of-pkt */
} w3;
struct {
uint64_t laptr : 8;
uint64_t lbptr : 8;
uint64_t lcptr : 8;
uint64_t ldprt : 8;
uint64_t leptr : 8;
uint64_t lfptr : 8;
uint64_t lgptr : 8;
uint64_t vlptr : 8;
} w4;
struct {
uint64_t rsvd0 : 47;
uint64_t dwd : 1;
uint64_t size : 16;
} w5;
#else
struct {
uint64_t rsvd2 : 4;
uint64_t aura : 12;
uint64_t rsvd1 : 1;
uint64_t apad : 3;
uint64_t chan : 12;
uint64_t bufs : 8;
uint64_t style : 8;
uint64_t rsvd0 : 10;
uint64_t pknd : 6;
} w0;
struct {
uint64_t len : 16;
uint64_t rsvd1 : 2;
uint64_t rsvd0 : 2;
uint64_t grp : 10;
uint64_t tt : 2;
uint64_t tag : 32;
} w1;
struct {
uint64_t sw : 1;
uint64_t lgty : 5;
uint64_t lfty : 5;
uint64_t lety : 5;
uint64_t ldty : 5;
uint64_t lcty : 5;
uint64_t lbty : 5;
uint64_t lae : 1;
uint64_t rsvd0 : 8;
uint64_t vv : 1;
uint64_t vs : 1;
uint64_t sh : 1;
uint64_t pf4 : 1;
uint64_t pf3 : 1;
uint64_t pf2 : 1;
uint64_t pf1 : 1;
uint64_t l3fr : 1;
uint64_t l3b : 1;
uint64_t l3m : 1;
uint64_t l2b : 1;
uint64_t l2m : 1;
uint64_t raw : 1;
uint64_t err_lev : 3;
uint64_t op_code : 8;
} w2;
struct {
uint64_t addr; /* Byte addr of start-of-pkt */
} w3;
struct {
uint64_t vlptr : 8;
uint64_t lgptr : 8;
uint64_t lfptr : 8;
uint64_t leptr : 8;
uint64_t ldprt : 8;
uint64_t lcptr : 8;
uint64_t lbptr : 8;
uint64_t laptr : 8;
} w4;
#endif
} s;
} __rte_packed octtx_wqe_t;
enum occtx_pki_ltype_e {
OCCTX_PKI_LTYPE_NONE = 0,
OCCTX_PKI_LTYPE_ENET = 1,
OCCTX_PKI_LTYPE_VLAN = 2,
OCCTX_PKI_LTYPE_SNAP_PAYLD = 5,
OCCTX_PKI_LTYPE_ARP = 6,
OCCTX_PKI_LTYPE_RARP = 7,
OCCTX_PKI_LTYPE_IP4 = 8,
OCCTX_PKI_LTYPE_IP4_OPT = 9,
OCCTX_PKI_LTYPE_IP6 = 0xa,
OCCTX_PKI_LTYPE_IP6_OPT = 0xb,
OCCTX_PKI_LTYPE_IPSEC_ESP = 0xc,
OCCTX_PKI_LTYPE_IPFRAG = 0xd,
OCCTX_PKI_LTYPE_IPCOMP = 0xe,
OCCTX_PKI_LTYPE_TCP = 0x10,
OCCTX_PKI_LTYPE_UDP = 0x11,
OCCTX_PKI_LTYPE_SCTP = 0x12,
OCCTX_PKI_LTYPE_UDP_VXLAN = 0x13,
OCCTX_PKI_LTYPE_GRE = 0x14,
OCCTX_PKI_LTYPE_NVGRE = 0x15,
OCCTX_PKI_LTYPE_GTP = 0x16,
OCCTX_PKI_LTYPE_UDP_GENEVE = 0x17,
OCCTX_PKI_LTYPE_SW28 = 0x1c,
OCCTX_PKI_LTYPE_SW29 = 0x1d,
OCCTX_PKI_LTYPE_SW30 = 0x1e,
OCCTX_PKI_LTYPE_SW31 = 0x1f,
OCCTX_PKI_LTYPE_LAST
};
enum lc_type_e {
LC_NONE = OCCTX_PKI_LTYPE_NONE,
LC_IPV4 = OCCTX_PKI_LTYPE_IP4,
LC_IPV4_OPT = OCCTX_PKI_LTYPE_IP4_OPT,
LC_IPV6 = OCCTX_PKI_LTYPE_IP6,
LC_IPV6_OPT = OCCTX_PKI_LTYPE_IP6_OPT,
};
enum le_type_e {
LE_NONE = OCCTX_PKI_LTYPE_NONE,
};
enum lf_type_e {
LF_NONE = OCCTX_PKI_LTYPE_NONE,
LF_IPSEC_ESP = OCCTX_PKI_LTYPE_IPSEC_ESP,
LF_IPFRAG = OCCTX_PKI_LTYPE_IPFRAG,
LF_IPCOMP = OCCTX_PKI_LTYPE_IPCOMP,
LF_TCP = OCCTX_PKI_LTYPE_TCP,
LF_UDP = OCCTX_PKI_LTYPE_UDP,
LF_GRE = OCCTX_PKI_LTYPE_GRE,
LF_UDP_GENEVE = OCCTX_PKI_LTYPE_UDP_GENEVE,
LF_UDP_VXLAN = OCCTX_PKI_LTYPE_UDP_VXLAN,
LF_NVGRE = OCCTX_PKI_LTYPE_NVGRE,
};
#endif /* __OCTEONTX_PKI_VAR_H__ */

80
drivers/net/octeontx/base/octeontx_pkivf.c
View File

@ -52,6 +52,65 @@ octeontx_pki_port_open(int port)
return res;
}
int
octeontx_pki_port_hash_config(int port, pki_hash_cfg_t *hash_cfg)
{
struct octeontx_mbox_hdr hdr;
int res;
mbox_pki_hash_cfg_t h_cfg = *(mbox_pki_hash_cfg_t *)hash_cfg;
int len = sizeof(mbox_pki_hash_cfg_t);
hdr.coproc = OCTEONTX_PKI_COPROC;
hdr.msg = MBOX_PKI_PORT_HASH_CONFIG;
hdr.vfid = port;
res = octeontx_ssovf_mbox_send(&hdr, &h_cfg, len, NULL, 0);
if (res < 0)
return -EACCES;
return res;
}
int
octeontx_pki_port_pktbuf_config(int port, pki_pktbuf_cfg_t *buf_cfg)
{
struct octeontx_mbox_hdr hdr;
int res;
mbox_pki_pktbuf_cfg_t b_cfg = *(mbox_pki_pktbuf_cfg_t *)buf_cfg;
int len = sizeof(mbox_pki_pktbuf_cfg_t);
hdr.coproc = OCTEONTX_PKI_COPROC;
hdr.msg = MBOX_PKI_PORT_PKTBUF_CONFIG;
hdr.vfid = port;
res = octeontx_ssovf_mbox_send(&hdr, &b_cfg, len, NULL, 0);
if (res < 0)
return -EACCES;
return res;
}
int
octeontx_pki_port_create_qos(int port, pki_qos_cfg_t *qos_cfg)
{
struct octeontx_mbox_hdr hdr;
int res;
mbox_pki_qos_cfg_t q_cfg = *(mbox_pki_qos_cfg_t *)qos_cfg;
int len = sizeof(mbox_pki_qos_cfg_t);
hdr.coproc = OCTEONTX_PKI_COPROC;
hdr.msg = MBOX_PKI_PORT_CREATE_QOS;
hdr.vfid = port;
res = octeontx_ssovf_mbox_send(&hdr, &q_cfg, len, NULL, 0);
if (res < 0)
return -EACCES;
return res;
}
int
octeontx_pki_port_close(int port)
{
@ -118,6 +177,27 @@ octeontx_pki_port_stop(int port)
return res;
}
int
octeontx_pki_port_errchk_config(int port, pki_errchk_cfg_t *cfg)
{
struct octeontx_mbox_hdr hdr;
int res;
mbox_pki_errcheck_cfg_t e_cfg;
e_cfg = *((mbox_pki_errcheck_cfg_t *)(cfg));
int len = sizeof(mbox_pki_errcheck_cfg_t);
hdr.coproc = OCTEONTX_PKI_COPROC;
hdr.msg = MBOX_PKI_PORT_ERRCHK_CONFIG;
hdr.vfid = port;
res = octeontx_ssovf_mbox_send(&hdr, &e_cfg, len, NULL, 0);
if (res < 0)
return -EACCES;
return res;
}
#define PCI_VENDOR_ID_CAVIUM 0x177D
#define PCI_DEVICE_ID_OCTEONTX_PKI_VF 0xA0DD

364
drivers/net/octeontx/base/octeontx_pkivf.h
View File

@ -45,6 +45,33 @@
#define MBOX_PKI_PORT_START 2
#define MBOX_PKI_PORT_STOP 3
#define MBOX_PKI_PORT_CLOSE 4
#define MBOX_PKI_PORT_CONFIG 5
#define MBOX_PKI_PORT_OPT_PARSER_CONFIG 6
#define MBOX_PKI_PORT_CUSTOM_PARSER_CONFIG 7
#define MBOX_PKI_PORT_PKTBUF_CONFIG 8
#define MBOX_PKI_PORT_HASH_CONFIG 9
#define MBOX_PKI_PORT_ERRCHK_CONFIG 10
#define MBOX_PKI_PORT_CREATE_QOS 11
#define MBOX_PKI_PORT_MODIFY_QOS 12
#define MBOX_PKI_PORT_DELETE_QOS 13
#define MBOX_PKI_PORT_PKTDROP_CONFIG 14
#define MBOX_PKI_PORT_WQE_GEN_CONFIG 15
#define MBOX_PKI_BACKPRESSURE_CONFIG 16
#define MBOX_PKI_PORT_GET_STATS 17
#define MBOX_PKI_PORT_RESET_STATS 18
#define MBOX_PKI_GET_PORT_CONFIG 19
#define MBOX_PKI_GET_PORT_QOS_CONFIG 20
#define MBOX_PKI_MAX_QOS_ENTRY 64
/* pki pkind parse mode */
enum {
MBOX_PKI_PARSE_LA_TO_LG = 0,
MBOX_PKI_PARSE_LB_TO_LG = 1,
MBOX_PKI_PARSE_LC_TO_LG = 3,
MBOX_PKI_PARSE_LG = 0x3f,
MBOX_PKI_PARSE_NOTHING = 0x7f
};
/* Interface types: */
enum {
@ -59,9 +86,346 @@ typedef struct mbox_pki_port_type {
uint8_t port_type;
} mbox_pki_port_t;
/* pki port config */
typedef struct mbox_pki_port_cfg {
uint8_t port_type;
struct {
uint8_t fcs_pres:1;
uint8_t fcs_skip:1;
uint8_t parse_mode:1;
uint8_t mpls_parse:1;
uint8_t inst_hdr_parse:1;
uint8_t fulc_parse:1;
uint8_t dsa_parse:1;
uint8_t hg2_parse:1;
uint8_t hg_parse:1;
} mmask;
uint8_t fcs_pres;
uint8_t fcs_skip;
uint8_t parse_mode;
uint8_t mpls_parse;
uint8_t inst_hdr_parse;
uint8_t fulc_parse;
uint8_t dsa_parse;
uint8_t hg2_parse;
uint8_t hg_parse;
} mbox_pki_prt_cfg_t;
/* pki Flow/style packet buffer config */
typedef struct mbox_pki_port_pktbuf_cfg {
uint8_t port_type;
struct {
uint16_t f_mbuff_size:1;
uint16_t f_wqe_skip:1;
uint16_t f_first_skip:1;
uint16_t f_later_skip:1;
uint16_t f_pkt_outside_wqe:1;
uint16_t f_wqe_endian:1;
uint16_t f_cache_mode:1;
} mmask;
uint16_t mbuff_size;
uint16_t wqe_skip;
uint16_t first_skip;
uint16_t later_skip;
uint8_t pkt_outside_wqe;
uint8_t wqe_endian;
uint8_t cache_mode;
} mbox_pki_pktbuf_cfg_t;
/* pki flow/style tag config */
typedef struct mbox_pki_port_hash_cfg {
uint8_t port_type;
uint32_t tag_slf:1;
uint32_t tag_sle:1;
uint32_t tag_sld:1;
uint32_t tag_slc:1;
uint32_t tag_dlf:1;
uint32_t tag_dle:1;
uint32_t tag_dld:1;
uint32_t tag_dlc:1;
uint32_t tag_prt:1;
uint32_t tag_vlan0:1;
uint32_t tag_vlan1:1;
uint32_t tag_ip_pctl:1;
uint32_t tag_sync:1;
uint32_t tag_spi:1;
uint32_t tag_gtp:1;
uint32_t tag_vni:1;
} mbox_pki_hash_cfg_t;
/* pki flow/style errcheck config */
typedef struct mbox_pki_port_errcheck_cfg {
uint8_t port_type;
struct {
uint32_t f_ip6_udp_opt:1;
uint32_t f_lenerr_en:1;
uint32_t f_maxerr_en:1;
uint32_t f_minerr_en:1;
uint32_t f_fcs_chk:1;
uint32_t f_fcs_strip:1;
uint32_t f_len_lf:1;
uint32_t f_len_le:1;
uint32_t f_len_ld:1;
uint32_t f_len_lc:1;
uint32_t f_csum_lf:1;
uint32_t f_csum_le:1;
uint32_t f_csum_ld:1;
uint32_t f_csum_lc:1;
uint32_t f_min_frame_len;
uint32_t f_max_frame_len;
} mmask;
uint64_t ip6_udp_opt:1;
uint64_t lenerr_en:1;
uint64_t maxerr_en:1;
uint64_t minerr_en:1;
uint64_t fcs_chk:1;
uint64_t fcs_strip:1;
uint64_t len_lf:1;
uint64_t len_le:1;
uint64_t len_ld:1;
uint64_t len_lc:1;
uint64_t csum_lf:1;
uint64_t csum_le:1;
uint64_t csum_ld:1;
uint64_t csum_lc:1;
uint64_t min_frame_len;
uint64_t max_frame_len;
} mbox_pki_errcheck_cfg_t;
/* CACHE MODE*/
enum {
MBOX_PKI_OPC_MODE_STT = 0LL,
MBOX_PKI_OPC_MODE_STF = 1LL,
MBOX_PKI_OPC_MODE_STF1_STT = 2LL,
MBOX_PKI_OPC_MODE_STF2_STT = 3LL
};
/* PKI QPG QOS*/
enum {
MBOX_PKI_QPG_QOS_NONE = 0,
MBOX_PKI_QPG_QOS_VLAN,
MBOX_PKI_QPG_QOS_MPLS,
MBOX_PKI_QPG_QOS_DSA_SRC,
MBOX_PKI_QPG_QOS_DIFFSERV,
MBOX_PKI_QPG_QOS_HIGIG,
};
struct mbox_pki_qos_entry {
uint16_t port_add;
uint16_t ggrp_ok;
uint16_t ggrp_bad;
uint16_t gaura;
uint8_t grptag_ok;
uint8_t grptag_bad;
};
/* pki flow/style enable qos */
typedef struct mbox_pki_port_create_qos {
uint8_t port_type;
uint8_t qpg_qos;
uint8_t num_entry;
uint8_t tag_type;
uint8_t drop_policy;
struct mbox_pki_qos_entry qos_entry[MBOX_PKI_MAX_QOS_ENTRY];
} mbox_pki_qos_cfg_t;
/* pki flow/style enable qos */
typedef struct mbox_pki_port_modify_qos_entry {
uint8_t port_type;
uint16_t index;
struct {
uint8_t f_port_add:1;
uint8_t f_grp_ok:1;
uint8_t f_grp_bad:1;
uint8_t f_gaura:1;
uint8_t f_grptag_ok:1;
uint8_t f_grptag_bad:1;
} mmask;
struct mbox_pki_qos_entry qos_entry;
} mbox_pki_mod_qos_t;
/* PKI maximum constants */
#define PKI_VF_MAX (1)
#define PKI_MAX_PKTLEN (32768)
/* pki pkind parse mode */
enum {
PKI_PARSE_LA_TO_LG = 0,
PKI_PARSE_LB_TO_LG = 1,
PKI_PARSE_LC_TO_LG = 3,
PKI_PARSE_LG = 0x3f,
PKI_PARSE_NOTHING = 0x7f
};
/* pki port config */
typedef struct pki_port_cfg {
uint8_t port_type;
struct {
uint8_t fcs_pres:1;
uint8_t fcs_skip:1;
uint8_t parse_mode:1;
uint8_t mpls_parse:1;
uint8_t inst_hdr_parse:1;
uint8_t fulc_parse:1;
uint8_t dsa_parse:1;
uint8_t hg2_parse:1;
uint8_t hg_parse:1;
} mmask;
uint8_t fcs_pres;
uint8_t fcs_skip;
uint8_t parse_mode;
uint8_t mpls_parse;
uint8_t inst_hdr_parse;
uint8_t fulc_parse;
uint8_t dsa_parse;
uint8_t hg2_parse;
uint8_t hg_parse;
} pki_prt_cfg_t;
/* pki Flow/style packet buffer config */
typedef struct pki_port_pktbuf_cfg {
uint8_t port_type;
struct {
uint16_t f_mbuff_size:1;
uint16_t f_wqe_skip:1;
uint16_t f_first_skip:1;
uint16_t f_later_skip:1;
uint16_t f_pkt_outside_wqe:1;
uint16_t f_wqe_endian:1;
uint16_t f_cache_mode:1;
} mmask;
uint16_t mbuff_size;
uint16_t wqe_skip;
uint16_t first_skip;
uint16_t later_skip;
uint8_t pkt_outside_wqe;
uint8_t wqe_endian;
uint8_t cache_mode;
} pki_pktbuf_cfg_t;
/* pki flow/style tag config */
typedef struct pki_port_hash_cfg {
uint8_t port_type;
uint32_t tag_slf:1;
uint32_t tag_sle:1;
uint32_t tag_sld:1;
uint32_t tag_slc:1;
uint32_t tag_dlf:1;
uint32_t tag_dle:1;
uint32_t tag_dld:1;
uint32_t tag_dlc:1;
uint32_t tag_prt:1;
uint32_t tag_vlan0:1;
uint32_t tag_vlan1:1;
uint32_t tag_ip_pctl:1;
uint32_t tag_sync:1;
uint32_t tag_spi:1;
uint32_t tag_gtp:1;
uint32_t tag_vni:1;
} pki_hash_cfg_t;
/* pki flow/style errcheck config */
typedef struct pki_port_errcheck_cfg {
uint8_t port_type;
struct {
uint32_t f_ip6_udp_opt:1;
uint32_t f_lenerr_en:1;
uint32_t f_maxerr_en:1;
uint32_t f_minerr_en:1;
uint32_t f_fcs_chk:1;
uint32_t f_fcs_strip:1;
uint32_t f_len_lf:1;
uint32_t f_len_le:1;
uint32_t f_len_ld:1;
uint32_t f_len_lc:1;
uint32_t f_csum_lf:1;
uint32_t f_csum_le:1;
uint32_t f_csum_ld:1;
uint32_t f_csum_lc:1;
uint32_t f_min_frame_len;
uint32_t f_max_frame_len;
} mmask;
uint64_t ip6_udp_opt:1;
uint64_t lenerr_en:1;
uint64_t maxerr_en:1;
uint64_t minerr_en:1;
uint64_t fcs_chk:1;
uint64_t fcs_strip:1;
uint64_t len_lf:1;
uint64_t len_le:1;
uint64_t len_ld:1;
uint64_t len_lc:1;
uint64_t csum_lf:1;
uint64_t csum_le:1;
uint64_t csum_ld:1;
uint64_t csum_lc:1;
uint64_t min_frame_len;
uint64_t max_frame_len;
} pki_errchk_cfg_t;
/* CACHE MODE*/
enum {
PKI_OPC_MODE_STT = 0LL,
PKI_OPC_MODE_STF = 1LL,
PKI_OPC_MODE_STF1_STT = 2LL,
PKI_OPC_MODE_STF2_STT = 3LL
};
/* PKI QPG QOS*/
enum {
PKI_QPG_QOS_NONE = 0,
PKI_QPG_QOS_VLAN,
PKI_QPG_QOS_MPLS,
PKI_QPG_QOS_DSA_SRC,
PKI_QPG_QOS_DIFFSERV,
PKI_QPG_QOS_HIGIG,
};
struct pki_qos_entry {
uint16_t port_add;
uint16_t ggrp_ok;
uint16_t ggrp_bad;
uint16_t gaura;
uint8_t grptag_ok;
uint8_t grptag_bad;
uint8_t ena_red;
uint8_t ena_drop;
};
#define PKO_MAX_QOS_ENTRY 64
/* pki flow/style enable qos */
typedef struct pki_port_create_qos {
uint8_t port_type;
uint8_t qpg_qos;
uint8_t num_entry;
uint8_t tag_type;
uint8_t drop_policy;
struct pki_qos_entry qos_entry[PKO_MAX_QOS_ENTRY];
} pki_qos_cfg_t;
/* pki flow/style enable qos */
typedef struct pki_port_modify_qos_entry {
uint8_t port_type;
uint16_t index;
struct {
uint8_t f_port_add:1;
uint8_t f_grp_ok:1;
uint8_t f_grp_bad:1;
uint8_t f_gaura:1;
} mmask;
struct pki_qos_entry qos_entry;
} pki_mod_qos_t;
int octeontx_pki_port_open(int port);
int octeontx_pki_port_hash_config(int port, pki_hash_cfg_t *hash_cfg);
int octeontx_pki_port_pktbuf_config(int port, pki_pktbuf_cfg_t *buf_cfg);
int octeontx_pki_port_create_qos(int port, pki_qos_cfg_t *qos_cfg);
int octeontx_pki_port_close(int port);
int octeontx_pki_port_start(int port);
int octeontx_pki_port_stop(int port);
int octeontx_pki_port_errchk_config(int port, pki_errchk_cfg_t *cfg);
#endif /* __OCTEONTX_PKI_H__ */