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doc: release notes 1.7

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The 1.7 DPDK_Release_Notes document in MSWord has been converted to rst format for
use with Sphinx. There is an rst file for each chapter and an index.rst file
which contains the table of contents.
The top level index file has been modified to include this document.

This is the third document from a set of 6 documents

Signed-off-by:  Bernard Iremonger <bernard.iremonger@intel.com>
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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Appendix A Intel® DPDK License Overview
=========================================
The following describes the various licenses used by the Intel® Data Plane Development Kit (Intel® DPDK).
The purpose of the Intel® DPDK is to prove the abilities of the Intel® architecture processors and to provide users with a strong set of examples, libraries and proof points.
By placing the majority of this software under the BSD License, users may choose to use the Intel® as is, parts of it, or just the ideas for their programs.
All code may be modified by the user to suit their project needs and requirements.
.. note::
The license in each source file takes precedence over this document, and should be used as the definitive license for that file.
All users should seek their legal team's guidance with respect to the licensing used by the Intel® DPDK.
The following table lists those files (or libraries) that are not under a BSD License. In some cases, these files are part of the standard Intel® DPDK release package,
and in other cases may be a separate package that requires a separate download to be added to the Intel® DPDK. This document spells out those cases where possible.
The sections following the table provide the various licenses used. Please note that copyright notices may change overtime.
It is the responsibility of all users to understand these licenses and seek their legal team's guidance.
The use of the GPLv2 License is confined to files in kernel loadable modules.
The use of the Dual BSD/LGPLv2 License and Dual BSD/GPL License allows use with either free/open source software or with proprietary software in userspace.
+---------------------------------------------------+----------------------------------------------------------------------------------------------------------------------+--------------------------------------+
| File | Description | License |
| | | |
+===================================================+======================================================================================================================+======================================+
| igb_uio.c | **1st Released** | GPLv2 License Information |
| | : 1.0 | |
| | | |
| | **Location** | |
| | : | |
| | DPDK/lib/librte_eal/linuxapp/igb_uio/ | |
| | | |
| | **Description** | |
| | : This file is used for a kernel loadable module which is responsible for unbinding NICs from the Linux kernel | |
| | and binding them to the Intel® DPDK | |
| | | |
+---------------------------------------------------+----------------------------------------------------------------------------------------------------------------------+--------------------------------------+
| kni_dev.h kni_ethtool.c kni_misc.c kni_net.c | **1st Released** | GPLv2 License Information |
| | : 1.3 | |
| | | |
| | **Location** | |
| | : DPDK/lib/librte_eal/linuxapp/kni/ | |
| | | |
| | **Description** | |
| | : The KNI kernel loadable module is a standard net driver which allows Intel DPDK Linux userspace applications | |
| | to exchange packets/data with the Linux kernel. | |
| | | |
+---------------------------------------------------+----------------------------------------------------------------------------------------------------------------------+--------------------------------------+
| rte_kni_common.h | **1st Released** | Dual BSD/LGPLv2 License Information |
| | : 1.3 | |
| | | |
| | **Location** | |
| | : DPDK/lib/librte_eal/linuxapp/eal/include/exec-env/ | |
| | | |
| | **Description** | |
| | : The KNI header files is utilized by both the Intel DPDK userspace application and the KNI kernel loadable module | |
| | | |
+---------------------------------------------------+----------------------------------------------------------------------------------------------------------------------+--------------------------------------+
| All files under this directory are for the | **1st Released** | GPLv2 License Information |
| ethtool functionality. | : 1.3 | |
| | | |
| | **Location** | |
| | : DPDK/lib/librte_eal/linuxapp/kni/ethtool | |
| | | |
| | **Description** | |
| | : The igb and ixgbe drivers for the Ethtool function available with the KNI kernel loadable. | |
| | | |
+---------------------------------------------------+----------------------------------------------------------------------------------------------------------------------+--------------------------------------+
| rte_pci_dev_ids.h | **1st Released** | Dual BSD/GPL License Information |
| | : 1.3 | |
| | | |
| | **Location** | |
| | : DPDK/lib/librte_eal/common/include | |
| | | |
| | **Description** | |
| | : Contains the PCI device ids for all devices. | |
| | | |
+---------------------------------------------------+----------------------------------------------------------------------------------------------------------------------+--------------------------------------+
Added rte_dom0_mm.h file for Dual BSD/LGPLv2 License information:
rte_dom0_mm.h 1st Released 1.6.0
Location: DPDK/lib.librte_eal/eal/include/exec-env/
Description: The Dom0 header file is utilized by both the Intel® DPDK userspace application and the Dom0 kernel loadable module
Added dom0_mm_misc.h and dom0_mm_misc.c file for Dual BSD/GPLv2 License Information:
dom0_mm_dev.h 1st Released 1.6.0
dom0_mm_dev.c Location: DPDK/lib.librte_eal/linuxapp/xen_dom0
Description: The Dom0 memory management kernel loadable module is a misc device driver which is used to facilitate allocating and mapping via an **IOCTL** (allocation) and **MMAP** (mapping).
A.1 BSD License
---------------
.. code-block:: c
/*-
* BSD LICENSE
*
* Copyright(c) 2010-2012 Intel Corporation. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
A.2 GPLv2 License Information
-----------------------------
.. code-block:: c
/*-
*
* Copyright (c) 2010-2012, Intel Corporation
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
*
..
\* GNU GPL V2: `http://www.gnu.org/licenses/old-licenses/gpl-2.0.html <http://www.gnu.org/licenses/old-licenses/gpl-2.0.html>`_
.. code-block:: c
*
*/
A.3 Dual BSD/LGPLv2 License Information
---------------------------------------
.. code-block:: c
/*
This file is provided under a dual BSD/LGPLv2 license. When using
or redistributing this file, you may do so under either license.
GNU LESSER GENERAL PUBLIC LICENSE
Copyright(c) 2007,2008,2009 Intel Corporation. All rights reserved.
This program is free software; you can redistribute it and/or modify
it under the terms of version 2.1 of the GNU Lesser General Public License
as published by the Free Software Foundation.
This program is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A
PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public License along with
this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
Contact Information: Intel Corporation
BSD LICENSE
Copyright(c) 2010-2012 Intel Corporation.All rights reserved. All rights reserved.
Redistribution and use in source and binary forms, with or without modification, are
permitted provided that the following conditions are met:
Redistributions of source code must retain the above copyright notice, this list of
conditions and the following disclaimer.
Redistributions in binary form must reproduce the above copyright notice, this list
of conditions and the following disclaimer in the documentation and/or other
materials provided with the distribution.
Neither the name of Intel Corporation nor the names of its contributors may be used
to endorse or promote products derived from this software without specific prior
written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
DAMAGE.
*/
A.4 Dual BSD/GPL License Information
------------------------------------
.. code-block:: c
/*-
* This file is provided under a dual BSD/GPLv2 license. When using or
* redistributing this file, you may do so under either license.
*
* GPL LICENSE SUMMARY
*
* Copyright(c) 2010-2012 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
* The full GNU General Public License is included in this distribution
* in the file called LICENSE.GPL.
*
* Contact Information:
* Intel Corporation
*
* BSD LICENSE
*
* Copyright(c) 2010-2012 Intel Corporation. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Frequently Asked Questions (FAQ)
================================
When running the test application, I get “EAL: map_all_hugepages(): open failed: Permission denied Cannot init memory”?
-----------------------------------------------------------------------------------------------------------------------
This is most likely due to the test application not being run with sudo to promote the user to a superuser.
Alternatively, applications can also be run as regular user.
For more information, please refer to *Intel® DPDK Getting Started Guide*.
If I want to change the number of TLB Hugepages allocated, how do I remove the original pages allocated?
--------------------------------------------------------------------------------------------------------
The number of pages allocated can be seen by executing the cat /proc/meminfo|grep Huge command.
Once all the pages are mmapped by an application, they stay that way.
If you start a test application with less than the maximum, then you have free pages.
When you stop and restart the test application, it looks to see if the pages are available in the /dev/huge directory and mmaps them.
If you look in the directory, you will see n number of 2M pages files. If you specified 1024, you will see 1024 files.
These are then placed in memory segments to get contiguous memory.
If you need to change the number of pages, it is easier to first remove the pages. The tools/setup.sh script provides an option to do this.
See the “Quick Start Setup Script” section in the *Intel® DPDK Getting Started Guide* for more information.
If I execute “l2fwd -c f -m 64 –n 3 -- -p 3”, I get the following output, indicating that there are no socket 0 hugepages to allocate the mbuf and ring structures to?
-----------------------------------------------------------------------------------------------------------------------------------------------------------------------
I have set up a total of 1024 Hugepages (that is, allocated 512 2M pages to each NUMA node).
The -m command line parameter does not guarantee that huge pages will be reserved on specific sockets. Therefore, allocated huge pages may not be on socket 0.
To request memory to be reserved on a specific socket, please use the --socket-mem command-line parameter instead of -m.
I am running a 32-bit Intel® DPDK application on a NUMA system, and sometimes the application initializes fine but cannot allocate memory. Why is that happening?
-----------------------------------------------------------------------------------------------------------------------------------------------------------------
32-bit applications have limitations in terms of how much virtual memory is available, hence the number of hugepages they are able to allocate is also limited (1 GB per page size).
If your system has a lot (>1 GB per page size) of hugepage memory, not all of it will be allocated.
Due to hugepages typically being allocated on a local NUMA node, the hugepages allocation the application gets during the initialization depends on which
NUMA node it is running on (the EAL does not affinitize cores until much later in the initialization process).
Sometimes, the Linux OS runs the Intel® DPDK application on a core that is located on a different NUMA node from Intel® DPDK master core and
therefore all the hugepages are allocated on the wrong socket.
To avoid this scenario, either lower the amount of hugepage memory available to 1 GB per page size (or less), or run the application with taskset
affinitizing the application to a would-be master core.
For example, if your EAL coremask is 0xff0, the master core will usually be the first core in the coremask (0x10); this is what you have to supply to taskset, for example,
taskset 0x10 ./l2fwd -c 0xff0 -n 2.
In this way, the hugepages have a greater chance of being allocated to the correct socket.
Additionally, a --socket-mem option could be used to ensure the availability of memory for each socket, so that if hugepages were allocated on
the wrong socket, the application simply will not start.
On application startup, there is a lot of EAL information printed. Is there any way to reduce this?
---------------------------------------------------------------------------------------------------
Yes, each EAL has a configuration file that is located in the /config directory. Within each configuration file, you will find CONFIG_RTE_LOG_LEVEL=8.
You can change this to a lower value, such as 6 to reduce this printout of debug information. The following is a list of LOG levels that can be found in the rte_log.h file.
You must remove, then rebuild, the EAL directory for the change to become effective as the configuration file creates the rte_config.h file in the EAL directory.
.. code-block:: c
#define RTE_LOG_EMERG 1U /* System is unusable. */
#define RTE_LOG_ALERT 2U /* Action must be taken immediately. */
#define RTE_LOG_CRIT 3U /* Critical conditions. */
#define RTE_LOG_ERR 4U /* Error conditions. */
#define RTE_LOG_WARNING 5U /* Warning conditions. */
#define RTE_LOG_NOTICE 6U /* Normal but significant condition. */
#define RTE_LOG_INFO 7U /* Informational. */
#define RTE_LOG_DEBUG 8U /* Debug-level messages. */
How can I tune my network application to achieve lower latency?
---------------------------------------------------------------
Traditionally, there is a trade-off between throughput and latency. An application can be tuned to achieve a high throughput,
but the end-to-end latency of an average packet typically increases as a result.
Similarly, the application can be tuned to have, on average, a low end-to-end latency at the cost of lower throughput.
To achieve higher throughput, the Intel® DPDK attempts to aggregate the cost of processing each packet individually by processing packets in bursts.
Using the testpmd application as an example, the “burst” size can be set on the command line to a value of 16 (also the default value).
This allows the application to request 16 packets at a time from the PMD.
The testpmd application then immediately attempts to transmit all the packets that were received, in this case, all 16 packets.
The packets are not transmitted until the tail pointer is updated on the corresponding TX queue of the network port.
This behavior is desirable when tuning for high throughput because the cost of tail pointer updates to both the RX and TX queues
can be spread across 16 packets, effectively hiding the relatively slow MMIO cost of writing to the PCIe* device.
However, this is not very desirable when tuning for low latency, because the first packet that was received must also wait for the other 15 packets to be received.
It cannot be transmitted until the other 15 packets have also been processed because the NIC will not know to transmit the packets until the TX tail pointer has been updated,
which is not done until all 16 packets have been processed for transmission.
To consistently achieve low latency even under heavy system load, the application developer should avoid processing packets in bunches.
The testpmd application can be configured from the command line to use a burst value of 1.
This allows a single packet to be processed at a time, providing lower latency, but with the added cost of lower throughput.
Without NUMA enabled, my network throughput is low, why?
--------------------------------------------------------
I have a dual Intel® Xeon® E5645 processors @2.40 GHz with four Intel® 82599 10 Gigabit Ethernet NICs.
Using eight logical cores on each processor with RSS set to distribute network load from two 10 GbE interfaces to the cores on each processor.
Without NUMA enabled, memory is allocated from both sockets, since memory is interleaved.
Therefore, each 64B chunk is interleaved across both memory domains.
The first 64B chunk is mapped to node 0, the second 64B chunk is mapped to node 1, the third to node 0, the fourth to node 1.
If you allocated 256B, you would get memory that looks like this:
.. code-block:: console
256B buffer
Offset 0x00 - Node 0
Offset 0x40 - Node 1
Offset 0x80 - Node 0
Offset 0xc0 - Node 1
Therefore, packet buffers and descriptor rings are allocated from both memory domains, thus incurring QPI bandwidth accessing the other memory and much higher latency.
For best performance with NUMA disabled, only one socket should be populated.
I am getting errors about not being able to open files. Why?
------------------------------------------------------------
As the Intel® DPDK operates, it opens a lot of files, which can result in reaching the open files limits, which is set using the ulimit command or in the limits.conf file.
This is especially true when using a large number (>512) of 2 MB huge pages. Please increase the open file limit if your application is not able to open files.
This can be done either by issuing a ulimit command or editing the limits.conf file. Please consult Linux* manpages for usage information.
Does my kernel require patching to run the Intel® DPDK?
-------------------------------------------------------
Any kernel greater than version 2.6.33 can be used without any patches applied. The following kernels may require patches to provide hugepage support:
* kernel version 2.6.32 requires the following patches applied:
* `addhugepage support to pagemap <http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=5dc37642cbce34619e4588a9f0bdad1d2f870956>`_
* `fix hugepage memory leak <http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=d33b9f45bd24a6391bc05e2b5a13c1b5787ca9c2>`_
* `add nodemask arg to huge page alloc <http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=6ae11b278bca1cd41651bae49a8c69de2f6a6262>`_
(not mandatory, but recommended on a NUMA system to support per-NUMA node hugepages allocation)
* kernel version 2.6.31, requires the following patches applied:
* `fix hugepage memory leak <http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=d33b9f45bd24a6391bc05e2b5a13c1b5787ca9c2>`_
* `add hugepage support to pagemap <http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=5dc37642cbce34619e4588a9f0bdad1d2f870956>`_
* `add uio name attributes and port regions <http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=8205779114e8f612549d191f8e151526a74ab9f2>`_
* `add nodemask arg to huge page alloc <http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=6ae11b278bca1cd41651bae49a8c69de2f6a6262>`_
(not mandatory, but recommended on a NUMA system to support per-NUMA node hugepages allocation)
.. note::
Blue text in the lists above are direct links to the patch downloads.
VF driver for IXGBE devices cannot be initialized.
--------------------------------------------------
Some versions of Linux* IXGBE driver do not assign a random MAC address to VF devices at initialization.
In this case, this has to be done manually on the VM host, using the following command:
.. code-block:: console
ip link set <interface> vf <VF function> mac <MAC address>
where <interface> being the interface providing the virtual functions for example, eth0, <VF function> being the virtual function number, for example 0,
and <MAC address> being the desired MAC address.

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Release Notes
=============
Package Version: 1.7
June 2014
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Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Copies of documents which have an order number and are referenced in this document, or other Intel literature, may be obtained by calling
1-800-548-4725, or go to:
`http://www.intel.com/design/literature.htm <http://www.intel.com/design/literature.htm>`_
Any software source code reprinted in this document is furnished for informational purposes only and may only be used or copied and no license, express or implied, by estoppel or otherwise,
to any of the reprinted source code is granted by this document.
Code Names are only for use by Intel to identify products, platforms, programs, services, etc. ("products") in development by
Intel that have not been made commercially available to the public, i.e., announced, launched or shipped. They are never to be used as "commercial" names for products.
Also, they are not intended to function as trademarks.
See Appendix A for an overview of the applicable software licenses.
Intel, the Intel logo, Intel Core and Xeon are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries.
\*Other names and brands may be claimed as the property of others.
Copyright © 2012-2014 , Intel Corporation. All rights reserved.
Contents
.. toctree::
:maxdepth: 2
:numbered:
rel_description
new_features
supported_features
supported_os
updating_apps
known_issues
resolved_issues
faq
appendices

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
New Features
============
* Packet Distributor library for dynamic, single-packet at a time, load balancing
* IP fragmentation and reassembly library
* Support for IPv6 in IP fragmentation and reassembly sample applications
* Support for VFIO for mapping BARs and setting up interrupts
* Link Bonding PMD Library supporting round-robin, active backup, balance(layer 2, layer 2+3, and layer 3+4) and broadcast bonding modes
* Support zero copy mode RX/TX in user space vhost sample
* Support multiple queues in virtio-net PMD
* Support for Intel® 40GbE Controllers
* Support NIC filters in addition to flow director for Intel® 1GbE and 10GbE Controllers
For further features supported in this release, see Chapter 3 Supported Features.

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Description of Release
======================
These release notes cover the new features,
fixed bugs and known issues for Intel® Data Plane Development Kit (Intel® DPDK) release version 1.7.0.
For instructions on compiling and running the release, see the *Intel® DPDK Getting Started Guide*.
Important Note
--------------
All Intel® DPDK questions and technical problems including those regarding the Ethernet* Controllers for the Poll Mode Driver should be reported through the Intel® Premier Support site
`http://premier.intel.com/premier <http://premier.intel.com/premier>`_
or access your IBL account and click the **Intel® Premier Support** link to enter issues under the Product Name “Data Plane Development Kit (DPDK)”,
which are then routed to our support team.
Using Intel® DPDK Upgrade Patches
---------------------------------
For minor updates to the main Intel® DPDK releases, the software may be made available both as a new full package and as a patch file to be applied to the previously released package.
In the latter case, the following commands should be used to apply the patch on top of the already-installed package for the previous release:
.. code-block:: console
# cd $RTE_SDK
# patch –p1 < /path/to/patch/file
Once the patch has been applied cleanly, the Intel® DPDK can be recompiled and used as before (described in the *Intel® DPDK Getting Started Guide*).
.. note::
If the patch does not apply cleanly, perhaps because of modifications made locally to the software,
it is recommended to use the full release package for the minor update, instead of using the patch.
Documentation Roadmap
---------------------
The following is a list of Intel® DPDK documents in the suggested reading order:
* **Release Notes**
(this document): Provides release-specific information, including supported features, limitations, fixed issues, known issues and so on.
Also, provides the answers to frequently asked questions in FAQ format.
* **Getting Started Guide**
: Describes how to install and configure the Intel® DPDK software; designed to get users up and running quickly with the software.
* **FreeBSD* Getting Started Guide**
: A document describing the use of the Intel® DPDK with FreeBSD* has been added in Intel® DPDK Release 1.6.0.
Refer to this guide for installation and configuration instructions to get started using the Intel® DPDK with FreeBSD*.
* **Programmer's Guide**
: Describes:
* The software architecture and how to use it (through examples), specifically in a Linux* application (linuxapp) environment
* The content of the Intel® DPDK, the build system (including the commands that can be used in the root Intel® DPDK Makefile to build the development kit and an application)
and guidelines for porting an application
* Optimizations used in the software and those that should be considered for new development
A glossary of terms is also provided.
* **API Reference**
: Provides detailed information about Intel® DPDK functions, data structures and other programming constructs.
* **Sample Applications User Guide**
: Describes a set of sample applications. Each chapter describes a sample application that showcases specific functionality and provides instructions on how to compile,
run and use the sample application.
The following sample applications are included:
* Command Line
* Exception Path (into Linux* for packets using the Linux TUN/TAP driver)
* Hello World
* Integration with Intel® QuickAssist Technology
* Link Status Interrupt (Ethernet* Link Status Detection)
* IP Reassembly
* IP Fragmentation
* IPv4 Multicast
* L2 Forwarding (supports virtualized and non-virtualized environments)
* L2 Forwarding IVSHMEM
* L3 Forwarding
* L3 Forwarding with Power Management
* L3 Forwarding in a Virtualized Environment
* Load Balancing
* Multi-process
* QoS Scheduler + Dropper
* QoS Metering
* Quota & Watermarks
* Timer
* VMDQ and DCB L2 Forwarding
* VMDQ L2 Forwarding
* Userspace vhost
* Userspace vhost switch
* Netmap
* Kernel NIC Interface (KNI)
In addition, there are some other applications that are built when the libraries are created.
The source for these applications is in the DPDK/app directory and are called:
* test
* testpmd
Once the libraries are created, they can be found in the build/app directory.
* The test application provides a variety of specific tests for the various functions in the Intel® DPDK.
* The testpmd application provides a number of different packet throughput tests and examples of features such as
how to use the Flow Director found in the Intel® 82599 10 Gigabit Ethernet Controller.
The testpmd application is documented in the *Intel® DPDK Testpmd Application Note* (525362).
The test application is not currently documented.
However, you should be able to run and use test application with the command line help that is provided in the application.

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Supported Features
==================
* Virtualization (KVM)
* Userspace vhost switch:
New sample application to support userspace virtio back-end in host and packet switching between guests.
* Virtualization (Xen)
* Support for Intel® DPDK application running on Xen Domain0 without hugepages.
* Para-virtualization
Support front-end Poll Mode Driver in guest domain
Support userspace packet switching back-end example in host domain
* FreeBSD* 9.2 support for librte_pmd_e1000, librte_pmd_ixgbe and Virtual Function variants.
Please refer to the *Intel® DPDK for FreeBSD\* Getting Started Guide*.
Application support has been added for the following:
* multiprocess/symmetric_mp
* multiprocess/simple_mp
* l2fwd
* l3fwd
* Support for sharing data over QEMU IVSHMEM
* Support for Intel® Communications Chipset 8925 to 8955 Series in the DPDK-QAT Sample Application
* New VMXNET3 driver for the paravirtual device presented to a VM by the VMware* ESXi Hypervisor.
* BETA: example support for basic Netmap applications on Intel® DPDK
* Support for the wireless KASUMI algorithm in the dpdk_qat sample application
* Hierarchical scheduler implementing 5-level scheduling hierarchy (port, sub-port, pipe, traffic class, queue)
with 64K leaf nodes (packet queues).
* Packet dropper based on Random Early Detection (RED) congestion control mechanism.
* Traffic Metering based on Single Rate Three Color Marker (srTCM) and Two Rate Three Color Marker (trTCM).
* An API for configuring RSS redirection table on the fly
* An API to support KNI in a multi-process environment
* IPv6 LPM forwarding
* Power management library and sample application using CPU frequency scaling
* IPv4 reassembly sample application
* Quota & Watermarks sample application
* PCIe Multi-BAR Mapping Support
* Support for Physical Functions in Poll Mode Driver for the following devices:
* Intel® 82576 Gigabit Ethernet Controller
* Intel® i350 Gigabit Ethernet Controller
* Intel® 82599 10-Gigabit Ethernet Controller
* Intel® XL710/X710 40-Gigabit Ethernet Controller
* Quality of Service (QoS) Hierarchical Scheduler: Sub-port Traffic Class Oversubscription
* Multi-thread Kernel NIC Interface (KNI) for performance improvement
* Virtualization (KVM)
* Para-virtualization
Support virtio front-end poll mode driver in guest virtual machine
Support vHost raw socket interface as virtio back-end via KNI
* SR-IOV Switching for the 10G Ethernet Controller
Support Physical Function to start/stop Virtual Function Traffic
Support Traffic Mirroring (Pool, VLAN, Uplink and Downlink)
Support VF multiple MAC addresses (Exact/Hash match), VLAN filtering
Support VF receive mode configuration
* Support VMDq for 1 GbE and 10 GbE NICs
* Extension for the Quality of Service (QoS) sample application to allow statistics polling
* New libpcap -based poll-mode driver, including support for reading from 3rd Party NICs
using Linux kernel drivers
* New multi-process example using fork() to demonstrate application resiliency and recovery,
including reattachment to and re-initialization of shared data structures where necessary
* New example (vmdq) to demonstrate VLAN-based packet filtering
* Improved scalability for scheduling large numbers of timers using the rte_timer library
* Support for building the Intel® DPDK as a shared library
* Support for Intel® Ethernet Server Bypass Adapter X520-SR2
* Poll Mode Driver support for the Intel® Ethernet Connection I354 on the Intel® Atom™
Processor C2000 Product Family SoCs
* IPv6 exact match flow classification in the l3fwd sample application
* Support for multiple instances of the Intel® DPDK
* Support for Intel® 82574L Gigabit Ethernet Controller - Intel® Gigabit CT Desktop Adapter
(previously code named “Hartwell”)
* Support for Intel® Ethernet Controller I210 (previously code named “Springville”)
* Early access support for the Quad-port Intel® Ethernet Server Adapter X520-4 and X520-DA2
(code named “Spring Fountain”)
* Support for Intel® X710/XL710 40 Gigabit Ethernet Controller (code named “Fortville”)
* Core components:
* rte_mempool: allocator for fixed-sized objects
* rte_ring: single- or multi- consumer/producer queue implementation
* rte_timer: implementation of timers
* rte_malloc: malloc-like allocator
* rte_mbuf: network packet buffers, including fragmented buffers
* rte_hash: support for exact-match flow classification in software
* rte_lpm: support for longest prefix match in software for IPv4 and IPv6
* rte_sched: support for QoS scheduling
* rte_meter: support for QoS traffic metering
* rte_power: support for power management
* rte_ip_frag: support for IP fragmentation and reassembly
* Poll Mode Driver - Common (rte_ether)
* VLAN support
* Support for Receive Side Scaling (RSS)
* IEEE1588
* Buffer chaining; Jumbo frames
* TX checksum calculation
* Configuration of promiscuous mode, and multicast packet receive filtering
* L2 Mac address filtering
* Statistics recording
* IGB Poll Mode Driver - 1 GbE Controllers (librte_pmd_e1000)
* Support for Intel® 82576 Gigabit Ethernet Controller (previously code named “Kawela”)
* Support for Intel® 82580 Gigabit Ethernet Controller (previously code named “Barton Hills”)
* Support for Intel® I350 Gigabit Ethernet Controller (previously code named “Powerville”)
* Support for Intel® 82574L Gigabit Ethernet Controller - Intel® Gigabit CT Desktop Adapter
(previously code named “Hartwell”)
* Support for Intel® Ethernet Controller I210 (previously code named “Springville”)
* Support for L2 Ethertype filters, SYN filters, 2-tuple filters and Flex filters for 82580 and i350
* Support for L2 Ethertype filters, SYN filters and L3/L4 5-tuple filters for 82576
* Poll Mode Driver - 10 GbE Controllers (librte_pmd_ixgbe)
* Support for Intel® 82599 10 Gigabit Ethernet Controller (previously code named “Niantic”)
* Support for Intel® Ethernet Server Adapter X520-T2 (previously code named “Iron Pond”)
* Support for Intel® Ethernet Controller X540-T2 (previously code named “Twin Pond”)
* Support for Virtual Machine Device Queues (VMDq) and Data Center Bridging (DCB) to divide
incoming traffic into 128 RX queues. DCB is also supported for transmitting packets.
* Support for auto negotiation down to 1 Gb
* Support for Flow Director
* Support for L2 Ethertype filters, SYN filters and L3/L4 5-tuple filters for 82599EB
* Poll Mode Driver - 40 GbE Controllers (librte_pmd_i40e)
* Support for Intel® XL710 40 Gigabit Ethernet Controller
* Support for Intel® X710 40 Gigabit Ethernet Controller
* Environment Abstraction Layer (librte_eal)
* Multi-process support
* Multi-thread support
* 1 GB and 2 MB page support
* Atomic integer operations
* Querying CPU support of specific features
* High Precision Event Timer support (HPET)
* PCI device enumeration and blacklisting
* Spin locks and R/W locks
* Test PMD application
* Support for PMD driver testing
* Test application
* Support for core component tests
* Sample applications
* Command Line
* Exception Path (into Linux* for packets using the Linux TUN/TAP driver)
* Hello World
* Integration with Intel® Quick Assist Technology drivers 1.0.0, 1.0.1 and 1.1.0 on Intel®
Communications Chipset 89xx Series C0 and C1 silicon.
* Link Status Interrupt (Ethernet* Link Status Detection
* IPv4 Fragmentation
* IPv4 Multicast
* IPv4 Reassembly
* L2 Forwarding (supports virtualized and non-virtualized environments)
* L3 Forwarding (IPv4 and IPv6)
* L3 Forwarding in a Virtualized Environment
* L3 Forwarding with Power Management
* QoS Scheduling
* QoS Metering + Dropper
* Quota & Watermarks
* Load Balancing
* Multi-process
* Timer
* VMDQ and DCB L2 Forwarding
* Kernel NIC Interface (with ethtool support)
* Userspace vhost switch
* Interactive command line interface (rte_cmdline)
* Updated 10 GbE Poll Mode Driver (PMD) to the latest BSD code base providing support of newer
ixgbe 10 GbE devices such as the Intel® X520-T2 server Ethernet adapter
* An API for configuring Ethernet flow control
* Support for interrupt-based Ethernet link status change detection
* Support for SR-IOV functions on the Intel® 82599, Intel® 82576 and Intel® i350 Ethernet
Controllers in a virtualized environment
* Improvements to SR-IOV switch configurability on the Intel® 82599 Ethernet Controllers in
a virtualized environment.
* An API for L2 Ethernet Address “whitelist” filtering
* An API for resetting statistics counters
* Support for RX L4 (UDP/TCP/SCTP) checksum validation by NIC
* Support for TX L3 (IPv4/IPv6) and L4 (UDP/TCP/SCTP) checksum calculation offloading
* Support for IPv4 packet fragmentation and reassembly
* Support for zero-copy Multicast
* New APIs to allow the “blacklisting” of specific NIC ports.
* Header files for common protocols (IP, SCTP, TCP, UDP)
* Improved multi-process application support, allowing multiple co-operating Intel® DPDK
processes to access the NIC port queues directly.
* CPU-specific compiler optimization
* Improvements to the Load Balancing sample application
* The addition of a PAUSE instruction to tight loops for energy-usage and performance improvements
* Updated 10 GbE Transmit architecture incorporating new upstream PCIe* optimizations.
* IPv6 support:
* Support in Flow Director Signature Filters and masks
* RSS support in sample application that use RSS
* Exact match flow classification in the L3 Forwarding sample application
* Support in LPM for IPv6 addresses

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Supported Operating Systems
===========================
The following Linux* distributions were successfully used to generate or run the Intel® DPDK.
* FreeBSD* 9.2
* Fedora release 18
* Ubuntu* 12.04 LTS
* Wind River* Linux* 5
* Red Hat* Enterprise Linux 6.3
* SUSE Enterprise Linux* 11 SP2
These distributions may need additional packages that are not installed by default, or a specific kernel.
Refer to the *Intel® DPDK Getting Started Guide* for details.

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Updating Applications from Previous Versions
============================================
Although backward compatibility is being maintained across Intel® DPDK releases, code written for previous versions of the Intel® DPDK
may require some code updates to benefit from performance and user experience enhancements provided in later Intel® DPDK releases.
Intel® DPDK 1.6 to Intel® DPDK 1.7
----------------------------------
Note the following difference between 1.6 and 1.7:
* The "default" target has been renamed to "native"
Intel® DPDK 1.5 to Intel® DPDK 1.6
----------------------------------
Note the following difference between 1.5 and 1.6:
* The CONFIG_RTE_EAL _UNBIND_PORTS configuration option, which was deprecated in Intel® DPDK 1.4.x, has been removed in Intel® DPDK 1.6.x.
Applications using the Intel® DPDK must be explicitly unbound to the igb_uio driver using the dpdk_nic_bind.py script included in the
Intel® DPDK release and documented in the *Intel® DPDK Getting Started Guide*.
Intel® DPDK 1.4 to Intel® DPDK 1.5
----------------------------------
Note the following difference between 1.4 and 1.5:
* Starting with version 1.5, the top-level directory created from unzipping the release package will now contain the release version number,
that is, DPDK-1.5.2/ rather than just DPDK/ .
Intel® DPDK 1.3 to Intel® DPDK 1.4.x
------------------------------------
Note the following difference between releases 1.3 and 1.4.x:
* In Release 1.4.x, Intel® DPDK applications will no longer unbind the network ports from the Linux* kernel driver when the application initializes.
Instead, any ports to be used by Intel® DPDK must be unbound from the Linux driver and bound to the igb_uio driver before the application starts.
This can be done using the pci_unbind.py script included with the Intel® DPDK release and documented in the *Intel® DPDK Getting Started Guide*.
If the port unbinding behavior present in previous Intel® DPDK releases is required, this can be re-enabled using the CONFIG_RTE_EAL_UNBIND_PORTS
setting in the appropriate Intel® DPDK compile-time configuration file.
* In Release 1.4.x, HPET support is disabled in the Intel® DPDK build configuration files, which means that the existing rte_eal_get_hpet_hz() and
rte_eal_get_hpet_cycles() APIs are not available by default.
For applications that require timing APIs, but not the HPET timer specifically, it is recommended that the API calls rte_get_timer_cycles()
and rte_get_timer_hz() be used instead of the HPET-specific APIs.
These generic APIs can work with either TSC or HPET time sources, depending on what is requested by an application,
and on what is available on the system at runtime.
For more details on this and how to re-enable the HPET if it is needed, please consult the *Intel® DPDK Getting Started Guide*.
Intel® DPDK 1.2 to Intel® DPDK 1.3
----------------------------------
Note the following difference between releases 1.2 and 1.3:
* In release 1.3, the Intel® DPDK supports two different 1 GBe drivers: igb and em.
Both of them are located in the same library: lib_pmd_e1000.a.
Therefore, the name of the library to link with for the igb PMD has changed from librte_pmd_igb.a to librte_pmd_e1000.a.
* The rte_common.h macros, RTE_ALIGN, RTE_ALIGN_FLOOR and RTE_ALIGN_CEIL were renamed to, RTE_PTR_ALIGN, RTE_PTR_ALIGN_FLOOR
and RTE_PTR_ALIGN_CEIL.
The original macros are still available but they have different behavior.
Not updating the macros results in strange compilation errors.
* The rte_tailq is now defined statically. The rte_tailq APIs have also been changed from being public to internal use only.
The old public APIs are maintained for backward compatibility reasons. Details can be found in the *Intel® DPDK API Reference*.
* The method for managing mbufs on the NIC RX rings has been modified to improve performance.
To allow applications to use the newer, more optimized, code path,
it is recommended that the rx_free_thresh field in the rte_eth_conf structure,
which is passed to the Poll Mode Driver when initializing a network port, be set to a value of 32.
Intel® DPDK 1.1 to Intel® DPDK 1.2
----------------------------------
Note the following difference between release 1.1 and release 1.2:
* The names of the 1G and 10G Ethernet drivers have changed between releases 1.1 and 1.2. While the old driver names still work,
it is recommended that code be updated to the new names, since the old names are deprecated and may be removed in a future
release.
The items affected are as follows:
* Any macros referring to RTE_LIBRTE_82576_PMD should be updated to refer to RTE_LIBRTE_IGB_PMD.
* Any macros referring to RTE_LIBRTE_82599_PMD should be updated to refer to RTE_LIBRTE_IXGBE_PMD.
* Any calls to the rte_82576_pmd_init() function should be replaced by calls to rte_igb_pmd_init().
* Any calls to the rte_82599_pmd_init() function should be replaced by calls to rte_ixgbe_pmd_init().
* The method used for managing mbufs on the NIC TX rings for the 10 GbE driver has been modified to improve performance.
As a result, different parameter values should be passed to the rte_eth_tx_queue_setup() function.
The recommended default values are to have tx_thresh.tx_wt hresh, tx_free_thresh,
as well as the new parameter tx_rs_thresh (all in the struct rte_eth_txconf datatype) set to zero.
See the "Configuration of Transmit and Receive Queues" section in the *Intel® DPDK Programmer's Guide* for more details.
.. note::
If the tx_free_thresh field is set to TX_RING_SIZE+1 , as was previously used in some cases to disable free threshold check,
then an error is generated at port initialization time.
To avoid this error, configure the TX threshold values as suggested above.