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net/cnxk: add multi-segment Rx for CN10K

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Add Rx burst multi-segment version for CN10K.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
This commit is contained in:
Nithin Dabilpuram 2021-06-23 10:16:26 +05:30 committed by Jerin Jacob
parent f742a9a668
commit 706eeae607
8 changed files with 99 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
doc/guides/nics/cnxk.rst
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@ -17,11 +17,13 @@ Features
Features of the CNXK Ethdev PMD are:
- Packet type information
- Jumbo frames
- SR-IOV VF
- Lock-free Tx queue
- Multiple queues for TX and RX
- Receiver Side Scaling (RSS)
- Link state information
- Scatter-Gather IO support
Prerequisites
-------------

2
doc/guides/nics/features/cnxk.ini
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@ -15,6 +15,8 @@ Runtime Tx queue setup = Y
Queue start/stop = Y
RSS hash = Y
Inner RSS = Y
Jumbo frame = Y
Scattered Rx = Y
Packet type parsing = Y
Linux = Y
ARMv8 = Y

1
doc/guides/nics/features/cnxk_vec.ini
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@ -15,6 +15,7 @@ Runtime Tx queue setup = Y
Queue start/stop = Y
RSS hash = Y
Inner RSS = Y
Jumbo frame = Y
Packet type parsing = Y
Linux = Y
ARMv8 = Y

2
doc/guides/nics/features/cnxk_vf.ini
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@ -14,6 +14,8 @@ Runtime Tx queue setup = Y
Queue start/stop = Y
RSS hash = Y
Inner RSS = Y
Jumbo frame = Y
Scattered Rx = Y
Packet type parsing = Y
Linux = Y
ARMv8 = Y

20
drivers/net/cnxk/cn10k_rx.c
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@ -10,7 +10,7 @@
void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts) \
{ \
return cn10k_nix_recv_pkts(rx_queue, rx_pkts, pkts, (flags)); \
}
} \
NIX_RX_FASTPATH_MODES
#undef R
@ -32,6 +32,8 @@ pick_rx_func(struct rte_eth_dev *eth_dev,
void
cn10k_eth_set_rx_function(struct rte_eth_dev *eth_dev)
{
struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
const eth_rx_burst_t nix_eth_rx_burst[2][2][2][2] = {
#define R(name, f3, f2, f1, f0, flags) \
[f3][f2][f1][f0] = cn10k_nix_recv_pkts_##name,
@ -40,6 +42,22 @@ cn10k_eth_set_rx_function(struct rte_eth_dev *eth_dev)
#undef R
};
const eth_rx_burst_t nix_eth_rx_burst_mseg[2][2][2][2] = {
#define R(name, f3, f2, f1, f0, flags) \
[f3][f2][f1][f0] = cn10k_nix_recv_pkts_mseg_##name,
NIX_RX_FASTPATH_MODES
#undef R
};
pick_rx_func(eth_dev, nix_eth_rx_burst);
if (dev->rx_offloads & DEV_RX_OFFLOAD_SCATTER)
pick_rx_func(eth_dev, nix_eth_rx_burst_mseg);
/* Copy multi seg version with no offload for tear down sequence */
if (rte_eal_process_type() == RTE_PROC_PRIMARY)
dev->rx_pkt_burst_no_offload =
nix_eth_rx_burst_mseg[0][0][0][0];
rte_mb();
}

57
drivers/net/cnxk/cn10k_rx.h
View File

@ -102,6 +102,52 @@ nix_update_match_id(const uint16_t match_id, uint64_t ol_flags,
return ol_flags;
}
static __rte_always_inline void
nix_cqe_xtract_mseg(const union nix_rx_parse_u *rx, struct rte_mbuf *mbuf,
uint64_t rearm)
{
const rte_iova_t *iova_list;
struct rte_mbuf *head;
const rte_iova_t *eol;
uint8_t nb_segs;
uint64_t sg;
sg = *(const uint64_t *)(rx + 1);
nb_segs = (sg >> 48) & 0x3;
mbuf->nb_segs = nb_segs;
mbuf->data_len = sg & 0xFFFF;
sg = sg >> 16;
eol = ((const rte_iova_t *)(rx + 1) + ((rx->desc_sizem1 + 1) << 1));
/* Skip SG_S and first IOVA*/
iova_list = ((const rte_iova_t *)(rx + 1)) + 2;
nb_segs--;
rearm = rearm & ~0xFFFF;
head = mbuf;
while (nb_segs) {
mbuf->next = ((struct rte_mbuf *)*iova_list) - 1;
mbuf = mbuf->next;
__mempool_check_cookies(mbuf->pool, (void **)&mbuf, 1, 1);
mbuf->data_len = sg & 0xFFFF;
sg = sg >> 16;
*(uint64_t *)(&mbuf->rearm_data) = rearm;
nb_segs--;
iova_list++;
if (!nb_segs && (iova_list + 1 < eol)) {
sg = *(const uint64_t *)(iova_list);
nb_segs = (sg >> 48) & 0x3;
head->nb_segs += nb_segs;
iova_list = (const rte_iova_t *)(iova_list + 1);
}
}
mbuf->next = NULL;
}
static __rte_always_inline void
cn10k_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, const uint32_t tag,
struct rte_mbuf *mbuf, const void *lookup_mem,
@ -136,8 +182,12 @@ cn10k_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, const uint32_t tag,
*(uint64_t *)(&mbuf->rearm_data) = val;
mbuf->pkt_len = len;
mbuf->data_len = len;
mbuf->next = NULL;
if (flag & NIX_RX_MULTI_SEG_F) {
nix_cqe_xtract_mseg(rx, mbuf, val);
} else {
mbuf->data_len = len;
mbuf->next = NULL;
}
}
static inline uint16_t
@ -239,6 +289,9 @@ R(mark_cksum_ptype_rss, 1, 1, 1, 1, MARK_F | CKSUM_F | PTYPE_F | RSS_F)
#define R(name, f3, f2, f1, f0, flags) \
uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_##name( \
void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
\
uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_mseg_##name( \
void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts);
NIX_RX_FASTPATH_MODES

17
drivers/net/cnxk/cn10k_rx_mseg.c Normal file
View File

@ -0,0 +1,17 @@
/* SPDX-License-Identifier: BSD-3-Clause
* Copyright(C) 2021 Marvell.
*/
#include "cn10k_ethdev.h"
#include "cn10k_rx.h"
#define R(name, f3, f2, f1, f0, flags) \
uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_mseg_##name( \
void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts) \
{ \
return cn10k_nix_recv_pkts(rx_queue, rx_pkts, pkts, \
(flags) | NIX_RX_MULTI_SEG_F); \
}
NIX_RX_FASTPATH_MODES
#undef R

1
drivers/net/cnxk/meson.build
View File

@ -30,6 +30,7 @@ sources += files(
sources += files(
'cn10k_ethdev.c',
'cn10k_rx.c',
'cn10k_rx_mseg.c',
)
deps += ['bus_pci', 'cryptodev', 'eventdev', 'security']