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net/mlx5: support TSO offload on Windows

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Support of the TSO offloading by checking
the relevant FW capability for NIC support.

Supported offloads:

DEV_TX_OFFLOAD_TCP_TSO
DEV_TX_OFFLOAD_VXLAN_TNL_TSO
DEV_TX_OFFLOAD_GRE_TNL_TSO
DEV_TX_OFFLOAD_GENEVE_TNL_TSO

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Tested-by: Idan Hackmon <idanhac@nvidia.com>
This commit is contained in:
Tal Shnaiderman 2021-10-12 15:45:49 +03:00 committed by Raslan Darawsheh
parent d338df9969
commit 738da9a867
2 changed files with 3 additions and 0 deletions
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1
doc/guides/rel_notes/release_21_11.rst
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@ -123,6 +123,7 @@ New Features
Updated the Mellanox mlx5 driver with new features and improvements, including:
* Added implicit mempool registration to avoid data path hiccups (opt-out).
* Added NIC offloads for the PMD on Windows (TSO).
* **Updated Solarflare network PMD.**

2
drivers/net/mlx5/windows/mlx5_os.c
View File

@ -165,6 +165,7 @@ mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
device_attr->max_pd = 1 << hca_attr.log_max_pd;
device_attr->max_srq = 1 << hca_attr.log_max_srq;
device_attr->max_srq_wr = 1 << hca_attr.log_max_srq_sz;
device_attr->max_tso = 1 << hca_attr.max_lso_cap;
if (hca_attr.rss_ind_tbl_cap) {
device_attr->max_rwq_indirection_table_size =
1 << hca_attr.rss_ind_tbl_cap;
@ -494,6 +495,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
config->hw_padding = 0;
}
config->tso = (sh->device_attr.max_tso > 0);
if (config->tso)
config->tso_max_payload_sz = sh->device_attr.max_tso;
DRV_LOG(DEBUG, "%sMPS is %s.",