net/i40e/base: remove HMC admin queue functions
Host Memory Cache(HMC) admin queue APIs were removed from the latest datasheet, and hence remove its implementation. Signed-off-by: Helin Zhang <helin.zhang@intel.com> Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
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@ -683,10 +683,6 @@ enum i40e_status_code i40e_init_adminq(struct i40e_hw *hw)
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hw->aq.nvm_release_on_done = false;
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hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
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ret_code = i40e_aq_set_hmc_resource_profile(hw,
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I40E_HMC_PROFILE_DEFAULT,
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0,
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NULL);
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#endif /* PF_DRIVER */
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ret_code = I40E_SUCCESS;
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@ -224,10 +224,6 @@ enum i40e_admin_queue_opc {
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i40e_aqc_opc_resume_port_tx = 0x041C,
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i40e_aqc_opc_configure_partition_bw = 0x041D,
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/* hmc */
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i40e_aqc_opc_query_hmc_resource_profile = 0x0500,
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i40e_aqc_opc_set_hmc_resource_profile = 0x0501,
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/* phy commands*/
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i40e_aqc_opc_get_phy_abilities = 0x0600,
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i40e_aqc_opc_set_phy_config = 0x0601,
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@ -1646,27 +1642,6 @@ struct i40e_aqc_configure_partition_bw_data {
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I40E_CHECK_STRUCT_LEN(0x22, i40e_aqc_configure_partition_bw_data);
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/* Get and set the active HMC resource profile and status.
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* (direct 0x0500) and (direct 0x0501)
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*/
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struct i40e_aq_get_set_hmc_resource_profile {
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u8 pm_profile;
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u8 pe_vf_enabled;
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u8 reserved[14];
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};
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I40E_CHECK_CMD_LENGTH(i40e_aq_get_set_hmc_resource_profile);
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enum i40e_aq_hmc_profile {
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/* I40E_HMC_PROFILE_NO_CHANGE = 0, reserved */
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I40E_HMC_PROFILE_DEFAULT = 1,
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I40E_HMC_PROFILE_FAVOR_VF = 2,
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I40E_HMC_PROFILE_EQUAL = 3,
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};
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#define I40E_AQ_GET_HMC_RESOURCE_PROFILE_PM_MASK 0xF
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#define I40E_AQ_GET_HMC_RESOURCE_PROFILE_COUNT_MASK 0x3F
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/* Get PHY Abilities (indirect 0x0600) uses the generic indirect struct */
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/* set in param0 for get phy abilities to report qualified modules */
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@ -3239,67 +3239,6 @@ enum i40e_status_code i40e_aq_debug_write_register(struct i40e_hw *hw,
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return status;
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}
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/**
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* i40e_aq_get_hmc_resource_profile
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* @hw: pointer to the hw struct
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* @profile: type of profile the HMC is to be set as
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* @pe_vf_enabled_count: the number of PE enabled VFs the system has
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* @cmd_details: pointer to command details structure or NULL
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*
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* query the HMC profile of the device.
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**/
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enum i40e_status_code i40e_aq_get_hmc_resource_profile(struct i40e_hw *hw,
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enum i40e_aq_hmc_profile *profile,
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u8 *pe_vf_enabled_count,
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struct i40e_asq_cmd_details *cmd_details)
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{
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struct i40e_aq_desc desc;
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struct i40e_aq_get_set_hmc_resource_profile *resp =
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(struct i40e_aq_get_set_hmc_resource_profile *)&desc.params.raw;
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enum i40e_status_code status;
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i40e_fill_default_direct_cmd_desc(&desc,
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i40e_aqc_opc_query_hmc_resource_profile);
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status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
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*profile = (enum i40e_aq_hmc_profile)(resp->pm_profile &
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I40E_AQ_GET_HMC_RESOURCE_PROFILE_PM_MASK);
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*pe_vf_enabled_count = resp->pe_vf_enabled &
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I40E_AQ_GET_HMC_RESOURCE_PROFILE_COUNT_MASK;
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return status;
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}
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/**
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* i40e_aq_set_hmc_resource_profile
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* @hw: pointer to the hw struct
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* @profile: type of profile the HMC is to be set as
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* @pe_vf_enabled_count: the number of PE enabled VFs the system has
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* @cmd_details: pointer to command details structure or NULL
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*
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* set the HMC profile of the device.
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**/
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enum i40e_status_code i40e_aq_set_hmc_resource_profile(struct i40e_hw *hw,
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enum i40e_aq_hmc_profile profile,
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u8 pe_vf_enabled_count,
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struct i40e_asq_cmd_details *cmd_details)
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{
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struct i40e_aq_desc desc;
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struct i40e_aq_get_set_hmc_resource_profile *cmd =
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(struct i40e_aq_get_set_hmc_resource_profile *)&desc.params.raw;
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enum i40e_status_code status;
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i40e_fill_default_direct_cmd_desc(&desc,
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i40e_aqc_opc_set_hmc_resource_profile);
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cmd->pm_profile = (u8)profile;
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cmd->pe_vf_enabled = pe_vf_enabled_count;
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status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
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return status;
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}
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/**
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* i40e_aq_request_resource
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* @hw: pointer to the hw struct
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@ -345,10 +345,6 @@ enum i40e_status_code i40e_aq_config_vsi_bw_limit(struct i40e_hw *hw,
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enum i40e_status_code i40e_aq_dcb_ignore_pfc(struct i40e_hw *hw,
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u8 tcmap, bool request, u8 *tcmap_ret,
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struct i40e_asq_cmd_details *cmd_details);
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enum i40e_status_code i40e_aq_get_hmc_resource_profile(struct i40e_hw *hw,
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enum i40e_aq_hmc_profile *profile,
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u8 *pe_vf_enabled_count,
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struct i40e_asq_cmd_details *cmd_details);
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enum i40e_status_code i40e_aq_config_switch_comp_ets_bw_limit(
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struct i40e_hw *hw, u16 seid,
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struct i40e_aqc_configure_switching_comp_ets_bw_limit_data *bw_data,
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@ -359,10 +355,6 @@ enum i40e_status_code i40e_aq_config_vsi_ets_sla_bw_limit(struct i40e_hw *hw,
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struct i40e_asq_cmd_details *cmd_details);
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enum i40e_status_code i40e_aq_dcb_updated(struct i40e_hw *hw,
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struct i40e_asq_cmd_details *cmd_details);
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enum i40e_status_code i40e_aq_set_hmc_resource_profile(struct i40e_hw *hw,
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enum i40e_aq_hmc_profile profile,
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u8 pe_vf_enabled_count,
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struct i40e_asq_cmd_details *cmd_details);
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enum i40e_status_code i40e_aq_config_switch_comp_bw_limit(struct i40e_hw *hw,
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u16 seid, u16 credit, u8 max_bw,
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struct i40e_asq_cmd_details *cmd_details);
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