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drivers/crypto: update inline desc for sharing mode

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SEC HW descriptor sharing mode can now be controlled
during Session preparation by the respective drivers

shared descriptors in case of non-protocol offload does not need
any sync between the subsequent jobs. Thus, changing it to
SHR_NEVER from SHR_SERIAL for cipher_only, auth_only, and gcm.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
This commit is contained in:
Akhil Goyal 2019-03-27 11:53:33 +00:00
parent a5e05ab643
commit 7449390bb8
5 changed files with 37 additions and 25 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
drivers/crypto/caam_jr/caam_jr.c
View File

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
* Copyright 2017-2018 NXP
* Copyright 2017-2019 NXP
*/
#include <fcntl.h>
@ -346,7 +346,7 @@ caam_jr_prep_cdb(struct caam_jr_session *ses)
shared_desc_len = cnstr_shdsc_blkcipher(
cdb->sh_desc, true,
swap, &alginfo_c,
swap, SHR_NEVER, &alginfo_c,
NULL,
ses->iv.length,
ses->dir);
@ -364,7 +364,7 @@ caam_jr_prep_cdb(struct caam_jr_session *ses)
alginfo_a.key_type = RTA_DATA_IMM;
shared_desc_len = cnstr_shdsc_hmac(cdb->sh_desc, true,
swap, &alginfo_a,
swap, SHR_NEVER, &alginfo_a,
!ses->dir,
ses->digest_length);
} else if (is_aead(ses)) {
@ -382,13 +382,13 @@ caam_jr_prep_cdb(struct caam_jr_session *ses)
if (ses->dir == DIR_ENC)
shared_desc_len = cnstr_shdsc_gcm_encap(
cdb->sh_desc, true, swap,
&alginfo,
SHR_NEVER, &alginfo,
ses->iv.length,
ses->digest_length);
else
shared_desc_len = cnstr_shdsc_gcm_decap(
cdb->sh_desc, true, swap,
&alginfo,
SHR_NEVER, &alginfo,
ses->iv.length,
ses->digest_length);
} else {
@ -465,7 +465,8 @@ caam_jr_prep_cdb(struct caam_jr_session *ses)
* overwritten in fd for each packet.
*/
shared_desc_len = cnstr_shdsc_authenc(cdb->sh_desc,
true, swap, &alginfo_c, &alginfo_a,
true, swap, SHR_SERIAL,
&alginfo_c, &alginfo_a,
ses->iv.length, 0,
ses->digest_length, ses->dir);
}

11
drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
View File

@ -1672,7 +1672,7 @@ dpaa2_sec_cipher_init(struct rte_cryptodev *dev,
session->dir = (xform->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
DIR_ENC : DIR_DEC;
bufsize = cnstr_shdsc_blkcipher(priv->flc_desc[0].desc, 1, 0,
bufsize = cnstr_shdsc_blkcipher(priv->flc_desc[0].desc, 1, 0, SHR_NEVER,
&cipherdata, NULL, session->iv.length,
session->dir);
if (bufsize < 0) {
@ -1804,7 +1804,7 @@ dpaa2_sec_auth_init(struct rte_cryptodev *dev,
DIR_ENC : DIR_DEC;
bufsize = cnstr_shdsc_hmac(priv->flc_desc[DESC_INITFINAL].desc,
1, 0, &authdata, !session->dir,
1, 0, SHR_NEVER, &authdata, !session->dir,
session->digest_length);
if (bufsize < 0) {
DPAA2_SEC_ERR("Crypto: Invalid buffer length");
@ -1923,12 +1923,12 @@ dpaa2_sec_aead_init(struct rte_cryptodev *dev,
if (session->dir == DIR_ENC)
bufsize = cnstr_shdsc_gcm_encap(
priv->flc_desc[0].desc, 1, 0,
priv->flc_desc[0].desc, 1, 0, SHR_NEVER,
&aeaddata, session->iv.length,
session->digest_length);
else
bufsize = cnstr_shdsc_gcm_decap(
priv->flc_desc[0].desc, 1, 0,
priv->flc_desc[0].desc, 1, 0, SHR_NEVER,
&aeaddata, session->iv.length,
session->digest_length);
if (bufsize < 0) {
@ -2152,7 +2152,8 @@ dpaa2_sec_aead_chain_init(struct rte_cryptodev *dev,
if (session->ctxt_type == DPAA2_SEC_CIPHER_HASH) {
bufsize = cnstr_shdsc_authenc(priv->flc_desc[0].desc, 1,
0, &cipherdata, &authdata,
0, SHR_SERIAL,
&cipherdata, &authdata,
session->iv.length,
ctxt->auth_only_len,
session->digest_length,

18
drivers/crypto/dpaa2_sec/hw/desc/algo.h
View File

@ -1,7 +1,7 @@
/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
*
* Copyright 2008-2016 Freescale Semiconductor Inc.
* Copyright 2016 NXP
* Copyright 2016,2019 NXP
*
*/
@ -125,6 +125,7 @@ cnstr_shdsc_snow_f9(uint32_t *descbuf, bool ps, bool swap,
* @descbuf: pointer to descriptor-under-construction buffer
* @ps: if 36/40bit addressing is desired, this parameter must be true
* @swap: must be true when core endianness doesn't match SEC endianness
* @share: sharing type of shared descriptor
* @cipherdata: pointer to block cipher transform definitions
* Valid algorithm values one of OP_ALG_ALGSEL_* {DES, 3DES, AES}
* Valid modes for:
@ -138,6 +139,7 @@ cnstr_shdsc_snow_f9(uint32_t *descbuf, bool ps, bool swap,
*/
static inline int
cnstr_shdsc_blkcipher(uint32_t *descbuf, bool ps, bool swap,
enum rta_share_type share,
struct alginfo *cipherdata, uint8_t *iv,
uint32_t ivlen, uint8_t dir)
{
@ -157,7 +159,7 @@ cnstr_shdsc_blkcipher(uint32_t *descbuf, bool ps, bool swap,
PROGRAM_SET_BSWAP(p);
if (ps)
PROGRAM_SET_36BIT_ADDR(p);
SHR_HDR(p, SHR_SERIAL, 1, SC);
SHR_HDR(p, share, 1, SC);
pkeyjmp = JUMP(p, keyjmp, LOCAL_JUMP, ALL_TRUE, SHRD);
/* Insert Key */
@ -211,6 +213,7 @@ cnstr_shdsc_blkcipher(uint32_t *descbuf, bool ps, bool swap,
* @descbuf: pointer to descriptor-under-construction buffer
* @ps: if 36/40bit addressing is desired, this parameter must be true
* @swap: must be true when core endianness doesn't match SEC endianness
* @share: sharing type of shared descriptor
* @authdata: pointer to authentication transform definitions;
* message digest algorithm: OP_ALG_ALGSEL_MD5/ SHA1-512.
* @do_icv: 0 if ICV checking is not desired, any other value if ICV checking
@ -225,6 +228,7 @@ cnstr_shdsc_blkcipher(uint32_t *descbuf, bool ps, bool swap,
*/
static inline int
cnstr_shdsc_hmac(uint32_t *descbuf, bool ps, bool swap,
enum rta_share_type share,
struct alginfo *authdata, uint8_t do_icv,
uint8_t trunc_len)
{
@ -270,7 +274,7 @@ cnstr_shdsc_hmac(uint32_t *descbuf, bool ps, bool swap,
PROGRAM_SET_BSWAP(p);
if (ps)
PROGRAM_SET_36BIT_ADDR(p);
SHR_HDR(p, SHR_SERIAL, 1, SC);
SHR_HDR(p, share, 1, SC);
pkeyjmp = JUMP(p, keyjmp, LOCAL_JUMP, ALL_TRUE, SHRD);
KEY(p, KEY2, authdata->key_enc_flags, authdata->key, authdata->keylen,
@ -443,6 +447,7 @@ cnstr_shdsc_crc(uint32_t *descbuf, bool swap)
* @descbuf: pointer to descriptor-under-construction buffer
* @ps: if 36/40bit addressing is desired, this parameter must be true
* @swap: must be true when core endianness doesn't match SEC endianness
* @share: sharing type of shared descriptor
* @cipherdata: pointer to block cipher transform definitions
* Valid algorithm values - OP_ALG_ALGSEL_AES ANDed with
* OP_ALG_AAI_GCM.
@ -453,6 +458,7 @@ cnstr_shdsc_crc(uint32_t *descbuf, bool swap)
*/
static inline int
cnstr_shdsc_gcm_encap(uint32_t *descbuf, bool ps, bool swap,
enum rta_share_type share,
struct alginfo *cipherdata,
uint32_t ivlen, uint32_t icvsize)
{
@ -475,7 +481,7 @@ cnstr_shdsc_gcm_encap(uint32_t *descbuf, bool ps, bool swap,
if (ps)
PROGRAM_SET_36BIT_ADDR(p);
SHR_HDR(p, SHR_SERIAL, 1, SC);
SHR_HDR(p, share, 1, SC);
pkeyjmp = JUMP(p, keyjmp, LOCAL_JUMP, ALL_TRUE, SELF | SHRD);
/* Insert Key */
@ -556,6 +562,7 @@ cnstr_shdsc_gcm_encap(uint32_t *descbuf, bool ps, bool swap,
* @descbuf: pointer to descriptor-under-construction buffer
* @ps: if 36/40bit addressing is desired, this parameter must be true
* @swap: must be true when core endianness doesn't match SEC endianness
* @share: sharing type of shared descriptor
* @cipherdata: pointer to block cipher transform definitions
* Valid algorithm values - OP_ALG_ALGSEL_AES ANDed with
* OP_ALG_AAI_GCM.
@ -565,6 +572,7 @@ cnstr_shdsc_gcm_encap(uint32_t *descbuf, bool ps, bool swap,
*/
static inline int
cnstr_shdsc_gcm_decap(uint32_t *descbuf, bool ps, bool swap,
enum rta_share_type share,
struct alginfo *cipherdata,
uint32_t ivlen, uint32_t icvsize)
{
@ -585,7 +593,7 @@ cnstr_shdsc_gcm_decap(uint32_t *descbuf, bool ps, bool swap,
if (ps)
PROGRAM_SET_36BIT_ADDR(p);
SHR_HDR(p, SHR_SERIAL, 1, SC);
SHR_HDR(p, share, 1, SC);
pkeyjmp = JUMP(p, keyjmp, LOCAL_JUMP, ALL_TRUE, SELF | SHRD);
/* Insert Key */

6
drivers/crypto/dpaa2_sec/hw/desc/ipsec.h
View File

@ -1,7 +1,7 @@
/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
*
* Copyright 2008-2016 Freescale Semiconductor Inc.
* Copyright 2016 NXP
* Copyright 2016,2019 NXP
*
*/
@ -1397,6 +1397,7 @@ cnstr_shdsc_ipsec_new_decap(uint32_t *descbuf, bool ps,
* @descbuf: pointer to buffer used for descriptor construction
* @ps: if 36/40bit addressing is desired, this parameter must be true
* @swap: if true, perform descriptor byte swapping on a 4-byte boundary
* @share: sharing type of shared descriptor
* @cipherdata: pointer to block cipher transform definitions.
* Valid algorithm values one of OP_ALG_ALGSEL_* {DES, 3DES, AES}
* Valid modes for:
@ -1461,6 +1462,7 @@ cnstr_shdsc_ipsec_new_decap(uint32_t *descbuf, bool ps,
*/
static inline int
cnstr_shdsc_authenc(uint32_t *descbuf, bool ps, bool swap,
enum rta_share_type share,
struct alginfo *cipherdata,
struct alginfo *authdata,
uint16_t ivlen, uint16_t auth_only_len,
@ -1496,7 +1498,7 @@ cnstr_shdsc_authenc(uint32_t *descbuf, bool ps, bool swap,
trunc_len = trunc_len && (trunc_len < authdata->keylen) ?
trunc_len : (uint8_t)authdata->keylen;
SHR_HDR(p, SHR_SERIAL, 1, SC);
SHR_HDR(p, share, 1, SC);
/*
* M0 will contain the value provided by the user when creating

10
drivers/crypto/dpaa_sec/dpaa_sec.c
View File

@ -643,7 +643,7 @@ dpaa_sec_prep_cdb(dpaa_sec_session *ses)
shared_desc_len = cnstr_shdsc_blkcipher(
cdb->sh_desc, true,
swap, &alginfo_c,
swap, SHR_NEVER, &alginfo_c,
NULL,
ses->iv.length,
ses->dir);
@ -660,7 +660,7 @@ dpaa_sec_prep_cdb(dpaa_sec_session *ses)
alginfo_a.key_type = RTA_DATA_IMM;
shared_desc_len = cnstr_shdsc_hmac(cdb->sh_desc, true,
swap, &alginfo_a,
swap, SHR_NEVER, &alginfo_a,
!ses->dir,
ses->digest_length);
} else if (is_aead(ses)) {
@ -676,13 +676,13 @@ dpaa_sec_prep_cdb(dpaa_sec_session *ses)
if (ses->dir == DIR_ENC)
shared_desc_len = cnstr_shdsc_gcm_encap(
cdb->sh_desc, true, swap,
cdb->sh_desc, true, swap, SHR_NEVER,
&alginfo,
ses->iv.length,
ses->digest_length);
else
shared_desc_len = cnstr_shdsc_gcm_decap(
cdb->sh_desc, true, swap,
cdb->sh_desc, true, swap, SHR_NEVER,
&alginfo,
ses->iv.length,
ses->digest_length);
@ -741,7 +741,7 @@ dpaa_sec_prep_cdb(dpaa_sec_session *ses)
* overwritten in fd for each packet.
*/
shared_desc_len = cnstr_shdsc_authenc(cdb->sh_desc,
true, swap, &alginfo_c, &alginfo_a,
true, swap, SHR_SERIAL, &alginfo_c, &alginfo_a,
ses->iv.length, 0,
ses->digest_length, ses->dir);
}