common/qat: add multi-process handling of capabilities
Move qat capabilities data into a memzone where it can be shared by primary and secondary processes. Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com> Acked-by: Fiona Trahe <fiona.trahe@intel.com>
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21792c4432
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7788dceccb
@ -667,8 +667,11 @@ qat_comp_dev_create(struct qat_pci_device *qat_pci_dev,
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.socket_id = qat_dev_instance->pci_dev->device.numa_node,
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};
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char name[RTE_COMPRESSDEV_NAME_MAX_LEN];
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char capa_memz_name[RTE_COMPRESSDEV_NAME_MAX_LEN];
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struct rte_compressdev *compressdev;
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struct qat_comp_dev_private *comp_dev;
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const struct rte_compressdev_capabilities *capabilities;
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uint64_t capa_size;
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snprintf(name, RTE_COMPRESSDEV_NAME_MAX_LEN, "%s_%s",
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qat_pci_dev->name, "comp");
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@ -699,6 +702,10 @@ qat_comp_dev_create(struct qat_pci_device *qat_pci_dev,
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if (rte_eal_process_type() != RTE_PROC_PRIMARY)
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return 0;
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snprintf(capa_memz_name, RTE_COMPRESSDEV_NAME_MAX_LEN,
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"QAT_COMP_CAPA_GEN_%d",
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qat_pci_dev->qat_dev_gen);
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comp_dev = compressdev->data->dev_private;
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comp_dev->qat_dev = qat_pci_dev;
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comp_dev->compressdev = compressdev;
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@ -707,15 +714,34 @@ qat_comp_dev_create(struct qat_pci_device *qat_pci_dev,
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case QAT_GEN1:
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case QAT_GEN2:
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case QAT_GEN3:
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comp_dev->qat_dev_capabilities = qat_comp_gen_capabilities;
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capabilities = qat_comp_gen_capabilities;
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capa_size = sizeof(qat_comp_gen_capabilities);
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break;
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default:
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capabilities = qat_comp_gen_capabilities;
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capa_size = sizeof(qat_comp_gen_capabilities);
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QAT_LOG(DEBUG,
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"QAT gen %d capabilities unknown, default to GEN1",
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qat_pci_dev->qat_dev_gen);
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break;
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}
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comp_dev->capa_mz = rte_memzone_reserve(capa_memz_name,
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capa_size,
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rte_socket_id(), 0);
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if (comp_dev->capa_mz == NULL) {
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QAT_LOG(DEBUG,
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"Error allocating memzone for capabilities, destroying PMD for %s",
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name);
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memset(&qat_dev_instance->comp_rte_dev, 0,
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sizeof(qat_dev_instance->comp_rte_dev));
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rte_compressdev_pmd_destroy(compressdev);
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return -EFAULT;
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}
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memcpy(comp_dev->capa_mz->addr, capabilities, capa_size);
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comp_dev->qat_dev_capabilities = comp_dev->capa_mz->addr;
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while (1) {
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if (qat_dev_cmd_param[i].name == NULL)
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break;
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@ -744,6 +770,9 @@ qat_comp_dev_destroy(struct qat_pci_device *qat_pci_dev)
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if (comp_dev == NULL)
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return 0;
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if (rte_eal_process_type() == RTE_PROC_PRIMARY)
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rte_memzone_free(qat_pci_dev->comp_dev->capa_mz);
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/* clean up any resources used by the device */
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qat_comp_dev_close(comp_dev->compressdev);
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@ -32,6 +32,8 @@ struct qat_comp_dev_private {
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/**< The device's pool for qat_comp_xforms */
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struct rte_mempool *streampool;
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/**< The device's pool for qat_comp_streams */
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const struct rte_memzone *capa_mz;
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/* Shared memzone for storing capabilities */
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uint16_t min_enq_burst_threshold;
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};
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@ -248,6 +248,7 @@ qat_asym_dev_create(struct qat_pci_device *qat_pci_dev,
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.private_data_size = sizeof(struct qat_asym_dev_private)
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};
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char name[RTE_CRYPTODEV_NAME_MAX_LEN];
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char capa_memz_name[RTE_CRYPTODEV_NAME_MAX_LEN];
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struct rte_cryptodev *cryptodev;
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struct qat_asym_dev_private *internals;
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@ -296,11 +297,35 @@ qat_asym_dev_create(struct qat_pci_device *qat_pci_dev,
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if (rte_eal_process_type() != RTE_PROC_PRIMARY)
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return 0;
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snprintf(capa_memz_name, RTE_CRYPTODEV_NAME_MAX_LEN,
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"QAT_ASYM_CAPA_GEN_%d",
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qat_pci_dev->qat_dev_gen);
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internals = cryptodev->data->dev_private;
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internals->qat_dev = qat_pci_dev;
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internals->asym_dev_id = cryptodev->data->dev_id;
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internals->qat_dev_capabilities = qat_gen1_asym_capabilities;
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internals->capa_mz = rte_memzone_lookup(capa_memz_name);
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if (internals->capa_mz == NULL) {
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internals->capa_mz = rte_memzone_reserve(capa_memz_name,
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sizeof(qat_gen1_asym_capabilities),
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rte_socket_id(), 0);
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}
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if (internals->capa_mz == NULL) {
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QAT_LOG(DEBUG,
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"Error allocating memzone for capabilities, destroying PMD for %s",
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name);
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rte_cryptodev_pmd_destroy(cryptodev);
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memset(&qat_dev_instance->asym_rte_dev, 0,
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sizeof(qat_dev_instance->asym_rte_dev));
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return -EFAULT;
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}
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memcpy(internals->capa_mz->addr, qat_gen1_asym_capabilities,
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sizeof(qat_gen1_asym_capabilities));
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internals->qat_dev_capabilities = internals->capa_mz->addr;
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while (1) {
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if (qat_dev_cmd_param[i].name == NULL)
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break;
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@ -325,6 +350,8 @@ qat_asym_dev_destroy(struct qat_pci_device *qat_pci_dev)
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return -ENODEV;
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if (qat_pci_dev->asym_dev == NULL)
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return 0;
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if (rte_eal_process_type() == RTE_PROC_PRIMARY)
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rte_memzone_free(qat_pci_dev->asym_dev->capa_mz);
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/* free crypto device */
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cryptodev = rte_cryptodev_pmd_get_dev(
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@ -26,6 +26,8 @@ struct qat_asym_dev_private {
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/**< Device instance for this rte_cryptodev */
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const struct rte_cryptodev_capabilities *qat_dev_capabilities;
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/* QAT device asymmetric crypto capabilities */
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const struct rte_memzone *capa_mz;
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/* Shared memzone for storing capabilities */
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uint16_t min_enq_burst_threshold;
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};
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@ -32,6 +32,12 @@ static const struct rte_cryptodev_capabilities qat_gen2_sym_capabilities[] = {
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RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
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};
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static const struct rte_cryptodev_capabilities qat_gen3_sym_capabilities[] = {
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QAT_BASE_GEN1_SYM_CAPABILITIES,
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QAT_EXTRA_GEN2_SYM_CAPABILITIES,
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RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
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};
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#ifdef RTE_LIBRTE_SECURITY
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static const struct rte_cryptodev_capabilities
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qat_security_sym_capabilities[] = {
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@ -314,8 +320,11 @@ qat_sym_dev_create(struct qat_pci_device *qat_pci_dev,
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.private_data_size = sizeof(struct qat_sym_dev_private)
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};
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char name[RTE_CRYPTODEV_NAME_MAX_LEN];
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char capa_memz_name[RTE_CRYPTODEV_NAME_MAX_LEN];
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struct rte_cryptodev *cryptodev;
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struct qat_sym_dev_private *internals;
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const struct rte_cryptodev_capabilities *capabilities;
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uint64_t capa_size;
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/*
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* All processes must use same driver id so they can share sessions.
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@ -377,6 +386,10 @@ qat_sym_dev_create(struct qat_pci_device *qat_pci_dev,
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if (rte_eal_process_type() != RTE_PROC_PRIMARY)
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return 0;
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snprintf(capa_memz_name, RTE_CRYPTODEV_NAME_MAX_LEN,
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"QAT_SYM_CAPA_GEN_%d",
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qat_pci_dev->qat_dev_gen);
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#ifdef RTE_LIBRTE_SECURITY
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security_instance = rte_malloc("qat_sec",
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sizeof(struct rte_security_ctx),
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@ -399,19 +412,46 @@ qat_sym_dev_create(struct qat_pci_device *qat_pci_dev,
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internals->sym_dev_id = cryptodev->data->dev_id;
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switch (qat_pci_dev->qat_dev_gen) {
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case QAT_GEN1:
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internals->qat_dev_capabilities = qat_gen1_sym_capabilities;
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capabilities = qat_gen1_sym_capabilities;
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capa_size = sizeof(qat_gen1_sym_capabilities);
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break;
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case QAT_GEN2:
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capabilities = qat_gen2_sym_capabilities;
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capa_size = sizeof(qat_gen2_sym_capabilities);
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break;
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case QAT_GEN3:
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internals->qat_dev_capabilities = qat_gen2_sym_capabilities;
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capabilities = qat_gen3_sym_capabilities;
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capa_size = sizeof(qat_gen3_sym_capabilities);
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break;
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default:
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QAT_LOG(DEBUG,
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"QAT gen %d capabilities unknown, default to GEN2",
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qat_pci_dev->qat_dev_gen);
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break;
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"QAT gen %d capabilities unknown",
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qat_pci_dev->qat_dev_gen);
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rte_cryptodev_pmd_destroy(cryptodev);
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memset(&qat_dev_instance->sym_rte_dev, 0,
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sizeof(qat_dev_instance->sym_rte_dev));
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return -(EINVAL);
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}
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internals->capa_mz = rte_memzone_lookup(capa_memz_name);
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if (internals->capa_mz == NULL) {
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internals->capa_mz = rte_memzone_reserve(capa_memz_name,
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capa_size,
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rte_socket_id(), 0);
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}
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if (internals->capa_mz == NULL) {
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QAT_LOG(DEBUG,
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"Error allocating memzone for capabilities, destroying PMD for %s",
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name);
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rte_cryptodev_pmd_destroy(cryptodev);
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memset(&qat_dev_instance->sym_rte_dev, 0,
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sizeof(qat_dev_instance->sym_rte_dev));
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return -EFAULT;
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}
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memcpy(internals->capa_mz->addr, capabilities, capa_size);
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internals->qat_dev_capabilities = internals->capa_mz->addr;
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while (1) {
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if (qat_dev_cmd_param[i].name == NULL)
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break;
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@ -437,6 +477,8 @@ qat_sym_dev_destroy(struct qat_pci_device *qat_pci_dev)
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return -ENODEV;
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if (qat_pci_dev->sym_dev == NULL)
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return 0;
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if (rte_eal_process_type() == RTE_PROC_PRIMARY)
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rte_memzone_free(qat_pci_dev->sym_dev->capa_mz);
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/* free crypto device */
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cryptodev = rte_cryptodev_pmd_get_dev(qat_pci_dev->sym_dev->sym_dev_id);
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@ -36,6 +36,8 @@ struct qat_sym_dev_private {
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/**< Device instance for this rte_cryptodev */
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const struct rte_cryptodev_capabilities *qat_dev_capabilities;
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/* QAT device symmetric crypto capabilities */
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const struct rte_memzone *capa_mz;
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/* Shared memzone for storing capabilities */
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uint16_t min_enq_burst_threshold;
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uint32_t internal_capabilities; /* see flags QAT_SYM_CAP_xxx */
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};
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