net/cxgbe: validate flows offloaded to HASH region
Fetch supported match items in HASH region. Ensure the mask is all set for all the supported match items to be offloaded to HASH region. Otherwise, offload them to LE-TCAM region. Signed-off-by: Shagun Agrawal <shaguna@chelsio.com> Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
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@ -156,6 +156,9 @@ struct tp_params {
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int vnic_shift;
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int port_shift;
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int protocol_shift;
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int ethertype_shift;
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u64 hash_filter_mask;
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};
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struct vpd_params {
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@ -5032,6 +5032,8 @@ int t4_init_tp_params(struct adapter *adap)
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adap->params.tp.port_shift = t4_filter_field_shift(adap, F_PORT);
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adap->params.tp.protocol_shift = t4_filter_field_shift(adap,
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F_PROTOCOL);
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adap->params.tp.ethertype_shift = t4_filter_field_shift(adap,
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F_ETHERTYPE);
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/*
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* If TP_INGRESS_CONFIG.VNID == 0, then TP_VLAN_PRI_MAP.VNIC_ID
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@ -5040,6 +5042,11 @@ int t4_init_tp_params(struct adapter *adap)
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if ((adap->params.tp.ingress_config & F_VNIC) == 0)
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adap->params.tp.vnic_shift = -1;
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v = t4_read_reg(adap, LE_3_DB_HASH_MASK_GEN_IPV4_T6_A);
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adap->params.tp.hash_filter_mask = v;
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v = t4_read_reg(adap, LE_4_DB_HASH_MASK_GEN_IPV4_T6_A);
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adap->params.tp.hash_filter_mask |= ((u64)v << 32);
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return 0;
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}
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@ -946,3 +946,6 @@
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#define F_HASHEN V_HASHEN(1U)
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#define A_LE_DB_TID_HASHBASE 0x19df8
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#define LE_3_DB_HASH_MASK_GEN_IPV4_T6_A 0x19eac
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#define LE_4_DB_HASH_MASK_GEN_IPV4_T6_A 0x19eb0
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@ -86,6 +86,7 @@ struct ch_filter_specification {
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* matching that doesn't exist as a (value, mask) tuple.
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*/
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uint32_t type:1; /* 0 => IPv4, 1 => IPv6 */
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uint32_t cap:1; /* 0 => LE-TCAM, 1 => Hash */
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/*
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* Packet dispatch information. Ingress packets which match the
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@ -48,6 +48,58 @@ cxgbe_validate_item(const struct rte_flow_item *i, struct rte_flow_error *e)
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return 0;
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}
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static void
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cxgbe_fill_filter_region(struct adapter *adap,
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struct ch_filter_specification *fs)
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{
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struct tp_params *tp = &adap->params.tp;
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u64 hash_filter_mask = tp->hash_filter_mask;
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u64 ntuple_mask = 0;
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fs->cap = 0;
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if (!is_hashfilter(adap))
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return;
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if (fs->type) {
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uint8_t biton[16] = {0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff};
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uint8_t bitoff[16] = {0};
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if (!memcmp(fs->val.lip, bitoff, sizeof(bitoff)) ||
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!memcmp(fs->val.fip, bitoff, sizeof(bitoff)) ||
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memcmp(fs->mask.lip, biton, sizeof(biton)) ||
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memcmp(fs->mask.fip, biton, sizeof(biton)))
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return;
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} else {
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uint32_t biton = 0xffffffff;
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uint32_t bitoff = 0x0U;
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if (!memcmp(fs->val.lip, &bitoff, sizeof(bitoff)) ||
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!memcmp(fs->val.fip, &bitoff, sizeof(bitoff)) ||
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memcmp(fs->mask.lip, &biton, sizeof(biton)) ||
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memcmp(fs->mask.fip, &biton, sizeof(biton)))
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return;
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}
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if (!fs->val.lport || fs->mask.lport != 0xffff)
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return;
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if (!fs->val.fport || fs->mask.fport != 0xffff)
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return;
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if (tp->protocol_shift >= 0)
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ntuple_mask |= (u64)fs->mask.proto << tp->protocol_shift;
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if (tp->ethertype_shift >= 0)
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ntuple_mask |= (u64)fs->mask.ethtype << tp->ethertype_shift;
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if (ntuple_mask != hash_filter_mask)
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return;
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fs->cap = 1; /* use hash region */
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}
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static int
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ch_rte_parsetype_udp(const void *dmask, const struct rte_flow_item *item,
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struct ch_filter_specification *fs,
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@ -222,6 +274,8 @@ cxgbe_validate_fidxonadd(struct ch_filter_specification *fs,
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static int
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cxgbe_verify_fidx(struct rte_flow *flow, unsigned int fidx, uint8_t del)
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{
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if (flow->fs.cap)
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return 0; /* Hash filters */
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return del ? cxgbe_validate_fidxondel(flow->f, fidx) :
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cxgbe_validate_fidxonadd(&flow->fs,
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ethdev2adap(flow->dev), fidx);
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@ -329,6 +383,7 @@ cxgbe_rtef_parse_items(struct rte_flow *flow,
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const struct rte_flow_item items[],
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struct rte_flow_error *e)
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{
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struct adapter *adap = ethdev2adap(flow->dev);
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const struct rte_flow_item *i;
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char repeat[ARRAY_SIZE(parseitem)] = {0};
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@ -369,6 +424,8 @@ cxgbe_rtef_parse_items(struct rte_flow *flow,
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}
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}
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cxgbe_fill_filter_region(adap, &flow->fs);
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return 0;
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}
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