net/mlx4: fix Rx packet type offloads
This patch improves Rx packet type offload report in case the device is a virtual function device. In these devices we observed that the L2 tunnel flag is set also for non-tunneled packets, this leads to a complete misinterpretation of the packet type being received. This issue occurs since the tunnel_mode is not set to 0x7 by the driver for virtual devices and therefore the value in the L2 tunnel flag is meaningless and should be ignored. Fixes: aee4a03fee4f ("net/mlx4: enhance Rx packet type offloads") Signed-off-by: Moti Haimovsky <motih@mellanox.com> Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
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@ -1029,6 +1029,16 @@ const uint32_t *
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mlx4_dev_supported_ptypes_get(struct rte_eth_dev *dev)
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{
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static const uint32_t ptypes[] = {
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/* refers to rxq_cq_to_pkt_type() */
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RTE_PTYPE_L2_ETHER,
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RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
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RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
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RTE_PTYPE_L4_FRAG,
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RTE_PTYPE_L4_TCP,
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RTE_PTYPE_L4_UDP,
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RTE_PTYPE_UNKNOWN
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};
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static const uint32_t ptypes_l2tun[] = {
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/* refers to rxq_cq_to_pkt_type() */
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RTE_PTYPE_L2_ETHER,
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RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
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@ -1040,8 +1050,13 @@ mlx4_dev_supported_ptypes_get(struct rte_eth_dev *dev)
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RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN,
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RTE_PTYPE_UNKNOWN
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};
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struct priv *priv = dev->data->dev_private;
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if (dev->rx_pkt_burst == mlx4_rx_burst)
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return ptypes;
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if (dev->rx_pkt_burst == mlx4_rx_burst) {
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if (priv->hw_csum_l2tun)
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return ptypes_l2tun;
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else
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return ptypes;
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}
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return NULL;
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}
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@ -750,6 +750,7 @@ mlx4_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
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dev->data->dev_conf.rxmode.hw_ip_checksum),
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.csum_l2tun = (priv->hw_csum_l2tun &&
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dev->data->dev_conf.rxmode.hw_ip_checksum),
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.l2tun_offload = priv->hw_csum_l2tun,
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.stats = {
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.idx = idx,
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},
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@ -751,7 +751,8 @@ mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
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* Packet type for struct rte_mbuf.
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*/
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static inline uint32_t
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rxq_cq_to_pkt_type(volatile struct mlx4_cqe *cqe)
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rxq_cq_to_pkt_type(volatile struct mlx4_cqe *cqe,
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uint32_t l2tun_offload)
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{
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uint8_t idx = 0;
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uint32_t pinfo = rte_be_to_cpu_32(cqe->vlan_my_qpn);
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@ -762,7 +763,7 @@ rxq_cq_to_pkt_type(volatile struct mlx4_cqe *cqe)
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* bit[7] - MLX4_CQE_L2_TUNNEL
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* bit[6] - MLX4_CQE_L2_TUNNEL_IPV4
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*/
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if (!(pinfo & MLX4_CQE_L2_VLAN_MASK) && (pinfo & MLX4_CQE_L2_TUNNEL))
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if (l2tun_offload && (pinfo & MLX4_CQE_L2_TUNNEL))
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idx |= ((pinfo & MLX4_CQE_L2_TUNNEL) >> 20) |
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((pinfo & MLX4_CQE_L2_TUNNEL_IPV4) >> 19);
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/*
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@ -960,7 +961,8 @@ mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
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}
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pkt = seg;
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/* Update packet information. */
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pkt->packet_type = rxq_cq_to_pkt_type(cqe);
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pkt->packet_type =
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rxq_cq_to_pkt_type(cqe, rxq->l2tun_offload);
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pkt->ol_flags = 0;
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pkt->pkt_len = len;
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if (rxq->csum | rxq->csum_l2tun) {
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@ -80,6 +80,7 @@ struct rxq {
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volatile uint32_t *rq_db; /**< RQ doorbell record. */
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uint32_t csum:1; /**< Enable checksum offloading. */
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uint32_t csum_l2tun:1; /**< Same for L2 tunnels. */
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uint32_t l2tun_offload:1; /**< L2 tunnel offload is enabled. */
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struct mlx4_cq mcq; /**< Info for directly manipulating the CQ. */
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struct mlx4_rxq_stats stats; /**< Rx queue counters. */
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unsigned int socket; /**< CPU socket ID for allocations. */
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