net/ngbe: add HW initialization
Initialize the hardware by resetting the hardware in base code. Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
This commit is contained in:
parent
f501a195bd
commit
78710873c2
@ -38,6 +38,19 @@ static inline s32 ngbe_rom_validate_checksum_dummy(struct ngbe_hw *TUP0,
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{
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return NGBE_ERR_OPS_DUMMY;
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}
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/* struct ngbe_mac_operations */
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static inline s32 ngbe_mac_init_hw_dummy(struct ngbe_hw *TUP0)
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{
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return NGBE_ERR_OPS_DUMMY;
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}
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static inline s32 ngbe_mac_reset_hw_dummy(struct ngbe_hw *TUP0)
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{
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return NGBE_ERR_OPS_DUMMY;
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}
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static inline s32 ngbe_mac_stop_hw_dummy(struct ngbe_hw *TUP0)
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{
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return NGBE_ERR_OPS_DUMMY;
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}
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static inline s32 ngbe_mac_acquire_swfw_sync_dummy(struct ngbe_hw *TUP0,
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u32 TUP1)
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{
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@ -47,13 +60,21 @@ static inline void ngbe_mac_release_swfw_sync_dummy(struct ngbe_hw *TUP0,
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u32 TUP1)
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{
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}
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static inline s32 ngbe_mac_init_thermal_ssth_dummy(struct ngbe_hw *TUP0)
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{
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return NGBE_ERR_OPS_DUMMY;
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}
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static inline void ngbe_init_ops_dummy(struct ngbe_hw *hw)
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{
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hw->bus.set_lan_id = ngbe_bus_set_lan_id_dummy;
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hw->rom.init_params = ngbe_rom_init_params_dummy;
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hw->rom.validate_checksum = ngbe_rom_validate_checksum_dummy;
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hw->mac.init_hw = ngbe_mac_init_hw_dummy;
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hw->mac.reset_hw = ngbe_mac_reset_hw_dummy;
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hw->mac.stop_hw = ngbe_mac_stop_hw_dummy;
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hw->mac.acquire_swfw_sync = ngbe_mac_acquire_swfw_sync_dummy;
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hw->mac.release_swfw_sync = ngbe_mac_release_swfw_sync_dummy;
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hw->mac.init_thermal_sensor_thresh = ngbe_mac_init_thermal_ssth_dummy;
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}
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#endif /* _NGBE_TYPE_DUMMY_H_ */
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@ -8,6 +8,133 @@
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#include "ngbe_mng.h"
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#include "ngbe_hw.h"
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/**
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* ngbe_init_hw - Generic hardware initialization
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* @hw: pointer to hardware structure
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*
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* Initialize the hardware by resetting the hardware, filling the bus info
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* structure and media type, clears all on chip counters, initializes receive
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* address registers, multicast table, VLAN filter table, calls routine to set
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* up link and flow control settings, and leaves transmit and receive units
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* disabled and uninitialized
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**/
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s32 ngbe_init_hw(struct ngbe_hw *hw)
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{
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s32 status;
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DEBUGFUNC("ngbe_init_hw");
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/* Reset the hardware */
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status = hw->mac.reset_hw(hw);
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if (status != 0)
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DEBUGOUT("Failed to initialize HW, STATUS = %d\n", status);
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return status;
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}
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static void
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ngbe_reset_misc_em(struct ngbe_hw *hw)
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{
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int i;
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wr32(hw, NGBE_ISBADDRL, hw->isb_dma & 0xFFFFFFFF);
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wr32(hw, NGBE_ISBADDRH, hw->isb_dma >> 32);
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/* receive packets that size > 2048 */
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wr32m(hw, NGBE_MACRXCFG,
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NGBE_MACRXCFG_JUMBO, NGBE_MACRXCFG_JUMBO);
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wr32m(hw, NGBE_FRMSZ, NGBE_FRMSZ_MAX_MASK,
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NGBE_FRMSZ_MAX(NGBE_FRAME_SIZE_DFT));
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/* clear counters on read */
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wr32m(hw, NGBE_MACCNTCTL,
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NGBE_MACCNTCTL_RC, NGBE_MACCNTCTL_RC);
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wr32m(hw, NGBE_RXFCCFG,
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NGBE_RXFCCFG_FC, NGBE_RXFCCFG_FC);
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wr32m(hw, NGBE_TXFCCFG,
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NGBE_TXFCCFG_FC, NGBE_TXFCCFG_FC);
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wr32m(hw, NGBE_MACRXFLT,
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NGBE_MACRXFLT_PROMISC, NGBE_MACRXFLT_PROMISC);
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wr32m(hw, NGBE_RSTSTAT,
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NGBE_RSTSTAT_TMRINIT_MASK, NGBE_RSTSTAT_TMRINIT(30));
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/* errata 4: initialize mng flex tbl and wakeup flex tbl*/
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wr32(hw, NGBE_MNGFLEXSEL, 0);
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for (i = 0; i < 16; i++) {
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wr32(hw, NGBE_MNGFLEXDWL(i), 0);
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wr32(hw, NGBE_MNGFLEXDWH(i), 0);
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wr32(hw, NGBE_MNGFLEXMSK(i), 0);
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}
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wr32(hw, NGBE_LANFLEXSEL, 0);
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for (i = 0; i < 16; i++) {
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wr32(hw, NGBE_LANFLEXDWL(i), 0);
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wr32(hw, NGBE_LANFLEXDWH(i), 0);
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wr32(hw, NGBE_LANFLEXMSK(i), 0);
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}
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/* set pause frame dst mac addr */
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wr32(hw, NGBE_RXPBPFCDMACL, 0xC2000001);
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wr32(hw, NGBE_RXPBPFCDMACH, 0x0180);
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wr32(hw, NGBE_MDIOMODE, 0xF);
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wr32m(hw, NGBE_GPIE, NGBE_GPIE_MSIX, NGBE_GPIE_MSIX);
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if ((hw->sub_system_id & NGBE_OEM_MASK) == NGBE_LY_M88E1512_SFP ||
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(hw->sub_system_id & NGBE_OEM_MASK) == NGBE_LY_YT8521S_SFP) {
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/* gpio0 is used to power on/off control*/
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wr32(hw, NGBE_GPIODIR, NGBE_GPIODIR_DDR(1));
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wr32(hw, NGBE_GPIODATA, NGBE_GPIOBIT_0);
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}
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hw->mac.init_thermal_sensor_thresh(hw);
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/* enable mac transmitter */
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wr32m(hw, NGBE_MACTXCFG, NGBE_MACTXCFG_TE, NGBE_MACTXCFG_TE);
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/* sellect GMII */
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wr32m(hw, NGBE_MACTXCFG,
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NGBE_MACTXCFG_SPEED_MASK, NGBE_MACTXCFG_SPEED_1G);
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for (i = 0; i < 4; i++)
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wr32m(hw, NGBE_IVAR(i), 0x80808080, 0);
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}
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/**
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* ngbe_reset_hw_em - Perform hardware reset
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* @hw: pointer to hardware structure
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*
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* Resets the hardware by resetting the transmit and receive units, masks
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* and clears all interrupts, perform a PHY reset, and perform a link (MAC)
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* reset.
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**/
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s32 ngbe_reset_hw_em(struct ngbe_hw *hw)
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{
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s32 status;
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DEBUGFUNC("ngbe_reset_hw_em");
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/* Call adapter stop to disable tx/rx and clear interrupts */
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status = hw->mac.stop_hw(hw);
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if (status != 0)
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return status;
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wr32(hw, NGBE_RST, NGBE_RST_LAN(hw->bus.lan_id));
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ngbe_flush(hw);
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msec_delay(50);
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ngbe_reset_misc_em(hw);
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msec_delay(50);
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return status;
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}
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/**
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* ngbe_set_lan_id_multi_port - Set LAN id for PCIe multiple port devices
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* @hw: pointer to the HW structure
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@ -27,6 +154,57 @@ void ngbe_set_lan_id_multi_port(struct ngbe_hw *hw)
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bus->func = bus->lan_id;
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}
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/**
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* ngbe_stop_hw - Generic stop Tx/Rx units
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* @hw: pointer to hardware structure
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*
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* Sets the adapter_stopped flag within ngbe_hw struct. Clears interrupts,
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* disables transmit and receive units. The adapter_stopped flag is used by
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* the shared code and drivers to determine if the adapter is in a stopped
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* state and should not touch the hardware.
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**/
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s32 ngbe_stop_hw(struct ngbe_hw *hw)
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{
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u32 reg_val;
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u16 i;
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DEBUGFUNC("ngbe_stop_hw");
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/*
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* Set the adapter_stopped flag so other driver functions stop touching
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* the hardware
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*/
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hw->adapter_stopped = true;
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/* Disable the receive unit */
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ngbe_disable_rx(hw);
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/* Clear interrupt mask to stop interrupts from being generated */
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wr32(hw, NGBE_IENMISC, 0);
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wr32(hw, NGBE_IMS(0), NGBE_IMS_MASK);
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/* Clear any pending interrupts, flush previous writes */
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wr32(hw, NGBE_ICRMISC, NGBE_ICRMISC_MASK);
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wr32(hw, NGBE_ICR(0), NGBE_ICR_MASK);
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/* Disable the transmit unit. Each queue must be disabled. */
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for (i = 0; i < hw->mac.max_tx_queues; i++)
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wr32(hw, NGBE_TXCFG(i), NGBE_TXCFG_FLUSH);
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/* Disable the receive unit by stopping each queue */
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for (i = 0; i < hw->mac.max_rx_queues; i++) {
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reg_val = rd32(hw, NGBE_RXCFG(i));
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reg_val &= ~NGBE_RXCFG_ENA;
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wr32(hw, NGBE_RXCFG(i), reg_val);
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}
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/* flush all queues disables */
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ngbe_flush(hw);
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msec_delay(2);
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return 0;
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}
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/**
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* ngbe_acquire_swfw_sync - Acquire SWFW semaphore
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* @hw: pointer to hardware structure
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@ -98,6 +276,54 @@ void ngbe_release_swfw_sync(struct ngbe_hw *hw, u32 mask)
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ngbe_release_eeprom_semaphore(hw);
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}
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/**
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* ngbe_init_thermal_sensor_thresh - Inits thermal sensor thresholds
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* @hw: pointer to hardware structure
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*
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* Inits the thermal sensor thresholds according to the NVM map
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* and save off the threshold and location values into mac.thermal_sensor_data
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**/
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s32 ngbe_init_thermal_sensor_thresh(struct ngbe_hw *hw)
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{
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struct ngbe_thermal_sensor_data *data = &hw->mac.thermal_sensor_data;
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DEBUGFUNC("ngbe_init_thermal_sensor_thresh");
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memset(data, 0, sizeof(struct ngbe_thermal_sensor_data));
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if (hw->bus.lan_id != 0)
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return NGBE_NOT_IMPLEMENTED;
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wr32(hw, NGBE_TSINTR,
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NGBE_TSINTR_AEN | NGBE_TSINTR_DEN);
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wr32(hw, NGBE_TSEN, NGBE_TSEN_ENA);
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data->sensor[0].alarm_thresh = 115;
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wr32(hw, NGBE_TSATHRE, 0x344);
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data->sensor[0].dalarm_thresh = 110;
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wr32(hw, NGBE_TSDTHRE, 0x330);
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return 0;
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}
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void ngbe_disable_rx(struct ngbe_hw *hw)
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{
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u32 pfdtxgswc;
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pfdtxgswc = rd32(hw, NGBE_PSRCTL);
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if (pfdtxgswc & NGBE_PSRCTL_LBENA) {
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pfdtxgswc &= ~NGBE_PSRCTL_LBENA;
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wr32(hw, NGBE_PSRCTL, pfdtxgswc);
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hw->mac.set_lben = true;
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} else {
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hw->mac.set_lben = false;
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}
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wr32m(hw, NGBE_PBRXCTL, NGBE_PBRXCTL_ENA, 0);
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wr32m(hw, NGBE_MACRXCFG, NGBE_MACRXCFG_ENA, 0);
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}
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/**
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* ngbe_set_mac_type - Sets MAC type
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* @hw: pointer to the HW structure
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@ -216,13 +442,22 @@ s32 ngbe_init_ops_pf(struct ngbe_hw *hw)
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bus->set_lan_id = ngbe_set_lan_id_multi_port;
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/* MAC */
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mac->init_hw = ngbe_init_hw;
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mac->reset_hw = ngbe_reset_hw_em;
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mac->stop_hw = ngbe_stop_hw;
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mac->acquire_swfw_sync = ngbe_acquire_swfw_sync;
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mac->release_swfw_sync = ngbe_release_swfw_sync;
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/* Manageability interface */
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mac->init_thermal_sensor_thresh = ngbe_init_thermal_sensor_thresh;
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/* EEPROM */
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rom->init_params = ngbe_init_eeprom_params;
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rom->validate_checksum = ngbe_validate_eeprom_checksum_em;
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mac->max_rx_queues = NGBE_EM_MAX_RX_QUEUES;
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mac->max_tx_queues = NGBE_EM_MAX_TX_QUEUES;
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return 0;
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}
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@ -8,11 +8,20 @@
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#include "ngbe_type.h"
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#define NGBE_EM_MAX_TX_QUEUES 8
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#define NGBE_EM_MAX_RX_QUEUES 8
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s32 ngbe_init_hw(struct ngbe_hw *hw);
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s32 ngbe_reset_hw_em(struct ngbe_hw *hw);
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s32 ngbe_stop_hw(struct ngbe_hw *hw);
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void ngbe_set_lan_id_multi_port(struct ngbe_hw *hw);
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s32 ngbe_acquire_swfw_sync(struct ngbe_hw *hw, u32 mask);
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void ngbe_release_swfw_sync(struct ngbe_hw *hw, u32 mask);
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s32 ngbe_init_thermal_sensor_thresh(struct ngbe_hw *hw);
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void ngbe_disable_rx(struct ngbe_hw *hw);
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s32 ngbe_init_shared_code(struct ngbe_hw *hw);
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s32 ngbe_set_mac_type(struct ngbe_hw *hw);
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s32 ngbe_init_ops_pf(struct ngbe_hw *hw);
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@ -6,10 +6,25 @@
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#ifndef _NGBE_TYPE_H_
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#define _NGBE_TYPE_H_
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#define NGBE_FRAME_SIZE_DFT (1522) /* Default frame size, +FCS */
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#define NGBE_ALIGN 128 /* as intel did */
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#define NGBE_ISB_SIZE 16
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#include "ngbe_status.h"
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#include "ngbe_osdep.h"
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#include "ngbe_devids.h"
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struct ngbe_thermal_diode_data {
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s16 temp;
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s16 alarm_thresh;
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s16 dalarm_thresh;
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};
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struct ngbe_thermal_sensor_data {
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struct ngbe_thermal_diode_data sensor[1];
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};
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enum ngbe_eeprom_type {
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ngbe_eeprom_unknown = 0,
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ngbe_eeprom_spi,
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@ -71,9 +86,20 @@ struct ngbe_rom_info {
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};
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struct ngbe_mac_info {
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s32 (*init_hw)(struct ngbe_hw *hw);
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s32 (*reset_hw)(struct ngbe_hw *hw);
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s32 (*stop_hw)(struct ngbe_hw *hw);
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s32 (*acquire_swfw_sync)(struct ngbe_hw *hw, u32 mask);
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void (*release_swfw_sync)(struct ngbe_hw *hw, u32 mask);
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/* Manageability interface */
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s32 (*init_thermal_sensor_thresh)(struct ngbe_hw *hw);
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enum ngbe_mac_type type;
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u32 max_tx_queues;
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u32 max_rx_queues;
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struct ngbe_thermal_sensor_data thermal_sensor_data;
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bool set_lben;
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};
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struct ngbe_phy_info {
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@ -92,6 +118,10 @@ struct ngbe_hw {
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u16 vendor_id;
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u16 sub_device_id;
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u16 sub_system_id;
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bool adapter_stopped;
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uint64_t isb_dma;
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void IOMEM *isb_mem;
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bool is_pf;
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};
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@ -60,6 +60,7 @@ eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)
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{
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struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
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struct ngbe_hw *hw = ngbe_dev_hw(eth_dev);
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const struct rte_memzone *mz;
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int err;
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PMD_INIT_FUNC_TRACE();
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@ -76,6 +77,15 @@ eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)
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ngbe_map_device_id(hw);
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hw->hw_addr = (void *)pci_dev->mem_resource[0].addr;
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/* Reserve memory for interrupt status block */
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mz = rte_eth_dma_zone_reserve(eth_dev, "ngbe_driver", -1,
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NGBE_ISB_SIZE, NGBE_ALIGN, SOCKET_ID_ANY);
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if (mz == NULL)
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return -ENOMEM;
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hw->isb_dma = TMZ_PADDR(mz);
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hw->isb_mem = TMZ_VADDR(mz);
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/* Initialize the shared code (base driver) */
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err = ngbe_init_shared_code(hw);
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if (err != 0) {
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@ -99,6 +109,12 @@ eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)
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return -EIO;
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}
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err = hw->mac.init_hw(hw);
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if (err != 0) {
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PMD_INIT_LOG(ERR, "Hardware Initialization Failure: %d", err);
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return -EIO;
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}
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return 0;
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}
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