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cryptodev: remove AAD size in auth capabilities

Browse Source 
Additional Authenticated Data (AAD) was removed from the
authentication parameters, but still the supported size
was part of the authentication capabilities of a PMD.

Fixes: 4428eda8bb75 ("cryptodev: remove AAD from authentication structure")

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
This commit is contained in:
Pablo de Lara 2017-07-11 07:30:43 +01:00
parent 7c95d47c1e
commit 7b3880fdcc
14 changed files with 10 additions and 57 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
app/test-crypto-perf/main.c
View File

@ -208,7 +208,6 @@ cperf_verify_devices_capabilities(struct cperf_options *opts,
capability,
opts->auth_key_sz,
opts->digest_sz,
0,
opts->auth_iv_sz);
if (ret != 0)
return ret;

2
doc/guides/rel_notes/release_17_08.rst
View File

@ -291,6 +291,8 @@ API Changes
``mempool``, instead of ``device id`` and ``rte_crypto_sym_xform``.
* Remove ``device id`` parameter from ``rte_cryptodev_sym_session_free()``.
* Added new field ``session_pool`` to ``rte_cryptodev_queue_pair_setup()``.
* Removed ``aad_size`` parameter from ``rte_cryptodev_sym_capability_check_auth()``.
* Added ``iv_size`` parameter to ``rte_cryptodev_sym_capability_check_auth()``.
ABI Changes

1
drivers/crypto/aesni_gcm/aesni_gcm_pmd_ops.c
View File

@ -56,7 +56,6 @@ static const struct rte_cryptodev_capabilities aesni_gcm_pmd_capabilities[] = {
.max = 16,
.increment = 4
},
.aad_size = { 0 },
.iv_size = {
.min = 12,
.max = 12,

7
drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c
View File

@ -57,7 +57,6 @@ static const struct rte_cryptodev_capabilities aesni_mb_pmd_capabilities[] = {
.max = 12,
.increment = 0
},
.aad_size = { 0 },
.iv_size = { 0 }
}, }
}, }
@ -79,7 +78,6 @@ static const struct rte_cryptodev_capabilities aesni_mb_pmd_capabilities[] = {
.max = 12,
.increment = 0
},
.aad_size = { 0 },
.iv_size = { 0 }
}, }
}, }
@ -101,7 +99,6 @@ static const struct rte_cryptodev_capabilities aesni_mb_pmd_capabilities[] = {
.max = 14,
.increment = 0
},
.aad_size = { 0 },
.iv_size = { 0 }
}, }
}, }
@ -123,7 +120,6 @@ static const struct rte_cryptodev_capabilities aesni_mb_pmd_capabilities[] = {
.max = 16,
.increment = 0
},
.aad_size = { 0 },
.iv_size = { 0 }
}, }
}, }
@ -145,7 +141,6 @@ static const struct rte_cryptodev_capabilities aesni_mb_pmd_capabilities[] = {
.max = 24,
.increment = 0
},
.aad_size = { 0 },
.iv_size = { 0 }
}, }
}, }
@ -167,7 +162,6 @@ static const struct rte_cryptodev_capabilities aesni_mb_pmd_capabilities[] = {
.max = 32,
.increment = 0
},
.aad_size = { 0 },
.iv_size = { 0 }
}, }
}, }
@ -189,7 +183,6 @@ static const struct rte_cryptodev_capabilities aesni_mb_pmd_capabilities[] = {
.max = 12,
.increment = 0
},
.aad_size = { 0 },
.iv_size = { 0 }
}, }
}, }

2
drivers/crypto/armv8/rte_armv8_pmd_ops.c
View File

@ -59,7 +59,6 @@ static const struct rte_cryptodev_capabilities
.max = 20,
.increment = 0
},
.aad_size = { 0 },
.iv_size = { 0 }
}, }
}, }
@ -81,7 +80,6 @@ static const struct rte_cryptodev_capabilities
.max = 32,
.increment = 0
},
.aad_size = { 0 },
.iv_size = { 0 }
}, }
}, }

6
drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
View File

@ -209,7 +209,6 @@ static const struct rte_cryptodev_capabilities dpaa2_sec_capabilities[] = {
.max = 16,
.increment = 0
},
.aad_size = { 0 },
.iv_size = { 0 }
}, }
}, }
@ -231,7 +230,6 @@ static const struct rte_cryptodev_capabilities dpaa2_sec_capabilities[] = {
.max = 20,
.increment = 0
},
.aad_size = { 0 },
.iv_size = { 0 }
}, }
}, }
@ -253,7 +251,6 @@ static const struct rte_cryptodev_capabilities dpaa2_sec_capabilities[] = {
.max = 28,
.increment = 0
},
.aad_size = { 0 },
.iv_size = { 0 }
}, }
}, }
@ -275,7 +272,6 @@ static const struct rte_cryptodev_capabilities dpaa2_sec_capabilities[] = {
.max = 32,
.increment = 0
},
.aad_size = { 0 },
.iv_size = { 0 }
}, }
}, }
@ -297,7 +293,6 @@ static const struct rte_cryptodev_capabilities dpaa2_sec_capabilities[] = {
.max = 48,
.increment = 0
},
.aad_size = { 0 },
.iv_size = { 0 }
}, }
}, }
@ -319,7 +314,6 @@ static const struct rte_cryptodev_capabilities dpaa2_sec_capabilities[] = {
.max = 64,
.increment = 0
},
.aad_size = { 0 },
.iv_size = { 0 }
}, }
}, }

3
drivers/crypto/kasumi/rte_kasumi_pmd_ops.c
View File

@ -60,8 +60,7 @@ static const struct rte_cryptodev_capabilities kasumi_pmd_capabilities[] = {
.min = 8,
.max = 8,
.increment = 0
},
.aad_size = { 0 }
}
}, }
}, }
},

1
drivers/crypto/null/null_crypto_pmd_ops.c
View File

@ -56,7 +56,6 @@ static const struct rte_cryptodev_capabilities null_crypto_pmd_capabilities[] =
.max = 0,
.increment = 0
},
.aad_size = { 0 },
.iv_size = { 0 }
}, },
}, },

12
drivers/crypto/openssl/rte_openssl_pmd_ops.c
View File

@ -57,7 +57,6 @@ static const struct rte_cryptodev_capabilities openssl_pmd_capabilities[] = {
.max = 16,
.increment = 0
},
.aad_size = { 0 },
.iv_size = { 0 }
}, }
}, }
@ -79,7 +78,6 @@ static const struct rte_cryptodev_capabilities openssl_pmd_capabilities[] = {
.max = 16,
.increment = 0
},
.aad_size = { 0 },
.iv_size = { 0 }
}, }
}, }
@ -101,7 +99,6 @@ static const struct rte_cryptodev_capabilities openssl_pmd_capabilities[] = {
.max = 20,
.increment = 0
},
.aad_size = { 0 },
.iv_size = { 0 }
}, }
}, }
@ -123,7 +120,6 @@ static const struct rte_cryptodev_capabilities openssl_pmd_capabilities[] = {
.max = 20,
.increment = 0
},
.aad_size = { 0 },
.iv_size = { 0 }
}, }
}, }
@ -145,7 +141,6 @@ static const struct rte_cryptodev_capabilities openssl_pmd_capabilities[] = {
.max = 28,
.increment = 0
},
.aad_size = { 0 },
.iv_size = { 0 }
}, }
}, }
@ -167,7 +162,6 @@ static const struct rte_cryptodev_capabilities openssl_pmd_capabilities[] = {
.max = 28,
.increment = 0
},
.aad_size = { 0 },
.iv_size = { 0 }
}, }
}, }
@ -189,7 +183,6 @@ static const struct rte_cryptodev_capabilities openssl_pmd_capabilities[] = {
.max = 32,
.increment = 0
},
.aad_size = { 0 },
.iv_size = { 0 }
}, }
}, }
@ -211,7 +204,6 @@ static const struct rte_cryptodev_capabilities openssl_pmd_capabilities[] = {
.max = 32,
.increment = 0
},
.aad_size = { 0 },
.iv_size = { 0 }
}, }
}, }
@ -233,7 +225,6 @@ static const struct rte_cryptodev_capabilities openssl_pmd_capabilities[] = {
.max = 48,
.increment = 0
},
.aad_size = { 0 },
.iv_size = { 0 }
}, }
}, }
@ -255,7 +246,6 @@ static const struct rte_cryptodev_capabilities openssl_pmd_capabilities[] = {
.max = 48,
.increment = 0
},
.aad_size = { 0 },
.iv_size = { 0 }
}, }
}, }
@ -277,7 +267,6 @@ static const struct rte_cryptodev_capabilities openssl_pmd_capabilities[] = {
.max = 64,
.increment = 0
},
.aad_size = { 0 },
.iv_size = { 0 }
}, }
}, }
@ -299,7 +288,6 @@ static const struct rte_cryptodev_capabilities openssl_pmd_capabilities[] = {
.max = 64,
.increment = 0
},
.aad_size = { 0 },
.iv_size = { 0 }
}, }
}, }

16
drivers/crypto/qat/qat_crypto_capabilities.h
View File

@ -52,7 +52,6 @@
.max = 20, \
.increment = 0 \
}, \
.aad_size = { 0 }, \
.iv_size = { 0 } \
}, } \
}, } \
@ -74,7 +73,6 @@
.max = 28, \
.increment = 0 \
}, \
.aad_size = { 0 }, \
.iv_size = { 0 } \
}, } \
}, } \
@ -96,7 +94,6 @@
.max = 32, \
.increment = 0 \
}, \
.aad_size = { 0 }, \
.iv_size = { 0 } \
}, } \
}, } \
@ -118,7 +115,6 @@
.max = 48, \
.increment = 0 \
}, \
.aad_size = { 0 }, \
.iv_size = { 0 } \
}, } \
}, } \
@ -140,7 +136,6 @@
.max = 64, \
.increment = 0 \
}, \
.aad_size = { 0 }, \
.iv_size = { 0 } \
}, } \
}, } \
@ -162,7 +157,6 @@
.max = 16, \
.increment = 0 \
}, \
.aad_size = { 0 }, \
.iv_size = { 0 } \
}, } \
}, } \
@ -265,8 +259,7 @@
.min = 16, \
.max = 16, \
.increment = 0 \
}, \
.aad_size = { 0 } \
} \
}, } \
}, } \
}, \
@ -367,7 +360,6 @@
.max = 0, \
.increment = 0 \
}, \
.aad_size = { 0 }, \
.iv_size = { 0 } \
}, }, \
}, }, \
@ -433,8 +425,7 @@
.min = 8, \
.max = 8, \
.increment = 0 \
}, \
.aad_size = { 0 } \
} \
}, } \
}, } \
}, \
@ -561,8 +552,7 @@
.min = 16, \
.max = 16, \
.increment = 0 \
}, \
.aad_size = { 0 } \
} \
}, } \
}, } \
}

3
drivers/crypto/snow3g/rte_snow3g_pmd_ops.c
View File

@ -60,8 +60,7 @@ static const struct rte_cryptodev_capabilities snow3g_pmd_capabilities[] = {
.min = 16,
.max = 16,
.increment = 0
},
.aad_size = { 0 }
}
}, }
}, }
},

3
drivers/crypto/zuc/rte_zuc_pmd_ops.c
View File

@ -60,8 +60,7 @@ static const struct rte_cryptodev_capabilities zuc_pmd_capabilities[] = {
.min = 16,
.max = 16,
.increment = 0
},
.aad_size = { 0 }
}
}, }
}, }
},

6
lib/librte_cryptodev/rte_cryptodev.c
View File

@ -311,8 +311,7 @@ rte_cryptodev_sym_capability_check_cipher(
int
rte_cryptodev_sym_capability_check_auth(
const struct rte_cryptodev_symmetric_capability *capability,
uint16_t key_size, uint16_t digest_size, uint16_t aad_size,
uint16_t iv_size)
uint16_t key_size, uint16_t digest_size, uint16_t iv_size)
{
if (param_range_check(key_size, capability->auth.key_size))
return -1;
@ -320,9 +319,6 @@ rte_cryptodev_sym_capability_check_auth(
if (param_range_check(digest_size, capability->auth.digest_size))
return -1;
if (param_range_check(aad_size, capability->auth.aad_size))
return -1;
if (param_range_check(iv_size, capability->auth.iv_size))
return -1;

4
lib/librte_cryptodev/rte_cryptodev.h
View File

@ -238,7 +238,6 @@ rte_cryptodev_sym_capability_check_cipher(
* @param capability Description of the symmetric crypto capability.
* @param key_size Auth key size.
* @param digest_size Auth digest size.
* @param aad_size Auth aad size.
* @param iv_size Auth initial vector size.
*
* @return
@ -248,8 +247,7 @@ rte_cryptodev_sym_capability_check_cipher(
int
rte_cryptodev_sym_capability_check_auth(
const struct rte_cryptodev_symmetric_capability *capability,
uint16_t key_size, uint16_t digest_size, uint16_t aad_size,
uint16_t iv_size);
uint16_t key_size, uint16_t digest_size, uint16_t iv_size);
/**
* Check if key, digest, AAD and initial vector sizes are supported