net/sfc: add NUMA-aware registry of service logical cores
The driver requires service cores for housekeeping. Share these cores for many adapters and various purposes to avoid extra CPU overhead. Since housekeeping services will talk to NIC, it should be possible to choose logical core on matching NUMA node. Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru> Reviewed-by: Andy Moreton <amoreton@xilinx.com> Reviewed-by: Ivan Malov <ivan.malov@oktetlabs.ru>
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@ -62,4 +62,5 @@ sources = files(
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'sfc_ef10_tx.c',
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'sfc_ef100_rx.c',
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'sfc_ef100_tx.c',
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'sfc_service.c',
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)
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99
drivers/net/sfc/sfc_service.c
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99
drivers/net/sfc/sfc_service.c
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@ -0,0 +1,99 @@
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/* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright(c) 2020-2021 Xilinx, Inc.
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*/
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#include <stdint.h>
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#include <rte_common.h>
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#include <rte_spinlock.h>
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#include <rte_lcore.h>
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#include <rte_service.h>
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#include <rte_memory.h>
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#include "sfc_log.h"
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#include "sfc_service.h"
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#include "sfc_debug.h"
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static uint32_t sfc_service_lcore[RTE_MAX_NUMA_NODES];
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static rte_spinlock_t sfc_service_lcore_lock = RTE_SPINLOCK_INITIALIZER;
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RTE_INIT(sfc_service_lcore_init)
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{
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size_t i;
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for (i = 0; i < RTE_DIM(sfc_service_lcore); ++i)
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sfc_service_lcore[i] = RTE_MAX_LCORE;
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}
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static uint32_t
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sfc_find_service_lcore(int *socket_id)
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{
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uint32_t service_core_list[RTE_MAX_LCORE];
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uint32_t lcore_id;
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int num;
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int i;
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SFC_ASSERT(rte_spinlock_is_locked(&sfc_service_lcore_lock));
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num = rte_service_lcore_list(service_core_list,
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RTE_DIM(service_core_list));
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if (num == 0) {
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SFC_GENERIC_LOG(WARNING, "No service cores available");
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return RTE_MAX_LCORE;
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}
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if (num < 0) {
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SFC_GENERIC_LOG(ERR, "Failed to get service core list");
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return RTE_MAX_LCORE;
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}
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for (i = 0; i < num; ++i) {
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lcore_id = service_core_list[i];
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if (*socket_id == SOCKET_ID_ANY) {
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*socket_id = rte_lcore_to_socket_id(lcore_id);
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break;
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} else if (rte_lcore_to_socket_id(lcore_id) ==
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(unsigned int)*socket_id) {
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break;
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}
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}
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if (i == num) {
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SFC_GENERIC_LOG(WARNING,
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"No service cores reserved at socket %d", *socket_id);
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return RTE_MAX_LCORE;
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}
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return lcore_id;
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}
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uint32_t
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sfc_get_service_lcore(int socket_id)
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{
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uint32_t lcore_id = RTE_MAX_LCORE;
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rte_spinlock_lock(&sfc_service_lcore_lock);
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if (socket_id != SOCKET_ID_ANY) {
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lcore_id = sfc_service_lcore[socket_id];
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} else {
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size_t i;
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for (i = 0; i < RTE_DIM(sfc_service_lcore); ++i) {
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if (sfc_service_lcore[i] != RTE_MAX_LCORE) {
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lcore_id = sfc_service_lcore[i];
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break;
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}
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}
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}
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if (lcore_id == RTE_MAX_LCORE) {
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lcore_id = sfc_find_service_lcore(&socket_id);
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if (lcore_id != RTE_MAX_LCORE)
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sfc_service_lcore[socket_id] = lcore_id;
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}
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rte_spinlock_unlock(&sfc_service_lcore_lock);
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return lcore_id;
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}
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20
drivers/net/sfc/sfc_service.h
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20
drivers/net/sfc/sfc_service.h
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@ -0,0 +1,20 @@
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/* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright(c) 2020-2021 Xilinx, Inc.
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*/
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#ifndef _SFC_SERVICE_H
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#define _SFC_SERVICE_H
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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uint32_t sfc_get_service_lcore(int socket_id);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _SFC_SERVICE_H */
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