raw/cnxk_bphy: support reading BPHY queue count
Add support for reading number of available queues from baseband phy. Currently only single queue is supported. Signed-off-by: Jakub Palider <jpalider@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
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@ -29,6 +29,14 @@ bphy_rawdev_get_name(char *name, struct rte_pci_device *pci_dev)
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pci_dev->addr.function);
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pci_dev->addr.function);
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}
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}
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static uint16_t
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cnxk_bphy_irq_queue_count(struct rte_rawdev *dev)
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{
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struct bphy_device *bphy_dev = (struct bphy_device *)dev->dev_private;
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return RTE_DIM(bphy_dev->queues);
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}
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static int
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static int
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cnxk_bphy_irq_queue_def_conf(struct rte_rawdev *dev, uint16_t queue_id,
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cnxk_bphy_irq_queue_def_conf(struct rte_rawdev *dev, uint16_t queue_id,
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rte_rawdev_obj_t queue_conf,
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rte_rawdev_obj_t queue_conf,
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@ -47,6 +55,7 @@ cnxk_bphy_irq_queue_def_conf(struct rte_rawdev *dev, uint16_t queue_id,
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static const struct rte_rawdev_ops bphy_rawdev_ops = {
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static const struct rte_rawdev_ops bphy_rawdev_ops = {
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.queue_def_conf = cnxk_bphy_irq_queue_def_conf,
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.queue_def_conf = cnxk_bphy_irq_queue_def_conf,
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.queue_count = cnxk_bphy_irq_queue_count,
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};
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};
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static int
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static int
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@ -15,9 +15,16 @@ struct bphy_mem {
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struct rte_mem_resource res2;
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struct rte_mem_resource res2;
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};
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};
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struct bphy_irq_queue {
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/* queue holds up to one response */
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void *rsp;
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};
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struct bphy_device {
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struct bphy_device {
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struct roc_bphy_irq_chip *irq_chip;
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struct roc_bphy_irq_chip *irq_chip;
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struct bphy_mem mem;
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struct bphy_mem mem;
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/* bphy irq interface supports single queue only */
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struct bphy_irq_queue queues[1];
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};
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};
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#endif /* _CNXK_BPHY_IRQ_ */
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#endif /* _CNXK_BPHY_IRQ_ */
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