ethdev: add API to retrieve queue information

Add the ability for the upper layer to query RX/TX queue information.
Add into rte_eth_dev_info new fields to represent information about
RX/TX descriptors min/max/alig nnumbers per queue for the device.

Add new structures:
struct rte_eth_rxq_info
struct rte_eth_txq_info

new functions:
rte_eth_rx_queue_info_get
rte_eth_tx_queue_info_get

into rte_etdev API.

Left extra free space in the queue info structures,
so extra fields could be added later without ABI breakage.

Add new fields:
rx_desc_lim
tx_desc_lim
into rte_eth_dev_info.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Remy Horton <remy.horton@intel.com>
This commit is contained in:
Konstantin Ananyev 2015-10-27 12:51:43 +00:00 committed by Thomas Monjalon
parent d0510c2a25
commit 80a1deb4c7
4 changed files with 162 additions and 2 deletions

View File

@ -4,6 +4,12 @@ DPDK Release 2.2
New Features
------------
* **Added API in ethdev to retrieve RX/TX queue information.**
* Add the ability for the upper layer to query RX/TX queue information.
* Add into rte_eth_dev_info new fields to represent information about
RX/TX descriptors min/max/align numbers per queue for the device.
* **Added RSS dynamic configuration to bonding.**
* **Added e1000 Rx interrupt support.**
@ -158,6 +164,9 @@ ABI Changes
* The ethdev flow director entries for SCTP were changed.
It was already done in 2.1 for CONFIG_RTE_NEXT_ABI.
* The new fields rx_desc_lim and tx_desc_lim are added into rte_eth_dev_info
structure.
* The mbuf structure was changed to support unified packet type.
It was already done in 2.1 for CONFIG_RTE_NEXT_ABI.

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@ -1248,6 +1248,19 @@ rte_eth_rx_queue_setup(uint8_t port_id, uint16_t rx_queue_id,
return -EINVAL;
}
if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
"should be: <= %hu, = %hu, and a product of %hu\n",
nb_rx_desc,
dev_info.rx_desc_lim.nb_max,
dev_info.rx_desc_lim.nb_min,
dev_info.rx_desc_lim.nb_align);
return -EINVAL;
}
if (rx_conf == NULL)
rx_conf = &dev_info.default_rxconf;
@ -1587,11 +1600,18 @@ void
rte_eth_dev_info_get(uint8_t port_id, struct rte_eth_dev_info *dev_info)
{
struct rte_eth_dev *dev;
const struct rte_eth_desc_lim lim = {
.nb_max = UINT16_MAX,
.nb_min = 0,
.nb_align = 1,
};
VALID_PORTID_OR_RET(port_id);
dev = &rte_eth_devices[port_id];
memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
dev_info->rx_desc_lim = lim;
dev_info->tx_desc_lim = lim;
FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
(*dev->dev_ops->dev_infos_get)(dev, dev_info);
@ -3021,6 +3041,54 @@ rte_eth_remove_tx_callback(uint8_t port_id, uint16_t queue_id,
return -EINVAL;
}
int
rte_eth_rx_queue_info_get(uint8_t port_id, uint16_t queue_id,
struct rte_eth_rxq_info *qinfo)
{
struct rte_eth_dev *dev;
VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
if (qinfo == NULL)
return -EINVAL;
dev = &rte_eth_devices[port_id];
if (queue_id >= dev->data->nb_rx_queues) {
PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
return -EINVAL;
}
FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
memset(qinfo, 0, sizeof(*qinfo));
dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
return 0;
}
int
rte_eth_tx_queue_info_get(uint8_t port_id, uint16_t queue_id,
struct rte_eth_txq_info *qinfo)
{
struct rte_eth_dev *dev;
VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
if (qinfo == NULL)
return -EINVAL;
dev = &rte_eth_devices[port_id];
if (queue_id >= dev->data->nb_tx_queues) {
PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
return -EINVAL;
}
FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
memset(qinfo, 0, sizeof(*qinfo));
dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
return 0;
}
int
rte_eth_dev_set_mc_addr_list(uint8_t port_id,
struct ether_addr *mc_addr_set,

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@ -652,6 +652,15 @@ struct rte_eth_txconf {
uint8_t tx_deferred_start; /**< Do not start queue with rte_eth_dev_start(). */
};
/**
* A structure contains information about HW descriptor ring limitations.
*/
struct rte_eth_desc_lim {
uint16_t nb_max; /**< Max allowed number of descriptors. */
uint16_t nb_min; /**< Min allowed number of descriptors. */
uint16_t nb_align; /**< Number of descriptors should be aligned to. */
};
/**
* This enum indicates the flow control mode
*/
@ -837,8 +846,30 @@ struct rte_eth_dev_info {
uint16_t vmdq_queue_base; /**< First queue ID for VMDQ pools. */
uint16_t vmdq_queue_num; /**< Queue number for VMDQ pools. */
uint16_t vmdq_pool_base; /**< First ID of VMDQ pools. */
struct rte_eth_desc_lim rx_desc_lim; /**< RX descriptors limits */
struct rte_eth_desc_lim tx_desc_lim; /**< TX descriptors limits */
};
/**
* Ethernet device RX queue information structure.
* Used to retieve information about configured queue.
*/
struct rte_eth_rxq_info {
struct rte_mempool *mp; /**< mempool used by that queue. */
struct rte_eth_rxconf conf; /**< queue config parameters. */
uint8_t scattered_rx; /**< scattered packets RX supported. */
uint16_t nb_desc; /**< configured number of RXDs. */
} __rte_cache_aligned;
/**
* Ethernet device TX queue information structure.
* Used to retieve information about configured queue.
*/
struct rte_eth_txq_info {
struct rte_eth_txconf conf; /**< queue config parameters. */
uint16_t nb_desc; /**< configured number of TXDs. */
} __rte_cache_aligned;
/** Maximum name length for extended statistics counters */
#define RTE_ETH_XSTATS_NAME_SIZE 64
@ -997,6 +1028,12 @@ typedef uint32_t (*eth_rx_queue_count_t)(struct rte_eth_dev *dev,
typedef int (*eth_rx_descriptor_done_t)(void *rxq, uint16_t offset);
/**< @internal Check DD bit of specific RX descriptor */
typedef void (*eth_rxq_info_get_t)(struct rte_eth_dev *dev,
uint16_t rx_queue_id, struct rte_eth_rxq_info *qinfo);
typedef void (*eth_txq_info_get_t)(struct rte_eth_dev *dev,
uint16_t tx_queue_id, struct rte_eth_txq_info *qinfo);
typedef int (*mtu_set_t)(struct rte_eth_dev *dev, uint16_t mtu);
/**< @internal Set MTU. */
@ -1337,9 +1374,13 @@ struct eth_dev_ops {
rss_hash_update_t rss_hash_update;
/** Get current RSS hash configuration. */
rss_hash_conf_get_t rss_hash_conf_get;
eth_filter_ctrl_t filter_ctrl; /**< common filter control*/
eth_filter_ctrl_t filter_ctrl;
/**< common filter control. */
eth_set_mc_addr_list_t set_mc_addr_list; /**< set list of mcast addrs */
eth_rxq_info_get_t rxq_info_get;
/**< retrieve RX queue information. */
eth_txq_info_get_t txq_info_get;
/**< retrieve TX queue information. */
/** Turn IEEE1588/802.1AS timestamping on. */
eth_timesync_enable_t timesync_enable;
/** Turn IEEE1588/802.1AS timestamping off. */
@ -3495,6 +3536,46 @@ int rte_eth_remove_tx_callback(uint8_t port_id, uint16_t queue_id,
struct rte_eth_rxtx_callback *user_cb);
/**
* Retrieve information about given port's RX queue.
*
* @param port_id
* The port identifier of the Ethernet device.
* @param queue_id
* The RX queue on the Ethernet device for which information
* will be retrieved.
* @param qinfo
* A pointer to a structure of type *rte_eth_rxq_info_info* to be filled with
* the information of the Ethernet device.
*
* @return
* - 0: Success
* - -ENOTSUP: routine is not supported by the device PMD.
* - -EINVAL: The port_id or the queue_id is out of range.
*/
int rte_eth_rx_queue_info_get(uint8_t port_id, uint16_t queue_id,
struct rte_eth_rxq_info *qinfo);
/**
* Retrieve information about given port's TX queue.
*
* @param port_id
* The port identifier of the Ethernet device.
* @param queue_id
* The TX queue on the Ethernet device for which information
* will be retrieved.
* @param qinfo
* A pointer to a structure of type *rte_eth_txq_info_info* to be filled with
* the information of the Ethernet device.
*
* @return
* - 0: Success
* - -ENOTSUP: routine is not supported by the device PMD.
* - -EINVAL: The port_id or the queue_id is out of range.
*/
int rte_eth_tx_queue_info_get(uint8_t port_id, uint16_t queue_id,
struct rte_eth_txq_info *qinfo);
/*
* Retrieve number of available registers for access
*
* @param port_id

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@ -132,5 +132,7 @@ DPDK_2.2 {
global:
rte_eth_dev_get_dcb_info;
rte_eth_rx_queue_info_get;
rte_eth_tx_queue_info_get;
} DPDK_2.1;