igb: more supported devices
Signed-off-by: Intel
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5a32a257f9
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8206ad5055
@ -461,7 +461,7 @@ eth_igb_start(struct rte_eth_dev *dev)
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* value of Write-Back Threshold registers.
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*/
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if ((hw->mac.type == e1000_82576) || (hw->mac.type == e1000_82580) ||
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(hw->mac.type == e1000_i350)) {
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(hw->mac.type == e1000_i350) || (hw->mac.type == e1000_i210)) {
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uint32_t ivar;
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/* Enable all RX & TX queues in the IVAR registers */
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@ -585,11 +585,13 @@ igb_get_rx_buffer_size(struct e1000_hw *hw)
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uint32_t rx_buf_size;
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if (hw->mac.type == e1000_82576) {
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rx_buf_size = (E1000_READ_REG(hw, E1000_RXPBS) & 0xffff) << 10;
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} else if (hw->mac.type == e1000_82580) {
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} else if (hw->mac.type == e1000_82580 || hw->mac.type == e1000_i350) {
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/* PBS needs to be translated according to a lookup table */
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rx_buf_size = (E1000_READ_REG(hw, E1000_RXPBS) & 0xf);
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rx_buf_size = (uint32_t) e1000_rxpbs_adjust_82580(rx_buf_size);
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rx_buf_size = (rx_buf_size << 10);
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} else if (hw->mac.type == e1000_i210) {
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rx_buf_size = (E1000_READ_REG(hw, E1000_RXPBS) & 0x3f) << 10;
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} else {
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rx_buf_size = (E1000_READ_REG(hw, E1000_PBA) & 0xffff) << 10;
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}
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@ -824,6 +826,21 @@ eth_igb_infos_get(struct rte_eth_dev *dev,
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dev_info->max_tx_queues = 8;
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break;
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case e1000_i210:
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dev_info->max_rx_queues = 4;
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dev_info->max_tx_queues = 4;
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break;
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case e1000_vfadapt:
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dev_info->max_rx_queues = 2;
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dev_info->max_tx_queues = 2;
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break;
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case e1000_vfadapt_i350:
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dev_info->max_rx_queues = 1;
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dev_info->max_tx_queues = 1;
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break;
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default:
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/* Should not happen */
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dev_info->max_rx_queues = 0;
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