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net/hns3: fix code check warnings

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Fix code check warnings according to:
 - function should have same name with previous declaration;
 - local variable should no be referenced in macro referenced;
 - macro argument 'adapter' should be enclosed in parentheses.

Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
This commit is contained in:
Min Hu (Connor) 2022-09-05 16:59:28 +08:00 committed by Andrew Rybchenko
parent 635acdaf9f
commit 82c2ca6ddd
12 changed files with 45 additions and 43 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
drivers/net/hns3/hns3_common.c
View File

@ -493,7 +493,7 @@ hns3_configure_all_mac_addr(struct hns3_adapter *hns, bool del)
if (ret) {
hns3_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
addr);
hns3_err(hw, "failed to %s mac addr(%s) index:%d ret = %d.",
hns3_err(hw, "failed to %s mac addr(%s) index:%u ret = %d.",
del ? "remove" : "restore", mac_str, i, ret);
}
}
@ -680,7 +680,7 @@ hns3_init_ring_with_vector(struct hns3_hw *hw)
ret = hw->ops.bind_ring_with_vector(hw, vec, false,
HNS3_RING_TYPE_TX, i);
if (ret) {
PMD_INIT_LOG(ERR, "fail to unbind TX ring(%d) with vector: %u, ret=%d",
PMD_INIT_LOG(ERR, "fail to unbind TX ring(%u) with vector: %u, ret=%d",
i, vec, ret);
return ret;
}

4
drivers/net/hns3/hns3_dump.c
View File

@ -342,7 +342,7 @@ static void
print_queue_state_perline(FILE *file, const uint32_t *queue_state,
uint32_t nb_queues, uint32_t line_num)
{
#define NUM_QUEUE_PER_LINE (sizeof(*queue_state) * CHAR_BIT)
#define NUM_QUEUE_PER_LINE (sizeof(uint32_t) * HNS3_UINT8_BIT)
uint32_t qid = line_num * NUM_QUEUE_PER_LINE;
uint32_t j;
@ -365,7 +365,7 @@ static void
display_queue_enable_state(FILE *file, const uint32_t *queue_state,
uint32_t nb_queues, bool is_rxq)
{
#define NUM_QUEUE_PER_LINE (sizeof(*queue_state) * CHAR_BIT)
#define NUM_QUEUE_PER_LINE (sizeof(uint32_t) * HNS3_UINT8_BIT)
uint32_t i;
if (nb_queues == 0) {

14
drivers/net/hns3/hns3_ethdev.h
View File

@ -898,11 +898,11 @@ enum hns3_dev_cap {
hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_##_name##_B)
#define HNS3_DEV_PRIVATE_TO_HW(adapter) \
(&((struct hns3_adapter *)adapter)->hw)
(&((struct hns3_adapter *)(adapter))->hw)
#define HNS3_DEV_PRIVATE_TO_PF(adapter) \
(&((struct hns3_adapter *)adapter)->pf)
(&((struct hns3_adapter *)(adapter))->pf)
#define HNS3_DEV_PRIVATE_TO_VF(adapter) \
(&((struct hns3_adapter *)adapter)->vf)
(&((struct hns3_adapter *)(adapter))->vf)
#define HNS3_DEV_HW_TO_ADAPTER(hw) \
container_of(hw, struct hns3_adapter, hw)
@ -999,10 +999,10 @@ static inline uint32_t hns3_read_reg(void *base, uint32_t reg)
#define NEXT_ITEM_OF_ACTION(act, actions, index) \
do { \
act = (actions) + (index); \
while (act->type == RTE_FLOW_ACTION_TYPE_VOID) { \
(act) = (actions) + (index); \
while ((act)->type == RTE_FLOW_ACTION_TYPE_VOID) { \
(index)++; \
act = actions + index; \
(act) = (actions) + (index); \
} \
} while (0)
@ -1027,7 +1027,7 @@ hns3_atomic_clear_bit(unsigned int nr, volatile uint64_t *addr)
__atomic_fetch_and(addr, ~(1UL << nr), __ATOMIC_RELAXED);
}
static inline int64_t
static inline uint64_t
hns3_test_and_clear_bit(unsigned int nr, volatile uint64_t *addr)
{
uint64_t mask = (1UL << nr);

4
drivers/net/hns3/hns3_flow.c
View File

@ -66,7 +66,7 @@ static enum rte_flow_item_type tunnel_next_items[] = {
struct items_step_mngr {
enum rte_flow_item_type *items;
int count;
size_t count;
};
static inline void
@ -1141,7 +1141,7 @@ hns3_validate_item(const struct rte_flow_item *item,
struct items_step_mngr step_mngr,
struct rte_flow_error *error)
{
int i;
uint32_t i;
if (item->last)
return rte_flow_error_set(error, ENOTSUP,

27
drivers/net/hns3/hns3_intr.c
View File

@ -16,12 +16,6 @@
#define SWITCH_CONTEXT_US 10
#define HNS3_CHECK_MERGE_CNT(val) \
do { \
if (val) \
hw->reset.stats.merge_cnt++; \
} while (0)
static const char *reset_string[HNS3_MAX_RESET] = {
"flr", "vf_func", "vf_pf_func", "vf_full", "vf_global",
"pf_func", "global", "IMP", "none",
@ -2525,20 +2519,20 @@ static void
hns3_clear_reset_level(struct hns3_hw *hw, uint64_t *levels)
{
uint64_t merge_cnt = hw->reset.stats.merge_cnt;
int64_t tmp;
uint64_t tmp;
switch (hw->reset.level) {
case HNS3_IMP_RESET:
hns3_atomic_clear_bit(HNS3_IMP_RESET, levels);
tmp = hns3_test_and_clear_bit(HNS3_GLOBAL_RESET, levels);
HNS3_CHECK_MERGE_CNT(tmp);
merge_cnt = tmp > 0 ? merge_cnt + 1 : merge_cnt;
tmp = hns3_test_and_clear_bit(HNS3_FUNC_RESET, levels);
HNS3_CHECK_MERGE_CNT(tmp);
merge_cnt = tmp > 0 ? merge_cnt + 1 : merge_cnt;
break;
case HNS3_GLOBAL_RESET:
hns3_atomic_clear_bit(HNS3_GLOBAL_RESET, levels);
tmp = hns3_test_and_clear_bit(HNS3_FUNC_RESET, levels);
HNS3_CHECK_MERGE_CNT(tmp);
merge_cnt = tmp > 0 ? merge_cnt + 1 : merge_cnt;
break;
case HNS3_FUNC_RESET:
hns3_atomic_clear_bit(HNS3_FUNC_RESET, levels);
@ -2546,19 +2540,19 @@ hns3_clear_reset_level(struct hns3_hw *hw, uint64_t *levels)
case HNS3_VF_RESET:
hns3_atomic_clear_bit(HNS3_VF_RESET, levels);
tmp = hns3_test_and_clear_bit(HNS3_VF_PF_FUNC_RESET, levels);
HNS3_CHECK_MERGE_CNT(tmp);
merge_cnt = tmp > 0 ? merge_cnt + 1 : merge_cnt;
tmp = hns3_test_and_clear_bit(HNS3_VF_FUNC_RESET, levels);
HNS3_CHECK_MERGE_CNT(tmp);
merge_cnt = tmp > 0 ? merge_cnt + 1 : merge_cnt;
break;
case HNS3_VF_FULL_RESET:
hns3_atomic_clear_bit(HNS3_VF_FULL_RESET, levels);
tmp = hns3_test_and_clear_bit(HNS3_VF_FUNC_RESET, levels);
HNS3_CHECK_MERGE_CNT(tmp);
merge_cnt = tmp > 0 ? merge_cnt + 1 : merge_cnt;
break;
case HNS3_VF_PF_FUNC_RESET:
hns3_atomic_clear_bit(HNS3_VF_PF_FUNC_RESET, levels);
tmp = hns3_test_and_clear_bit(HNS3_VF_FUNC_RESET, levels);
HNS3_CHECK_MERGE_CNT(tmp);
merge_cnt = tmp > 0 ? merge_cnt + 1 : merge_cnt;
break;
case HNS3_VF_FUNC_RESET:
hns3_atomic_clear_bit(HNS3_VF_FUNC_RESET, levels);
@ -2570,13 +2564,16 @@ hns3_clear_reset_level(struct hns3_hw *hw, uint64_t *levels)
default:
return;
};
if (merge_cnt != hw->reset.stats.merge_cnt)
if (merge_cnt != hw->reset.stats.merge_cnt) {
hns3_warn(hw,
"No need to do low-level reset after %s reset. "
"merge cnt: %" PRIu64 " total merge cnt: %" PRIu64,
reset_string[hw->reset.level],
hw->reset.stats.merge_cnt - merge_cnt,
hw->reset.stats.merge_cnt);
hw->reset.stats.merge_cnt = merge_cnt;
}
}
static bool

4
drivers/net/hns3/hns3_intr.h
View File

@ -170,7 +170,7 @@ struct hns3_hw_error_desc {
const struct hns3_hw_error *hw_err;
};
int hns3_enable_hw_error_intr(struct hns3_adapter *hns, bool state);
int hns3_enable_hw_error_intr(struct hns3_adapter *hns, bool en);
void hns3_handle_msix_error(struct hns3_adapter *hns, uint64_t *levels);
void hns3_handle_ras_error(struct hns3_adapter *hns, uint64_t *levels);
void hns3_config_mac_tnl_int(struct hns3_hw *hw, bool en);
@ -185,7 +185,7 @@ void hns3_schedule_reset(struct hns3_adapter *hns);
void hns3_schedule_delayed_reset(struct hns3_adapter *hns);
int hns3_reset_req_hw_reset(struct hns3_adapter *hns);
int hns3_reset_process(struct hns3_adapter *hns,
enum hns3_reset_level reset_level);
enum hns3_reset_level new_level);
void hns3_reset_abort(struct hns3_adapter *hns);
void hns3_start_report_lse(struct rte_eth_dev *dev);
void hns3_stop_report_lse(struct rte_eth_dev *dev);

4
drivers/net/hns3/hns3_regs.c
View File

@ -15,7 +15,7 @@
#define REG_NUM_PER_LINE 4
#define REG_LEN_PER_LINE (REG_NUM_PER_LINE * sizeof(uint32_t))
static int hns3_get_dfx_reg_line(struct hns3_hw *hw, uint32_t *length);
static int hns3_get_dfx_reg_line(struct hns3_hw *hw, uint32_t *lines);
static const uint32_t cmdq_reg_addrs[] = {HNS3_CMDQ_TX_ADDR_L_REG,
HNS3_CMDQ_TX_ADDR_H_REG,
@ -295,7 +295,7 @@ hns3_direct_access_regs(struct hns3_hw *hw, uint32_t *data)
uint32_t *origin_data_ptr = data;
uint32_t reg_offset;
uint16_t i, j;
int reg_num;
size_t reg_num;
/* fetching per-PF registers values from PF PCIe register space */
reg_num = sizeof(cmdq_reg_addrs) / sizeof(uint32_t);

2
drivers/net/hns3/hns3_rss.c
View File

@ -10,7 +10,7 @@
#include "hns3_logs.h"
/* Default hash keys */
const uint8_t hns3_hash_key[] = {
const uint8_t hns3_hash_key[HNS3_RSS_KEY_SIZE] = {
0x6D, 0x5A, 0x56, 0xDA, 0x25, 0x5B, 0x0E, 0xC2,
0x41, 0x67, 0x25, 0x3D, 0x43, 0xA3, 0x8F, 0xB0,
0xD0, 0xCA, 0x2B, 0xCB, 0xAE, 0x7B, 0x30, 0xB4,

2
drivers/net/hns3/hns3_rss.h
View File

@ -88,7 +88,7 @@ static inline uint32_t roundup_pow_of_two(uint32_t x)
return 1UL << fls(x - 1);
}
extern const uint8_t hns3_hash_key[];
extern const uint8_t hns3_hash_key[HNS3_RSS_KEY_SIZE];
struct hns3_adapter;

4
drivers/net/hns3/hns3_rxtx.c
View File

@ -2759,7 +2759,7 @@ hns3_rx_check_vec_support(__rte_unused struct rte_eth_dev *dev)
}
uint16_t __rte_weak
hns3_recv_pkts_vec(__rte_unused void *tx_queue,
hns3_recv_pkts_vec(__rte_unused void *rx_queue,
__rte_unused struct rte_mbuf **rx_pkts,
__rte_unused uint16_t nb_pkts)
{
@ -2767,7 +2767,7 @@ hns3_recv_pkts_vec(__rte_unused void *tx_queue,
}
uint16_t __rte_weak
hns3_recv_pkts_vec_sve(__rte_unused void *tx_queue,
hns3_recv_pkts_vec_sve(__rte_unused void *rx_queue,
__rte_unused struct rte_mbuf **rx_pkts,
__rte_unused uint16_t nb_pkts)
{

14
drivers/net/hns3/hns3_rxtx.h
View File

@ -691,10 +691,12 @@ int hns3_rxq_iterate(struct rte_eth_dev *dev,
int (*callback)(struct hns3_rx_queue *, void *), void *arg);
void hns3_dev_release_mbufs(struct hns3_adapter *hns);
int hns3_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t nb_desc,
unsigned int socket, const struct rte_eth_rxconf *conf,
unsigned int socket_id,
const struct rte_eth_rxconf *conf,
struct rte_mempool *mp);
int hns3_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t nb_desc,
unsigned int socket, const struct rte_eth_txconf *conf);
unsigned int socket_id,
const struct rte_eth_txconf *conf);
uint32_t hns3_rx_queue_count(void *rx_queue);
int hns3_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);
int hns3_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);
@ -704,9 +706,11 @@ uint16_t hns3_recv_pkts_simple(void *rx_queue, struct rte_mbuf **rx_pkts,
uint16_t nb_pkts);
uint16_t hns3_recv_scattered_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
uint16_t nb_pkts);
uint16_t hns3_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
uint16_t hns3_recv_pkts_vec(void *__restrict rx_queue,
struct rte_mbuf **__restrict rx_pkts,
uint16_t nb_pkts);
uint16_t hns3_recv_pkts_vec_sve(void *rx_queue, struct rte_mbuf **rx_pkts,
uint16_t hns3_recv_pkts_vec_sve(void *__restrict rx_queue,
struct rte_mbuf **__restrict rx_pkts,
uint16_t nb_pkts);
int hns3_rx_burst_mode_get(struct rte_eth_dev *dev,
__rte_unused uint16_t queue_id,
@ -751,7 +755,7 @@ void hns3_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
struct rte_eth_rxq_info *qinfo);
void hns3_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
struct rte_eth_txq_info *qinfo);
uint32_t hns3_get_tqp_reg_offset(uint16_t idx);
uint32_t hns3_get_tqp_reg_offset(uint16_t queue_id);
int hns3_start_all_txqs(struct rte_eth_dev *dev);
int hns3_start_all_rxqs(struct rte_eth_dev *dev);
void hns3_stop_all_txqs(struct rte_eth_dev *dev);

5
drivers/net/hns3/hns3_stats.h
View File

@ -145,7 +145,8 @@ struct hns3_reset_stats;
#define HNS3_IMISSED_STATS_FIELD_OFFSET(f) \
(offsetof(struct hns3_rx_missed_stats, f))
int hns3_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *rte_stats);
int hns3_stats_get(struct rte_eth_dev *eth_dev,
struct rte_eth_stats *rte_stats);
int hns3_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
unsigned int n);
int hns3_dev_xstats_reset(struct rte_eth_dev *dev);
@ -160,7 +161,7 @@ int hns3_dev_xstats_get_names_by_id(struct rte_eth_dev *dev,
const uint64_t *ids,
struct rte_eth_xstat_name *xstats_names,
uint32_t size);
int hns3_stats_reset(struct rte_eth_dev *dev);
int hns3_stats_reset(struct rte_eth_dev *eth_dev);
int hns3_stats_init(struct hns3_hw *hw);
void hns3_stats_uninit(struct hns3_hw *hw);
int hns3_query_mac_stats_reg_num(struct hns3_hw *hw);