raw/ifpga: add SEU error handler
Add SEU interrupt support for FPGA. Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com> Signed-off-by: Rosen Xu <rosen.xu@intel.com> Signed-off-by: Andy Pei <andy.pei@intel.com>
This commit is contained in:
Rosen Xu
Ferruh Yigit
parent
fc02b0bf7b
commit
82ce05d8ca
@ -27,6 +27,8 @@
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#include <rte_bus_vdev.h>
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#include "base/opae_hw_api.h"
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#include "base/opae_ifpga_hw_api.h"
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#include "base/ifpga_api.h"
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#include "rte_rawdev.h"
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#include "rte_rawdev_pmd.h"
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#include "rte_bus_ifpga.h"
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@ -604,6 +606,232 @@ static const struct rte_rawdev_ops ifpga_rawdev_ops = {
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.dev_selftest = NULL,
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};
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static int
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ifpga_get_fme_error_prop(struct opae_manager *mgr,
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u64 prop_id, u64 *val)
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{
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struct feature_prop prop;
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prop.feature_id = IFPGA_FME_FEATURE_ID_GLOBAL_ERR;
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prop.prop_id = prop_id;
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if (opae_manager_ifpga_get_prop(mgr, &prop))
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return -EINVAL;
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*val = prop.data;
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return 0;
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}
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static int
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ifpga_set_fme_error_prop(struct opae_manager *mgr,
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u64 prop_id, u64 val)
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{
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struct feature_prop prop;
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prop.feature_id = IFPGA_FME_FEATURE_ID_GLOBAL_ERR;
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prop.prop_id = prop_id;
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prop.data = val;
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if (opae_manager_ifpga_set_prop(mgr, &prop))
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return -EINVAL;
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return 0;
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}
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static int
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fme_err_read_seu_emr(struct opae_manager *mgr)
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{
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u64 val;
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int ret;
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ret = ifpga_get_fme_error_prop(mgr, FME_ERR_PROP_SEU_EMR_LOW, &val);
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if (ret)
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return -EINVAL;
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IFPGA_RAWDEV_PMD_INFO("seu emr low: 0x%" PRIx64 "\n", val);
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ret = ifpga_get_fme_error_prop(mgr, FME_ERR_PROP_SEU_EMR_HIGH, &val);
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if (ret)
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return -EINVAL;
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IFPGA_RAWDEV_PMD_INFO("seu emr high: 0x%" PRIx64 "\n", val);
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return 0;
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}
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static int fme_clear_warning_intr(struct opae_manager *mgr)
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{
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u64 val;
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if (ifpga_set_fme_error_prop(mgr, FME_ERR_PROP_INJECT_ERRORS, 0))
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return -EINVAL;
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if (ifpga_get_fme_error_prop(mgr, FME_ERR_PROP_NONFATAL_ERRORS, &val))
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return -EINVAL;
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if ((val & 0x40) != 0)
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IFPGA_RAWDEV_PMD_INFO("clean not done\n");
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return 0;
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}
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static int
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fme_err_handle_error0(struct opae_manager *mgr)
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{
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struct feature_fme_error0 fme_error0;
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u64 val;
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if (ifpga_get_fme_error_prop(mgr, FME_ERR_PROP_ERRORS, &val))
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return -EINVAL;
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fme_error0.csr = val;
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if (fme_error0.fabric_err)
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IFPGA_RAWDEV_PMD_ERR("Fabric error\n");
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else if (fme_error0.fabfifo_overflow)
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IFPGA_RAWDEV_PMD_ERR("Fabric fifo under/overflow error\n");
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else if (fme_error0.afu_acc_mode_err)
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IFPGA_RAWDEV_PMD_ERR("AFU PF/VF access mismatch detected\n");
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else if (fme_error0.pcie0cdc_parity_err)
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IFPGA_RAWDEV_PMD_ERR("PCIe0 CDC Parity Error\n");
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else if (fme_error0.cvlcdc_parity_err)
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IFPGA_RAWDEV_PMD_ERR("CVL CDC Parity Error\n");
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else if (fme_error0.fpgaseuerr)
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fme_err_read_seu_emr(mgr);
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/* clean the errors */
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if (ifpga_set_fme_error_prop(mgr, FME_ERR_PROP_ERRORS, val))
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return -EINVAL;
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return 0;
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}
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static int
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fme_err_handle_catfatal_error(struct opae_manager *mgr)
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{
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struct feature_fme_ras_catfaterror fme_catfatal;
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u64 val;
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if (ifpga_get_fme_error_prop(mgr, FME_ERR_PROP_CATFATAL_ERRORS, &val))
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return -EINVAL;
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fme_catfatal.csr = val;
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if (fme_catfatal.cci_fatal_err)
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IFPGA_RAWDEV_PMD_ERR("CCI error detected\n");
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else if (fme_catfatal.fabric_fatal_err)
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IFPGA_RAWDEV_PMD_ERR("Fabric fatal error detected\n");
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else if (fme_catfatal.pcie_poison_err)
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IFPGA_RAWDEV_PMD_ERR("Poison error from PCIe ports\n");
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else if (fme_catfatal.inject_fata_err)
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IFPGA_RAWDEV_PMD_ERR("Injected Fatal Error\n");
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else if (fme_catfatal.crc_catast_err)
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IFPGA_RAWDEV_PMD_ERR("a catastrophic EDCRC error\n");
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else if (fme_catfatal.injected_catast_err)
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IFPGA_RAWDEV_PMD_ERR("Injected Catastrophic Error\n");
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else if (fme_catfatal.bmc_seu_catast_err)
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fme_err_read_seu_emr(mgr);
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return 0;
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}
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static int
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fme_err_handle_nonfaterror(struct opae_manager *mgr)
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{
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struct feature_fme_ras_nonfaterror nonfaterr;
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u64 val;
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if (ifpga_get_fme_error_prop(mgr, FME_ERR_PROP_NONFATAL_ERRORS, &val))
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return -EINVAL;
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nonfaterr.csr = val;
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if (nonfaterr.temp_thresh_ap1)
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IFPGA_RAWDEV_PMD_INFO("Temperature threshold triggered AP1\n");
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else if (nonfaterr.temp_thresh_ap2)
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IFPGA_RAWDEV_PMD_INFO("Temperature threshold triggered AP2\n");
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else if (nonfaterr.pcie_error)
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IFPGA_RAWDEV_PMD_INFO("an error has occurred in pcie\n");
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else if (nonfaterr.portfatal_error)
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IFPGA_RAWDEV_PMD_INFO("fatal error occurred in AFU port.\n");
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else if (nonfaterr.proc_hot)
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IFPGA_RAWDEV_PMD_INFO("a ProcHot event\n");
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else if (nonfaterr.afu_acc_mode_err)
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IFPGA_RAWDEV_PMD_INFO("an AFU PF/VF access mismatch\n");
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else if (nonfaterr.injected_nonfata_err) {
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IFPGA_RAWDEV_PMD_INFO("Injected Warning Error\n");
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fme_clear_warning_intr(mgr);
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} else if (nonfaterr.temp_thresh_AP6)
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IFPGA_RAWDEV_PMD_INFO("Temperature threshold triggered AP6\n");
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else if (nonfaterr.power_thresh_AP1)
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IFPGA_RAWDEV_PMD_INFO("Power threshold triggered AP1\n");
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else if (nonfaterr.power_thresh_AP2)
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IFPGA_RAWDEV_PMD_INFO("Power threshold triggered AP2\n");
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else if (nonfaterr.mbp_err)
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IFPGA_RAWDEV_PMD_INFO("an MBP event\n");
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return 0;
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}
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static void
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fme_interrupt_handler(void *param)
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{
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struct opae_manager *mgr = (struct opae_manager *)param;
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IFPGA_RAWDEV_PMD_INFO("%s interrupt occurred\n", __func__);
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fme_err_handle_error0(mgr);
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fme_err_handle_nonfaterror(mgr);
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fme_err_handle_catfatal_error(mgr);
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}
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static struct rte_intr_handle fme_intr_handle;
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static int ifpga_register_fme_interrupt(struct opae_manager *mgr)
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{
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int ret;
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struct fpga_fme_err_irq_set err_irq_set;
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fme_intr_handle.type = RTE_INTR_HANDLE_VFIO_MSIX;
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ret = rte_intr_efd_enable(&fme_intr_handle, 1);
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if (ret)
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return -EINVAL;
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fme_intr_handle.fd = fme_intr_handle.efds[0];
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IFPGA_RAWDEV_PMD_DEBUG("vfio_dev_fd=%d, efd=%d, fd=%d\n",
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fme_intr_handle.vfio_dev_fd,
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fme_intr_handle.efds[0], fme_intr_handle.fd);
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err_irq_set.evtfd = fme_intr_handle.efds[0];
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ret = opae_manager_ifpga_set_err_irq(mgr, &err_irq_set);
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if (ret)
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return -EINVAL;
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/* register FME interrupt using DPDK API */
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ret = rte_intr_callback_register(&fme_intr_handle,
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fme_interrupt_handler,
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(void *)mgr);
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if (ret)
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return -EINVAL;
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IFPGA_RAWDEV_PMD_INFO("success register fme interrupt\n");
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return 0;
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}
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static int
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ifpga_unregister_fme_interrupt(struct opae_manager *mgr)
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{
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rte_intr_efd_disable(&fme_intr_handle);
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return rte_intr_callback_unregister(&fme_intr_handle,
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fme_interrupt_handler,
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(void *)mgr);
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}
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static int
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ifpga_rawdev_create(struct rte_pci_device *pci_dev,
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int socket_id)
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@ -652,6 +880,7 @@ ifpga_rawdev_create(struct rte_pci_device *pci_dev,
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}
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data->device_id = pci_dev->id.device_id;
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data->vendor_id = pci_dev->id.vendor_id;
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data->vfio_dev_fd = pci_dev->intr_handle.vfio_dev_fd;
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adapter = rawdev->dev_private;
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/* create a opae_adapter based on above device data */
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@ -677,6 +906,10 @@ ifpga_rawdev_create(struct rte_pci_device *pci_dev,
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IFPGA_RAWDEV_PMD_INFO("this is a PF function");
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}
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ret = ifpga_register_fme_interrupt(mgr);
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if (ret)
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goto free_adapter_data;
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return ret;
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free_adapter_data:
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@ -696,6 +929,7 @@ ifpga_rawdev_destroy(struct rte_pci_device *pci_dev)
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struct rte_rawdev *rawdev;
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char name[RTE_RAWDEV_NAME_MAX_LEN];
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struct opae_adapter *adapter;
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struct opae_manager *mgr;
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if (!pci_dev) {
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IFPGA_RAWDEV_PMD_ERR("Invalid pci_dev of the device!");
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@ -720,6 +954,13 @@ ifpga_rawdev_destroy(struct rte_pci_device *pci_dev)
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if (!adapter)
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return -ENODEV;
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mgr = opae_adapter_get_mgr(adapter);
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if (!mgr)
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return -ENODEV;
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if (ifpga_unregister_fme_interrupt(mgr))
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return -EINVAL;
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opae_adapter_data_free(adapter->data);
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opae_adapter_free(adapter);
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