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build: remove deprecated cpuflag macros

Browse Source 
Replace use of RTE_MACHINE_CPUFLAG macros with regular compiler
macros, which are more complete than those provided by DPDK, and as such
it allows new instruction sets to be leveraged without having to do
extra work to set them up in DPDK.

Signed-off-by: Sean Morrissey <sean.morrissey@intel.com>
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: David Marchand <david.marchand@redhat.com>
This commit is contained in:
Radu Nicolau 2020-09-24 08:18:29 +00:00 committed by David Marchand
parent 05e1af3052
commit 84fb33fec1
34 changed files with 55 additions and 68 deletions
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2
app/test-pmd/macswap.c
View File

@ -39,7 +39,7 @@
#include "testpmd.h"
#if defined(RTE_ARCH_X86)
#include "macswap_sse.h"
#elif defined(RTE_MACHINE_CPUFLAG_NEON)
#elif defined(__ARM_NEON)
#include "macswap_neon.h"
#else
#include "macswap.h"

8
app/test/test_memcpy_perf.c
View File

@ -51,13 +51,13 @@ static size_t buf_sizes[TEST_VALUE_RANGE];
#define TEST_BATCH_SIZE 100
/* Data is aligned on this many bytes (power of 2) */
#ifdef RTE_MACHINE_CPUFLAG_AVX512F
#ifdef __AVX512F__
#define ALIGNMENT_UNIT 64
#elif defined RTE_MACHINE_CPUFLAG_AVX2
#elif defined __AVX2__
#define ALIGNMENT_UNIT 32
#else /* RTE_MACHINE_CPUFLAG */
#else
#define ALIGNMENT_UNIT 16
#endif /* RTE_MACHINE_CPUFLAG */
#endif
/*
* Pointers used in performance tests. The two large buffers are for uncached

6
config/arm/meson.build
View File

@ -208,20 +208,14 @@ message(machine_args)
if (cc.get_define('__ARM_NEON', args: machine_args) != '' or
cc.get_define('__aarch64__', args: machine_args) != '')
dpdk_conf.set('RTE_MACHINE_CPUFLAG_NEON', 1)
compile_time_cpuflags += ['RTE_CPUFLAG_NEON']
endif
if cc.get_define('__ARM_FEATURE_CRC32', args: machine_args) != ''
dpdk_conf.set('RTE_MACHINE_CPUFLAG_CRC32', 1)
compile_time_cpuflags += ['RTE_CPUFLAG_CRC32']
endif
if cc.get_define('__ARM_FEATURE_CRYPTO', args: machine_args) != ''
dpdk_conf.set('RTE_MACHINE_CPUFLAG_AES', 1)
dpdk_conf.set('RTE_MACHINE_CPUFLAG_PMULL', 1)
dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA1', 1)
dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA2', 1)
compile_time_cpuflags += ['RTE_CPUFLAG_AES', 'RTE_CPUFLAG_PMULL',
'RTE_CPUFLAG_SHA1', 'RTE_CPUFLAG_SHA2']
endif

2
config/ppc/meson.build
View File

@ -21,5 +21,3 @@ endif
dpdk_conf.set('RTE_MAX_LCORE', 1536)
dpdk_conf.set('RTE_MAX_NUMA_NODES', 32)
dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
dpdk_conf.set('RTE_MACHINE_CPUFLAG_ALTIVEC', 1)
dpdk_conf.set('RTE_MACHINE_CPUFLAG_VSX', 1)

2
config/x86/meson.build
View File

@ -18,7 +18,6 @@ endif
base_flags = ['SSE', 'SSE2', 'SSE3','SSSE3', 'SSE4_1', 'SSE4_2']
foreach f:base_flags
dpdk_conf.set('RTE_MACHINE_CPUFLAG_' + f, 1)
compile_time_cpuflags += ['RTE_CPUFLAG_' + f]
endforeach
@ -32,7 +31,6 @@ foreach f:optional_flags
elif f == 'RDRND'
f = 'RDRAND'
endif
dpdk_conf.set('RTE_MACHINE_CPUFLAG_' + f, 1)
compile_time_cpuflags += ['RTE_CPUFLAG_' + f]
endif
endforeach

2
doc/guides/prog_guide/writing_efficient_code.rst
View File

@ -273,5 +273,3 @@ main() function and checks if the current machine is suitable for running the bi
Along with compiler optimizations,
a set of preprocessor defines are automatically added to the build process (regardless of the compiler version).
These defines correspond to the instruction sets that the target CPU should be able to support.
For example, a binary compiled for any SSE4.2-capable processor will have RTE_MACHINE_CPUFLAG_SSE4_2 defined,
thus enabling compile-time code path selection for different platforms.

5
doc/guides/rel_notes/deprecation.rst
View File

@ -17,11 +17,6 @@ Deprecation Notices
can be got using the ``pip``, or ``pip3``, tool for downloading python
packages.
* build macros: The macros defining RTE_MACHINE_CPUFLAG_* will be removed
from the build. The information provided by these macros is available
through standard compiler macros. For example, RTE_MACHINE_CPUFLAG_SSE3
duplicates the compiler-provided macro __SSE3__.
* kvargs: The function ``rte_kvargs_process`` will get a new parameter
for returning key match count. It will ease handling of no-match case.

4
doc/guides/rel_notes/release_20_11.rst
View File

@ -107,6 +107,10 @@ API Changes
Also, make sure to start the actual text at the margin.
=======================================================
* build macros: The macros defining ``RTE_MACHINE_CPUFLAG_*`` are removed.
The information provided by these macros is available through standard
compiler macros.
* eal: The ``rte_logs`` struct and global symbol was made private
and is no longer part of the API.

2
drivers/net/enic/meson.build
View File

@ -20,7 +20,7 @@ deps += ['hash']
includes += include_directories('base')
# The current implementation assumes 64-bit pointers
if dpdk_conf.has('RTE_MACHINE_CPUFLAG_AVX2') and dpdk_conf.get('RTE_ARCH_64')
if cc.get_define('__AVX2__', args: machine_args) != '' and dpdk_conf.get('RTE_ARCH_64')
sources += files('enic_rxtx_vec_avx2.c')
# Build the avx2 handler if the compiler supports it, even though 'machine'
# does not. This is to support users who build for the min supported machine

2
drivers/net/i40e/meson.build
View File

@ -31,7 +31,7 @@ if arch_subdir == 'x86'
# compile AVX2 version if either:
# a. we have AVX supported in minimum instruction set baseline
# b. it's not minimum instruction set, but supported by compiler
if dpdk_conf.has('RTE_MACHINE_CPUFLAG_AVX2')
if cc.get_define('__AVX2__', args: machine_args) != ''
cflags += ['-DCC_AVX2_SUPPORT']
sources += files('i40e_rxtx_vec_avx2.c')
elif cc.has_argument('-mavx2')

2
drivers/net/iavf/meson.build
View File

@ -21,7 +21,7 @@ if arch_subdir == 'x86'
# compile AVX2 version if either:
# a. we have AVX supported in minimum instruction set baseline
# b. it's not minimum instruction set, but supported by compiler
if dpdk_conf.has('RTE_MACHINE_CPUFLAG_AVX2')
if cc.get_define('__AVX2__', args: machine_args) != ''
cflags += ['-DCC_AVX2_SUPPORT']
sources += files('iavf_rxtx_vec_avx2.c')
elif cc.has_argument('-mavx2')

2
drivers/net/ice/meson.build
View File

@ -22,7 +22,7 @@ if arch_subdir == 'x86'
# compile AVX2 version if either:
# a. we have AVX supported in minimum instruction set baseline
# b. it's not minimum instruction set, but supported by compiler
if dpdk_conf.has('RTE_MACHINE_CPUFLAG_AVX2')
if cc.get_define('__AVX2__', args: machine_args) != ''
sources += files('ice_rxtx_vec_avx2.c')
elif cc.has_argument('-mavx2')
ice_avx2_lib = static_library('ice_avx2_lib',

2
drivers/net/ixgbe/ixgbe_ethdev.c
View File

@ -3960,7 +3960,7 @@ ixgbe_dev_supported_ptypes_get(struct rte_eth_dev *dev)
dev->rx_pkt_burst == ixgbe_recv_pkts_bulk_alloc)
return ptypes;
#if defined(RTE_ARCH_X86) || defined(RTE_MACHINE_CPUFLAG_NEON)
#if defined(RTE_ARCH_X86) || defined(__ARM_NEON)
if (dev->rx_pkt_burst == ixgbe_recv_pkts_vec ||
dev->rx_pkt_burst == ixgbe_recv_scattered_pkts_vec)
return ptypes;

2
examples/l3fwd/l3fwd.h
View File

@ -12,7 +12,7 @@
#define RTE_LOGTYPE_L3FWD RTE_LOGTYPE_USER1
#if !defined(NO_HASH_MULTI_LOOKUP) && defined(RTE_MACHINE_CPUFLAG_NEON)
#if !defined(NO_HASH_MULTI_LOOKUP) && defined(__ARM_NEON)
#define NO_HASH_MULTI_LOOKUP 1
#endif

16
examples/l3fwd/l3fwd_em.c
View File

@ -28,7 +28,7 @@
#include "l3fwd.h"
#include "l3fwd_event.h"
#if defined(RTE_ARCH_X86) || defined(RTE_MACHINE_CPUFLAG_CRC32)
#if defined(RTE_ARCH_X86) || defined(__ARM_FEATURE_CRC32)
#define EM_HASH_CRC 1
#endif
@ -215,7 +215,7 @@ static rte_xmm_t mask0;
static rte_xmm_t mask1;
static rte_xmm_t mask2;
#if defined(RTE_MACHINE_CPUFLAG_SSE2)
#if defined(__SSE2__)
static inline xmm_t
em_mask_key(void *key, xmm_t mask)
{
@ -223,7 +223,7 @@ em_mask_key(void *key, xmm_t mask)
return _mm_and_si128(data, mask);
}
#elif defined(RTE_MACHINE_CPUFLAG_NEON)
#elif defined(__ARM_NEON)
static inline xmm_t
em_mask_key(void *key, xmm_t mask)
{
@ -231,7 +231,7 @@ em_mask_key(void *key, xmm_t mask)
return vandq_s32(data, mask);
}
#elif defined(RTE_MACHINE_CPUFLAG_ALTIVEC)
#elif defined(__ALTIVEC__)
static inline xmm_t
em_mask_key(void *key, xmm_t mask)
{
@ -303,7 +303,7 @@ em_get_ipv6_dst_port(void *ipv6_hdr, uint16_t portid, void *lookup_struct)
return (ret < 0) ? portid : ipv6_l3fwd_out_if[ret];
}
#if defined RTE_ARCH_X86 || defined RTE_MACHINE_CPUFLAG_NEON
#if defined RTE_ARCH_X86 || defined __ARM_NEON
#if defined(NO_HASH_MULTI_LOOKUP)
#include "l3fwd_em_sequential.h"
#else
@ -685,7 +685,7 @@ em_main_loop(__rte_unused void *dummy)
if (nb_rx == 0)
continue;
#if defined RTE_ARCH_X86 || defined RTE_MACHINE_CPUFLAG_NEON
#if defined RTE_ARCH_X86 || defined __ARM_NEON
l3fwd_em_send_packets(nb_rx, pkts_burst,
portid, qconf);
#else
@ -723,7 +723,7 @@ em_event_loop_single(struct l3fwd_event_resources *evt_rsrc,
struct rte_mbuf *mbuf = ev.mbuf;
#if defined RTE_ARCH_X86 || defined RTE_MACHINE_CPUFLAG_NEON
#if defined RTE_ARCH_X86 || defined __ARM_NEON
mbuf->port = em_get_dst_port(lconf, mbuf, mbuf->port);
process_packet(mbuf, &mbuf->port);
#else
@ -784,7 +784,7 @@ em_event_loop_burst(struct l3fwd_event_resources *evt_rsrc,
continue;
}
#if defined RTE_ARCH_X86 || defined RTE_MACHINE_CPUFLAG_NEON
#if defined RTE_ARCH_X86 || defined __ARM_NEON
l3fwd_em_process_events(nb_deq, (struct rte_event **)&events,
lconf);
#else

2
examples/l3fwd/l3fwd_em_hlm.h
View File

@ -9,7 +9,7 @@
#if defined RTE_ARCH_X86
#include "l3fwd_sse.h"
#include "l3fwd_em_hlm_sse.h"
#elif defined RTE_MACHINE_CPUFLAG_NEON
#elif defined __ARM_NEON
#include "l3fwd_neon.h"
#include "l3fwd_em_hlm_neon.h"
#endif

2
examples/l3fwd/l3fwd_em_sequential.h
View File

@ -16,7 +16,7 @@
#if defined RTE_ARCH_X86
#include "l3fwd_sse.h"
#elif defined RTE_MACHINE_CPUFLAG_NEON
#elif defined __ARM_NEON
#include "l3fwd_neon.h"
#endif

6
examples/l3fwd/l3fwd_lpm.c
View File

@ -163,7 +163,7 @@ lpm_get_dst_port_with_ipv4(const struct lcore_conf *qconf, struct rte_mbuf *pkt,
#if defined(RTE_ARCH_X86)
#include "l3fwd_lpm_sse.h"
#elif defined RTE_MACHINE_CPUFLAG_NEON
#elif defined __ARM_NEON
#include "l3fwd_lpm_neon.h"
#elif defined(RTE_ARCH_PPC_64)
#include "l3fwd_lpm_altivec.h"
@ -240,7 +240,7 @@ lpm_main_loop(__rte_unused void *dummy)
if (nb_rx == 0)
continue;
#if defined RTE_ARCH_X86 || defined RTE_MACHINE_CPUFLAG_NEON \
#if defined RTE_ARCH_X86 || defined __ARM_NEON \
|| defined RTE_ARCH_PPC_64
l3fwd_lpm_send_packets(nb_rx, pkts_burst,
portid, qconf);
@ -259,7 +259,7 @@ lpm_process_event_pkt(const struct lcore_conf *lconf, struct rte_mbuf *mbuf)
{
mbuf->port = lpm_get_dst_port(lconf, mbuf, mbuf->port);
#if defined RTE_ARCH_X86 || defined RTE_MACHINE_CPUFLAG_NEON \
#if defined RTE_ARCH_X86 || defined __ARM_NEON \
|| defined RTE_ARCH_PPC_64
process_packet(mbuf, &mbuf->port);
#else

2
lib/librte_acl/meson.build
View File

@ -15,7 +15,7 @@ if dpdk_conf.has('RTE_ARCH_X86')
# in former case, just add avx2 C file to files list
# in latter case, compile c file to static lib, using correct compiler
# flags, and then have the .o file from static lib linked into main lib.
if dpdk_conf.has('RTE_MACHINE_CPUFLAG_AVX2')
if cc.get_define('__AVX2__', args: machine_args) != ''
sources += files('acl_run_avx2.c')
cflags += '-DCC_AVX2_SUPPORT'
elif cc.has_argument('-mavx2')

2
lib/librte_eal/arm/include/rte_memcpy_32.h
View File

@ -16,7 +16,7 @@ extern "C" {
#ifdef RTE_ARCH_ARM_NEON_MEMCPY
#ifndef RTE_MACHINE_CPUFLAG_NEON
#ifndef __ARM_NEON
#error "Cannot optimize memcpy by NEON as the CPU seems to not support this"
#endif

4
lib/librte_eal/common/rte_random.c
View File

@ -2,7 +2,7 @@
* Copyright(c) 2019 Ericsson AB
*/
#ifdef RTE_MACHINE_CPUFLAG_RDSEED
#ifdef __RDSEED__
#include <x86intrin.h>
#endif
#include <stdlib.h>
@ -188,7 +188,7 @@ __rte_random_initial_seed(void)
if (ge_rc == 0)
return ge_seed;
#endif
#ifdef RTE_MACHINE_CPUFLAG_RDSEED
#ifdef __RDSEED__
unsigned int rdseed_low;
unsigned int rdseed_high;

8
lib/librte_eal/x86/include/rte_memcpy.h
View File

@ -45,7 +45,7 @@ extern "C" {
static __rte_always_inline void *
rte_memcpy(void *dst, const void *src, size_t n);
#ifdef RTE_MACHINE_CPUFLAG_AVX512F
#ifdef __AVX512F__
#define ALIGNMENT_MASK 0x3F
@ -286,7 +286,7 @@ rte_memcpy_generic(void *dst, const void *src, size_t n)
goto COPY_BLOCK_128_BACK63;
}
#elif defined RTE_MACHINE_CPUFLAG_AVX2
#elif defined __AVX2__
#define ALIGNMENT_MASK 0x1F
@ -479,7 +479,7 @@ rte_memcpy_generic(void *dst, const void *src, size_t n)
goto COPY_BLOCK_128_BACK31;
}
#else /* RTE_MACHINE_CPUFLAG */
#else /* __AVX512F__ */
#define ALIGNMENT_MASK 0x0F
@ -803,7 +803,7 @@ rte_memcpy_generic(void *dst, const void *src, size_t n)
goto COPY_BLOCK_64_BACK15;
}
#endif /* RTE_MACHINE_CPUFLAG */
#endif /* __AVX512F__ */
static __rte_always_inline void *
rte_memcpy_aligned(void *dst, const void *src, size_t n)

2
lib/librte_efd/rte_efd_x86.h
View File

@ -19,7 +19,7 @@ efd_lookup_internal_avx2(const efd_hashfunc_t *group_hash_idx,
const efd_lookuptbl_t *group_lookup_table,
const uint32_t hash_val_a, const uint32_t hash_val_b)
{
#ifdef RTE_MACHINE_CPUFLAG_AVX2
#ifdef __AVX2__
efd_value_t value = 0;
uint32_t i = 0;
__m256i vhash_val_a = _mm256_set1_epi32(hash_val_a);

4
lib/librte_hash/rte_cuckoo_hash.c
View File

@ -1691,7 +1691,7 @@ compare_signatures(uint32_t *prim_hash_matches, uint32_t *sec_hash_matches,
/* For match mask the first bit of every two bits indicates the match */
switch (sig_cmp_fn) {
#if defined(RTE_MACHINE_CPUFLAG_SSE2)
#if defined(__SSE2__)
case RTE_HASH_COMPARE_SSE:
/* Compare all signatures in the bucket */
*prim_hash_matches = _mm_movemask_epi8(_mm_cmpeq_epi16(
@ -1704,7 +1704,7 @@ compare_signatures(uint32_t *prim_hash_matches, uint32_t *sec_hash_matches,
(__m128i const *)sec_bkt->sig_current),
_mm_set1_epi16(sig)));
break;
#elif defined(RTE_MACHINE_CPUFLAG_NEON)
#elif defined(__ARM_NEON)
case RTE_HASH_COMPARE_NEON: {
uint16x8_t vmat, vsig, x;
int16x8_t shift = {-15, -13, -11, -9, -7, -5, -3, -1};

2
lib/librte_hash/rte_hash_crc.h
View File

@ -424,7 +424,7 @@ crc32c_sse42_u64(uint64_t data, uint64_t init_val)
static uint8_t crc32_alg = CRC32_SW;
#if defined(RTE_ARCH_ARM64) && defined(RTE_MACHINE_CPUFLAG_CRC32)
#if defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRC32)
#include "rte_crc_arm64.h"
#else

4
lib/librte_hash/rte_thash.h
View File

@ -28,7 +28,7 @@ extern "C" {
#include <rte_ip.h>
#include <rte_common.h>
#if defined(RTE_ARCH_X86) || defined(RTE_MACHINE_CPUFLAG_NEON)
#if defined(RTE_ARCH_X86) || defined(__ARM_NEON)
#include <rte_vect.h>
#endif
@ -149,7 +149,7 @@ rte_thash_load_v6_addrs(const struct rte_ipv6_hdr *orig,
ipv6 = _mm_loadu_si128((const __m128i *)orig->dst_addr);
*(__m128i *)targ->v6.dst_addr =
_mm_shuffle_epi8(ipv6, rte_thash_ipv6_bswap_mask);
#elif defined(RTE_MACHINE_CPUFLAG_NEON)
#elif defined(__ARM_NEON)
uint8x16_t ipv6 = vld1q_u8((uint8_t const *)orig->src_addr);
vst1q_u8((uint8_t *)targ->v6.src_addr, vrev32q_u8(ipv6));
ipv6 = vld1q_u8((uint8_t const *)orig->dst_addr);

2
lib/librte_member/rte_member.h
View File

@ -68,7 +68,7 @@ typedef uint16_t member_set_t;
#define RTE_MEMBER_NAMESIZE 32
/** @internal Hash function used by membership library. */
#if defined(RTE_ARCH_X86) || defined(RTE_MACHINE_CPUFLAG_CRC32)
#if defined(RTE_ARCH_X86) || defined(__ARM_FEATURE_CRC32)
#include <rte_hash_crc.h>
#define MEMBER_HASH_FUNC rte_hash_crc
#else

10
lib/librte_member/rte_member_ht.c
View File

@ -176,7 +176,7 @@ rte_member_lookup_ht(const struct rte_member_setsum *ss,
get_buckets_index(ss, key, &prim_bucket, &sec_bucket, &tmp_sig);
switch (ss->sig_cmp_fn) {
#if defined(RTE_ARCH_X86) && defined(RTE_MACHINE_CPUFLAG_AVX2)
#if defined(RTE_ARCH_X86) && defined(__AVX2__)
case RTE_MEMBER_COMPARE_AVX2:
if (search_bucket_single_avx(prim_bucket, tmp_sig, buckets,
set_id) ||
@ -216,7 +216,7 @@ rte_member_lookup_bulk_ht(const struct rte_member_setsum *ss,
for (i = 0; i < num_keys; i++) {
switch (ss->sig_cmp_fn) {
#if defined(RTE_ARCH_X86) && defined(RTE_MACHINE_CPUFLAG_AVX2)
#if defined(RTE_ARCH_X86) && defined(__AVX2__)
case RTE_MEMBER_COMPARE_AVX2:
if (search_bucket_single_avx(prim_buckets[i],
tmp_sig[i], buckets, &set_id[i]) ||
@ -253,7 +253,7 @@ rte_member_lookup_multi_ht(const struct rte_member_setsum *ss,
get_buckets_index(ss, key, &prim_bucket, &sec_bucket, &tmp_sig);
switch (ss->sig_cmp_fn) {
#if defined(RTE_ARCH_X86) && defined(RTE_MACHINE_CPUFLAG_AVX2)
#if defined(RTE_ARCH_X86) && defined(__AVX2__)
case RTE_MEMBER_COMPARE_AVX2:
search_bucket_multi_avx(prim_bucket, tmp_sig, buckets,
&num_matches, match_per_key, set_id);
@ -296,7 +296,7 @@ rte_member_lookup_multi_bulk_ht(const struct rte_member_setsum *ss,
match_cnt_tmp = 0;
switch (ss->sig_cmp_fn) {
#if defined(RTE_ARCH_X86) && defined(RTE_MACHINE_CPUFLAG_AVX2)
#if defined(RTE_ARCH_X86) && defined(__AVX2__)
case RTE_MEMBER_COMPARE_AVX2:
search_bucket_multi_avx(prim_buckets[i], tmp_sig[i],
buckets, &match_cnt_tmp, match_per_key,
@ -357,7 +357,7 @@ try_update(struct member_ht_bucket *buckets, uint32_t prim, uint32_t sec,
enum rte_member_sig_compare_function cmp_fn)
{
switch (cmp_fn) {
#if defined(RTE_ARCH_X86) && defined(RTE_MACHINE_CPUFLAG_AVX2)
#if defined(RTE_ARCH_X86) && defined(__AVX2__)
case RTE_MEMBER_COMPARE_AVX2:
if (update_entry_search_avx(prim, sig, buckets, set_id) ||
update_entry_search_avx(sec, sig, buckets,

2
lib/librte_member/rte_member_x86.h
View File

@ -11,7 +11,7 @@ extern "C" {
#include <x86intrin.h>
#if defined(RTE_MACHINE_CPUFLAG_AVX2)
#if defined(__AVX2__)
static inline int
update_entry_search_avx(uint32_t bucket_id, member_sig_t tmp_sig,

4
lib/librte_net/rte_net_crc.c
View File

@ -10,9 +10,9 @@
#include <rte_common.h>
#include <rte_net_crc.h>
#if defined(RTE_ARCH_X86_64) && defined(RTE_MACHINE_CPUFLAG_PCLMULQDQ)
#if defined(RTE_ARCH_X86_64) && defined(__PCLMUL__)
#define X86_64_SSE42_PCLMULQDQ 1
#elif defined(RTE_ARCH_ARM64) && defined(RTE_MACHINE_CPUFLAG_PMULL)
#elif defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRYPTO)
#define ARM64_NEON_PMULL 1
#endif

2
lib/librte_node/ip4_lookup.c
View File

@ -30,7 +30,7 @@ struct ip4_lookup_node_main {
static struct ip4_lookup_node_main ip4_lookup_nm;
#if defined(RTE_MACHINE_CPUFLAG_NEON)
#if defined(__ARM_NEON)
#include "ip4_lookup_neon.h"
#elif defined(RTE_ARCH_X86)
#include "ip4_lookup_sse.h"

2
lib/librte_sched/rte_sched.c
View File

@ -29,7 +29,7 @@
#ifdef RTE_ARCH_X86
#define SCHED_VECTOR_SSE4
#elif defined(RTE_MACHINE_CPUFLAG_NEON)
#elif defined(__ARM_NEON)
#define SCHED_VECTOR_NEON
#endif

2
lib/librte_table/rte_lru_arm64.h
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@ -13,7 +13,7 @@ extern "C" {
#include <rte_vect.h>
#ifndef RTE_TABLE_HASH_LRU_STRATEGY
#ifdef RTE_MACHINE_CPUFLAG_NEON
#ifdef __ARM_NEON
#define RTE_TABLE_HASH_LRU_STRATEGY 3
#else /* if no NEON, use simple scalar version */
#define RTE_TABLE_HASH_LRU_STRATEGY 1

2
lib/librte_table/rte_table_hash_func.h
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@ -41,7 +41,7 @@ rte_crc32_u64(uint64_t crc, uint64_t v)
return _mm_crc32_u64(crc, v);
}
#elif defined(RTE_ARCH_ARM64) && defined(RTE_MACHINE_CPUFLAG_CRC32)
#elif defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRC32)
#include "rte_table_hash_func_arm64.h"
#else