net/enic: support scattered Rx
For performance reasons, this patch uses 2 VIC RQs per RQ presented to DPDK. The VIC requires that each descriptor be marked as either a start of packet (SOP) descriptor or a non-SOP descriptor. A one RQ solution requires skipping descriptors when receiving small packets and results in bad performance when receiving many small packets. The 2 RQ solution makes use of the VIC feature that allows a receive on primary queue to 'spill over' into another queue if the receive is too large to fit in the buffer assigned to the descriptor on the primary queue. This means that there is no skipping of descriptors when receiving small packets and results in much better performance. Signed-off-by: Nelson Escobar <neescoba@cisco.com> Reviewed-by: John Daley <johndale@cisco.com>
This commit is contained in:
Nelson Escobar
Bruce Richardson
parent
83a8805bbc
commit
856d7ba7ed
@ -94,7 +94,7 @@ Most of these differences are summarized below.
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Queue start/stop Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y
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MTU update Y Y Y Y Y Y Y Y Y Y Y Y Y
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Jumbo frame Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y
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Scattered Rx Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y
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Scattered Rx Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y
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LRO Y Y Y Y
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TSO Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y
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Promiscuous mode Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y
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@ -55,7 +55,7 @@ enum rq_enet_type_types {
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#define RQ_ENET_TYPE_BITS 2
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#define RQ_ENET_TYPE_MASK ((1 << RQ_ENET_TYPE_BITS) - 1)
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static inline void rq_enet_desc_enc(struct rq_enet_desc *desc,
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static inline void rq_enet_desc_enc(volatile struct rq_enet_desc *desc,
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u64 address, u8 type, u16 length)
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{
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desc->address = cpu_to_le64(address);
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@ -84,11 +84,12 @@ void vnic_rq_init_start(struct vnic_rq *rq, unsigned int cq_index,
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iowrite32(cq_index, &rq->ctrl->cq_index);
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iowrite32(error_interrupt_enable, &rq->ctrl->error_interrupt_enable);
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iowrite32(error_interrupt_offset, &rq->ctrl->error_interrupt_offset);
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iowrite32(0, &rq->ctrl->dropped_packet_count);
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iowrite32(0, &rq->ctrl->error_status);
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iowrite32(fetch_index, &rq->ctrl->fetch_index);
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iowrite32(posted_index, &rq->ctrl->posted_index);
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if (rq->is_sop)
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iowrite32(((rq->is_sop << 10) | rq->data_queue_idx),
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&rq->ctrl->data_ring);
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}
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void vnic_rq_init(struct vnic_rq *rq, unsigned int cq_index,
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@ -96,6 +97,7 @@ void vnic_rq_init(struct vnic_rq *rq, unsigned int cq_index,
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unsigned int error_interrupt_offset)
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{
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u32 fetch_index = 0;
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/* Use current fetch_index as the ring starting point */
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fetch_index = ioread32(&rq->ctrl->fetch_index);
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@ -110,6 +112,8 @@ void vnic_rq_init(struct vnic_rq *rq, unsigned int cq_index,
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error_interrupt_offset);
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rq->rxst_idx = 0;
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rq->tot_pkts = 0;
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rq->pkt_first_seg = NULL;
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rq->pkt_last_seg = NULL;
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}
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void vnic_rq_error_out(struct vnic_rq *rq, unsigned int error)
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@ -60,10 +60,18 @@ struct vnic_rq_ctrl {
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u32 pad7;
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u32 error_status; /* 0x48 */
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u32 pad8;
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u32 dropped_packet_count; /* 0x50 */
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u32 tcp_sn; /* 0x50 */
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u32 pad9;
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u32 dropped_packet_count_rc; /* 0x58 */
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u32 unused; /* 0x58 */
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u32 pad10;
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u32 dca_select; /* 0x60 */
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u32 pad11;
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u32 dca_value; /* 0x68 */
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u32 pad12;
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u32 data_ring; /* 0x70 */
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u32 pad13;
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u32 header_split; /* 0x78 */
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u32 pad14;
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};
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struct vnic_rq {
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@ -82,6 +90,12 @@ struct vnic_rq {
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struct rte_mempool *mp;
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uint16_t rxst_idx;
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uint32_t tot_pkts;
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uint16_t data_queue_idx;
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uint8_t is_sop;
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uint8_t in_use;
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struct rte_mbuf *pkt_first_seg;
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struct rte_mbuf *pkt_last_seg;
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unsigned int max_mbufs_per_pkt;
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};
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static inline unsigned int vnic_rq_desc_avail(struct vnic_rq *rq)
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@ -53,8 +53,11 @@
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#define DRV_COPYRIGHT "Copyright 2008-2015 Cisco Systems, Inc"
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#define ENIC_WQ_MAX 8
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#define ENIC_RQ_MAX 8
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#define ENIC_CQ_MAX (ENIC_WQ_MAX + ENIC_RQ_MAX)
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/* With Rx scatter support, we use two RQs on VIC per RQ used by app. Both
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* RQs use the same CQ.
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*/
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#define ENIC_RQ_MAX 16
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#define ENIC_CQ_MAX (ENIC_WQ_MAX + (ENIC_RQ_MAX / 2))
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#define ENIC_INTR_MAX (ENIC_CQ_MAX + 2)
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#define VLAN_ETH_HLEN 18
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@ -142,6 +145,21 @@ struct enic {
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struct enic_soft_stats soft_stats;
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};
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static inline unsigned int enic_sop_rq(unsigned int rq)
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{
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return rq * 2;
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}
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static inline unsigned int enic_data_rq(unsigned int rq)
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{
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return rq * 2 + 1;
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}
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static inline unsigned int enic_vnic_rq_count(struct enic *enic)
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{
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return enic->rq_count * 2;
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}
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static inline unsigned int enic_cq_rq(__rte_unused struct enic *enic, unsigned int rq)
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{
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return rq;
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@ -269,14 +269,18 @@ static int enicpmd_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
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struct enic *enic = pmd_priv(eth_dev);
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ENICPMD_FUNC_TRACE();
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if (queue_idx >= ENIC_RQ_MAX) {
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/* With Rx scatter support, two RQs are now used on VIC per RQ used
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* by the application.
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*/
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if (queue_idx * 2 >= ENIC_RQ_MAX) {
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dev_err(enic,
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"Max number of RX queues exceeded. Max is %d\n",
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"Max number of RX queues exceeded. Max is %d. This PMD uses 2 RQs on VIC per RQ used by DPDK.\n",
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ENIC_RQ_MAX);
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return -EINVAL;
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}
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eth_dev->data->rx_queues[queue_idx] = (void *)&enic->rq[queue_idx];
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eth_dev->data->rx_queues[queue_idx] =
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(void *)&enic->rq[enic_sop_rq(queue_idx)];
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ret = enic_alloc_rq(enic, queue_idx, socket_id, mp, nb_desc);
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if (ret) {
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@ -122,7 +122,7 @@ static void enic_log_q_error(struct enic *enic)
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error_status);
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}
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for (i = 0; i < enic->rq_count; i++) {
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for (i = 0; i < enic_vnic_rq_count(enic); i++) {
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error_status = vnic_rq_error_status(&enic->rq[i]);
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if (error_status)
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dev_err(enic, "RQ[%d] error_status %d\n", i,
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@ -235,13 +235,21 @@ void enic_init_vnic_resources(struct enic *enic)
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unsigned int error_interrupt_offset = 0;
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unsigned int index = 0;
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unsigned int cq_idx;
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struct vnic_rq *data_rq;
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for (index = 0; index < enic->rq_count; index++) {
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vnic_rq_init(&enic->rq[index],
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vnic_rq_init(&enic->rq[enic_sop_rq(index)],
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enic_cq_rq(enic, index),
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error_interrupt_enable,
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error_interrupt_offset);
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data_rq = &enic->rq[enic_data_rq(index)];
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if (data_rq->in_use)
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vnic_rq_init(data_rq,
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enic_cq_rq(enic, index),
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error_interrupt_enable,
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error_interrupt_offset);
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cq_idx = enic_cq_rq(enic, index);
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vnic_cq_init(&enic->cq[cq_idx],
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0 /* flow_control_enable */,
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@ -291,6 +299,9 @@ enic_alloc_rx_queue_mbufs(struct enic *enic, struct vnic_rq *rq)
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unsigned i;
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dma_addr_t dma_addr;
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if (!rq->in_use)
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return 0;
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dev_debug(enic, "queue %u, allocating %u rx queue mbufs\n", rq->index,
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rq->ring.desc_count);
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@ -304,18 +315,19 @@ enic_alloc_rx_queue_mbufs(struct enic *enic, struct vnic_rq *rq)
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dma_addr = (dma_addr_t)(mb->buf_physaddr
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+ RTE_PKTMBUF_HEADROOM);
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rq_enet_desc_enc(rqd, dma_addr, RQ_ENET_TYPE_ONLY_SOP,
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mb->buf_len - RTE_PKTMBUF_HEADROOM);
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rq_enet_desc_enc(rqd, dma_addr,
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(rq->is_sop ? RQ_ENET_TYPE_ONLY_SOP
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: RQ_ENET_TYPE_NOT_SOP),
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mb->buf_len - RTE_PKTMBUF_HEADROOM);
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rq->mbuf_ring[i] = mb;
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}
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/* make sure all prior writes are complete before doing the PIO write */
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rte_rmb();
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/* Post all but the last 2 cache lines' worth of descriptors */
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rq->posted_index = rq->ring.desc_count - (2 * RTE_CACHE_LINE_SIZE
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/ sizeof(struct rq_enet_desc));
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/* Post all but the last buffer to VIC. */
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rq->posted_index = rq->ring.desc_count - 1;
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rq->rx_nb_hold = 0;
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dev_debug(enic, "port=%u, qidx=%u, Write %u posted idx, %u sw held\n",
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@ -384,17 +396,28 @@ int enic_enable(struct enic *enic)
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"Flow director feature will not work\n");
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for (index = 0; index < enic->rq_count; index++) {
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err = enic_alloc_rx_queue_mbufs(enic, &enic->rq[index]);
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err = enic_alloc_rx_queue_mbufs(enic,
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&enic->rq[enic_sop_rq(index)]);
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if (err) {
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dev_err(enic, "Failed to alloc RX queue mbufs\n");
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dev_err(enic, "Failed to alloc sop RX queue mbufs\n");
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return err;
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}
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err = enic_alloc_rx_queue_mbufs(enic,
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&enic->rq[enic_data_rq(index)]);
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if (err) {
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/* release the allocated mbufs for the sop rq*/
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enic_rxmbuf_queue_release(enic,
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&enic->rq[enic_sop_rq(index)]);
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dev_err(enic, "Failed to alloc data RX queue mbufs\n");
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return err;
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}
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}
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for (index = 0; index < enic->wq_count; index++)
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vnic_wq_enable(&enic->wq[index]);
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enic_start_wq(enic, index);
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for (index = 0; index < enic->rq_count; index++)
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vnic_rq_enable(&enic->rq[index]);
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enic_start_rq(enic, index);
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vnic_dev_enable_wait(enic->vdev);
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@ -414,7 +437,7 @@ int enic_alloc_intr_resources(struct enic *enic)
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dev_info(enic, "vNIC resources used: "\
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"wq %d rq %d cq %d intr %d\n",
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enic->wq_count, enic->rq_count,
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enic->wq_count, enic_vnic_rq_count(enic),
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enic->cq_count, enic->intr_count);
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err = vnic_intr_alloc(enic->vdev, &enic->intr, 0);
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@ -426,19 +449,32 @@ int enic_alloc_intr_resources(struct enic *enic)
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void enic_free_rq(void *rxq)
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{
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struct vnic_rq *rq;
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struct vnic_rq *rq_sop, *rq_data;
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struct enic *enic;
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if (rxq == NULL)
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return;
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rq = (struct vnic_rq *)rxq;
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enic = vnic_dev_priv(rq->vdev);
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enic_rxmbuf_queue_release(enic, rq);
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rte_free(rq->mbuf_ring);
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rq->mbuf_ring = NULL;
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vnic_rq_free(rq);
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vnic_cq_free(&enic->cq[rq->index]);
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rq_sop = (struct vnic_rq *)rxq;
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enic = vnic_dev_priv(rq_sop->vdev);
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rq_data = &enic->rq[rq_sop->data_queue_idx];
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enic_rxmbuf_queue_release(enic, rq_sop);
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if (rq_data->in_use)
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enic_rxmbuf_queue_release(enic, rq_data);
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rte_free(rq_sop->mbuf_ring);
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if (rq_data->in_use)
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rte_free(rq_data->mbuf_ring);
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rq_sop->mbuf_ring = NULL;
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rq_data->mbuf_ring = NULL;
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vnic_rq_free(rq_sop);
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if (rq_data->in_use)
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vnic_rq_free(rq_data);
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vnic_cq_free(&enic->cq[rq_sop->index]);
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}
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void enic_start_wq(struct enic *enic, uint16_t queue_idx)
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@ -453,12 +489,32 @@ int enic_stop_wq(struct enic *enic, uint16_t queue_idx)
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void enic_start_rq(struct enic *enic, uint16_t queue_idx)
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{
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vnic_rq_enable(&enic->rq[queue_idx]);
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struct vnic_rq *rq_sop = &enic->rq[enic_sop_rq(queue_idx)];
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struct vnic_rq *rq_data = &enic->rq[rq_sop->data_queue_idx];
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if (rq_data->in_use)
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vnic_rq_enable(rq_data);
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rte_mb();
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vnic_rq_enable(rq_sop);
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}
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int enic_stop_rq(struct enic *enic, uint16_t queue_idx)
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{
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return vnic_rq_disable(&enic->rq[queue_idx]);
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int ret1 = 0, ret2 = 0;
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struct vnic_rq *rq_sop = &enic->rq[enic_sop_rq(queue_idx)];
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struct vnic_rq *rq_data = &enic->rq[rq_sop->data_queue_idx];
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ret2 = vnic_rq_disable(rq_sop);
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rte_mb();
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if (rq_data->in_use)
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ret1 = vnic_rq_disable(rq_data);
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if (ret2)
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return ret2;
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else
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return ret1;
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}
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int enic_alloc_rq(struct enic *enic, uint16_t queue_idx,
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@ -466,53 +522,141 @@ int enic_alloc_rq(struct enic *enic, uint16_t queue_idx,
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uint16_t nb_desc)
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{
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int rc;
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struct vnic_rq *rq = &enic->rq[queue_idx];
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uint16_t sop_queue_idx = enic_sop_rq(queue_idx);
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uint16_t data_queue_idx = enic_data_rq(queue_idx);
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struct vnic_rq *rq_sop = &enic->rq[sop_queue_idx];
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struct vnic_rq *rq_data = &enic->rq[data_queue_idx];
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unsigned int mbuf_size, mbufs_per_pkt;
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unsigned int nb_sop_desc, nb_data_desc;
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uint16_t min_sop, max_sop, min_data, max_data;
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rq->socket_id = socket_id;
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rq->mp = mp;
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rq_sop->is_sop = 1;
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rq_sop->data_queue_idx = data_queue_idx;
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rq_data->is_sop = 0;
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rq_data->data_queue_idx = 0;
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rq_sop->socket_id = socket_id;
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rq_sop->mp = mp;
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rq_data->socket_id = socket_id;
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rq_data->mp = mp;
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rq_sop->in_use = 1;
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if (nb_desc) {
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if (nb_desc > enic->config.rq_desc_count) {
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dev_warning(enic,
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"RQ %d - number of rx desc in cmd line (%d)"\
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"is greater than that in the UCSM/CIMC adapter"\
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"policy. Applying the value in the adapter "\
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"policy (%d).\n",
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queue_idx, nb_desc, enic->config.rq_desc_count);
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nb_desc = enic->config.rq_desc_count;
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}
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dev_info(enic, "RX Queues - effective number of descs:%d\n",
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nb_desc);
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mbuf_size = (uint16_t)(rte_pktmbuf_data_room_size(mp) -
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RTE_PKTMBUF_HEADROOM);
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if (enic->rte_dev->data->dev_conf.rxmode.enable_scatter) {
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dev_info(enic, "Scatter rx mode enabled\n");
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/* ceil((mtu + ETHER_HDR_LEN + 4)/mbuf_size) */
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mbufs_per_pkt = ((enic->config.mtu + ETHER_HDR_LEN + 4) +
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(mbuf_size - 1)) / mbuf_size;
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} else {
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dev_info(enic, "Scatter rx mode disabled\n");
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mbufs_per_pkt = 1;
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}
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/* Allocate queue resources */
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rc = vnic_rq_alloc(enic->vdev, rq, queue_idx,
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nb_desc, sizeof(struct rq_enet_desc));
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if (mbufs_per_pkt > 1) {
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dev_info(enic, "Scatter rx mode in use\n");
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rq_data->in_use = 1;
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} else {
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dev_info(enic, "Scatter rx mode not being used\n");
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rq_data->in_use = 0;
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}
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/* number of descriptors have to be a multiple of 32 */
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nb_sop_desc = (nb_desc / mbufs_per_pkt) & ~0x1F;
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nb_data_desc = (nb_desc - nb_sop_desc) & ~0x1F;
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||||
rq_sop->max_mbufs_per_pkt = mbufs_per_pkt;
|
||||
rq_data->max_mbufs_per_pkt = mbufs_per_pkt;
|
||||
|
||||
if (mbufs_per_pkt > 1) {
|
||||
min_sop = 64;
|
||||
max_sop = ((enic->config.rq_desc_count /
|
||||
(mbufs_per_pkt - 1)) & ~0x1F);
|
||||
min_data = min_sop * (mbufs_per_pkt - 1);
|
||||
max_data = enic->config.rq_desc_count;
|
||||
} else {
|
||||
min_sop = 64;
|
||||
max_sop = enic->config.rq_desc_count;
|
||||
min_data = 0;
|
||||
max_data = 0;
|
||||
}
|
||||
|
||||
if (nb_desc < (min_sop + min_data)) {
|
||||
dev_warning(enic,
|
||||
"Number of rx descs too low, adjusting to minimum\n");
|
||||
nb_sop_desc = min_sop;
|
||||
nb_data_desc = min_data;
|
||||
} else if (nb_desc > (max_sop + max_data)) {
|
||||
dev_warning(enic,
|
||||
"Number of rx_descs too high, adjusting to maximum\n");
|
||||
nb_sop_desc = max_sop;
|
||||
nb_data_desc = max_data;
|
||||
}
|
||||
if (mbufs_per_pkt > 1) {
|
||||
dev_info(enic, "For mtu %d and mbuf size %d valid rx descriptor range is %d to %d\n",
|
||||
enic->config.mtu, mbuf_size, min_sop + min_data,
|
||||
max_sop + max_data);
|
||||
}
|
||||
dev_info(enic, "Using %d rx descriptors (sop %d, data %d)\n",
|
||||
nb_sop_desc + nb_data_desc, nb_sop_desc, nb_data_desc);
|
||||
|
||||
/* Allocate sop queue resources */
|
||||
rc = vnic_rq_alloc(enic->vdev, rq_sop, sop_queue_idx,
|
||||
nb_sop_desc, sizeof(struct rq_enet_desc));
|
||||
if (rc) {
|
||||
dev_err(enic, "error in allocation of rq\n");
|
||||
dev_err(enic, "error in allocation of sop rq\n");
|
||||
goto err_exit;
|
||||
}
|
||||
nb_sop_desc = rq_sop->ring.desc_count;
|
||||
|
||||
if (rq_data->in_use) {
|
||||
/* Allocate data queue resources */
|
||||
rc = vnic_rq_alloc(enic->vdev, rq_data, data_queue_idx,
|
||||
nb_data_desc,
|
||||
sizeof(struct rq_enet_desc));
|
||||
if (rc) {
|
||||
dev_err(enic, "error in allocation of data rq\n");
|
||||
goto err_free_rq_sop;
|
||||
}
|
||||
nb_data_desc = rq_data->ring.desc_count;
|
||||
}
|
||||
rc = vnic_cq_alloc(enic->vdev, &enic->cq[queue_idx], queue_idx,
|
||||
socket_id, nb_desc,
|
||||
sizeof(struct cq_enet_rq_desc));
|
||||
socket_id, nb_sop_desc + nb_data_desc,
|
||||
sizeof(struct cq_enet_rq_desc));
|
||||
if (rc) {
|
||||
dev_err(enic, "error in allocation of cq for rq\n");
|
||||
goto err_free_rq_exit;
|
||||
goto err_free_rq_data;
|
||||
}
|
||||
|
||||
/* Allocate the mbuf ring */
|
||||
rq->mbuf_ring = (struct rte_mbuf **)rte_zmalloc_socket("rq->mbuf_ring",
|
||||
sizeof(struct rte_mbuf *) * nb_desc,
|
||||
RTE_CACHE_LINE_SIZE, rq->socket_id);
|
||||
/* Allocate the mbuf rings */
|
||||
rq_sop->mbuf_ring = (struct rte_mbuf **)
|
||||
rte_zmalloc_socket("rq->mbuf_ring",
|
||||
sizeof(struct rte_mbuf *) * nb_sop_desc,
|
||||
RTE_CACHE_LINE_SIZE, rq_sop->socket_id);
|
||||
if (rq_sop->mbuf_ring == NULL)
|
||||
goto err_free_cq;
|
||||
|
||||
if (rq->mbuf_ring != NULL)
|
||||
return 0;
|
||||
if (rq_data->in_use) {
|
||||
rq_data->mbuf_ring = (struct rte_mbuf **)
|
||||
rte_zmalloc_socket("rq->mbuf_ring",
|
||||
sizeof(struct rte_mbuf *) * nb_data_desc,
|
||||
RTE_CACHE_LINE_SIZE, rq_sop->socket_id);
|
||||
if (rq_data->mbuf_ring == NULL)
|
||||
goto err_free_sop_mbuf;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
err_free_sop_mbuf:
|
||||
rte_free(rq_sop->mbuf_ring);
|
||||
err_free_cq:
|
||||
/* cleanup on error */
|
||||
vnic_cq_free(&enic->cq[queue_idx]);
|
||||
err_free_rq_exit:
|
||||
vnic_rq_free(rq);
|
||||
err_free_rq_data:
|
||||
if (rq_data->in_use)
|
||||
vnic_rq_free(rq_data);
|
||||
err_free_rq_sop:
|
||||
vnic_rq_free(rq_sop);
|
||||
err_exit:
|
||||
return -ENOMEM;
|
||||
}
|
||||
@ -610,10 +754,12 @@ int enic_disable(struct enic *enic)
|
||||
if (err)
|
||||
return err;
|
||||
}
|
||||
for (i = 0; i < enic->rq_count; i++) {
|
||||
err = vnic_rq_disable(&enic->rq[i]);
|
||||
if (err)
|
||||
return err;
|
||||
for (i = 0; i < enic_vnic_rq_count(enic); i++) {
|
||||
if (enic->rq[i].in_use) {
|
||||
err = vnic_rq_disable(&enic->rq[i]);
|
||||
if (err)
|
||||
return err;
|
||||
}
|
||||
}
|
||||
|
||||
vnic_dev_set_reset_flag(enic->vdev, 1);
|
||||
@ -622,8 +768,9 @@ int enic_disable(struct enic *enic)
|
||||
for (i = 0; i < enic->wq_count; i++)
|
||||
vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
|
||||
|
||||
for (i = 0; i < enic->rq_count; i++)
|
||||
vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
|
||||
for (i = 0; i < enic_vnic_rq_count(enic); i++)
|
||||
if (enic->rq[i].in_use)
|
||||
vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
|
||||
for (i = 0; i < enic->cq_count; i++)
|
||||
vnic_cq_clean(&enic->cq[i]);
|
||||
vnic_intr_clean(&enic->intr);
|
||||
@ -828,9 +975,13 @@ int enic_set_vnic_res(struct enic *enic)
|
||||
struct rte_eth_dev *eth_dev = enic->rte_dev;
|
||||
int rc = 0;
|
||||
|
||||
if (enic->rq_count < eth_dev->data->nb_rx_queues) {
|
||||
dev_err(dev, "Not enough Receive queues. Requested:%u, Configured:%u\n",
|
||||
eth_dev->data->nb_rx_queues, enic->rq_count);
|
||||
/* With Rx scatter support, two RQs are now used per RQ used by
|
||||
* the application.
|
||||
*/
|
||||
if (enic->rq_count < (eth_dev->data->nb_rx_queues * 2)) {
|
||||
dev_err(dev, "Not enough Receive queues. Requested:%u which uses %d RQs on VIC, Configured:%u\n",
|
||||
eth_dev->data->nb_rx_queues,
|
||||
eth_dev->data->nb_rx_queues * 2, enic->rq_count);
|
||||
rc = -EINVAL;
|
||||
}
|
||||
if (enic->wq_count < eth_dev->data->nb_tx_queues) {
|
||||
|
||||
@ -196,8 +196,9 @@ void enic_free_vnic_resources(struct enic *enic)
|
||||
|
||||
for (i = 0; i < enic->wq_count; i++)
|
||||
vnic_wq_free(&enic->wq[i]);
|
||||
for (i = 0; i < enic->rq_count; i++)
|
||||
vnic_rq_free(&enic->rq[i]);
|
||||
for (i = 0; i < enic_vnic_rq_count(enic); i++)
|
||||
if (enic->rq[i].in_use)
|
||||
vnic_rq_free(&enic->rq[i]);
|
||||
for (i = 0; i < enic->cq_count; i++)
|
||||
vnic_cq_free(&enic->cq[i]);
|
||||
vnic_intr_free(&enic->intr);
|
||||
|
||||
@ -228,27 +228,34 @@ uint16_t
|
||||
enic_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
|
||||
uint16_t nb_pkts)
|
||||
{
|
||||
struct vnic_rq *rq = rx_queue;
|
||||
struct enic *enic = vnic_dev_priv(rq->vdev);
|
||||
unsigned int rx_id;
|
||||
struct vnic_rq *sop_rq = rx_queue;
|
||||
struct vnic_rq *data_rq;
|
||||
struct vnic_rq *rq;
|
||||
struct enic *enic = vnic_dev_priv(sop_rq->vdev);
|
||||
uint16_t cq_idx;
|
||||
uint16_t rq_idx;
|
||||
uint16_t rq_num;
|
||||
struct rte_mbuf *nmb, *rxmb;
|
||||
uint16_t nb_rx = 0, nb_err = 0;
|
||||
uint16_t nb_hold;
|
||||
uint16_t nb_rx = 0;
|
||||
struct vnic_cq *cq;
|
||||
volatile struct cq_desc *cqd_ptr;
|
||||
uint8_t color;
|
||||
uint16_t seg_length;
|
||||
struct rte_mbuf *first_seg = sop_rq->pkt_first_seg;
|
||||
struct rte_mbuf *last_seg = sop_rq->pkt_last_seg;
|
||||
|
||||
cq = &enic->cq[enic_cq_rq(enic, rq->index)];
|
||||
rx_id = cq->to_clean; /* index of cqd, rqd, mbuf_table */
|
||||
cqd_ptr = (struct cq_desc *)(cq->ring.descs) + rx_id;
|
||||
cq = &enic->cq[enic_cq_rq(enic, sop_rq->index)];
|
||||
cq_idx = cq->to_clean; /* index of cqd, rqd, mbuf_table */
|
||||
cqd_ptr = (struct cq_desc *)(cq->ring.descs) + cq_idx;
|
||||
|
||||
nb_hold = rq->rx_nb_hold; /* mbufs held by software */
|
||||
data_rq = &enic->rq[sop_rq->data_queue_idx];
|
||||
|
||||
while (nb_rx < nb_pkts) {
|
||||
volatile struct rq_enet_desc *rqd_ptr;
|
||||
dma_addr_t dma_addr;
|
||||
struct cq_desc cqd;
|
||||
uint8_t packet_error;
|
||||
uint16_t ciflags;
|
||||
|
||||
/* Check for pkts available */
|
||||
color = (cqd_ptr->type_color >> CQ_DESC_COLOR_SHIFT)
|
||||
@ -256,9 +263,13 @@ enic_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
|
||||
if (color == cq->last_color)
|
||||
break;
|
||||
|
||||
/* Get the cq descriptor and rq pointer */
|
||||
/* Get the cq descriptor and extract rq info from it */
|
||||
cqd = *cqd_ptr;
|
||||
rqd_ptr = (struct rq_enet_desc *)(rq->ring.descs) + rx_id;
|
||||
rq_num = cqd.q_number & CQ_DESC_Q_NUM_MASK;
|
||||
rq_idx = cqd.completed_index & CQ_DESC_COMP_NDX_MASK;
|
||||
|
||||
rq = &enic->rq[rq_num];
|
||||
rqd_ptr = ((struct rq_enet_desc *)rq->ring.descs) + rq_idx;
|
||||
|
||||
/* allocate a new mbuf */
|
||||
nmb = rte_mbuf_raw_alloc(rq->mp);
|
||||
@ -271,67 +282,102 @@ enic_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
|
||||
packet_error = enic_cq_rx_check_err(&cqd);
|
||||
|
||||
/* Get the mbuf to return and replace with one just allocated */
|
||||
rxmb = rq->mbuf_ring[rx_id];
|
||||
rq->mbuf_ring[rx_id] = nmb;
|
||||
rxmb = rq->mbuf_ring[rq_idx];
|
||||
rq->mbuf_ring[rq_idx] = nmb;
|
||||
|
||||
/* Increment cqd, rqd, mbuf_table index */
|
||||
rx_id++;
|
||||
if (unlikely(rx_id == rq->ring.desc_count)) {
|
||||
rx_id = 0;
|
||||
cq_idx++;
|
||||
if (unlikely(cq_idx == cq->ring.desc_count)) {
|
||||
cq_idx = 0;
|
||||
cq->last_color = cq->last_color ? 0 : 1;
|
||||
}
|
||||
|
||||
/* Prefetch next mbuf & desc while processing current one */
|
||||
cqd_ptr = (struct cq_desc *)(cq->ring.descs) + rx_id;
|
||||
cqd_ptr = (struct cq_desc *)(cq->ring.descs) + cq_idx;
|
||||
rte_enic_prefetch(cqd_ptr);
|
||||
rte_enic_prefetch(rq->mbuf_ring[rx_id]);
|
||||
rte_enic_prefetch((struct rq_enet_desc *)(rq->ring.descs)
|
||||
+ rx_id);
|
||||
|
||||
ciflags = enic_cq_rx_desc_ciflags(
|
||||
(struct cq_enet_rq_desc *)&cqd);
|
||||
|
||||
/* Push descriptor for newly allocated mbuf */
|
||||
dma_addr = (dma_addr_t)(nmb->buf_physaddr
|
||||
+ RTE_PKTMBUF_HEADROOM);
|
||||
rqd_ptr->address = rte_cpu_to_le_64(dma_addr);
|
||||
rqd_ptr->length_type = cpu_to_le16(nmb->buf_len
|
||||
- RTE_PKTMBUF_HEADROOM);
|
||||
dma_addr = (dma_addr_t)(nmb->buf_physaddr +
|
||||
RTE_PKTMBUF_HEADROOM);
|
||||
rq_enet_desc_enc(rqd_ptr, dma_addr,
|
||||
(rq->is_sop ? RQ_ENET_TYPE_ONLY_SOP
|
||||
: RQ_ENET_TYPE_NOT_SOP),
|
||||
nmb->buf_len - RTE_PKTMBUF_HEADROOM);
|
||||
|
||||
/* Drop incoming bad packet */
|
||||
if (unlikely(packet_error)) {
|
||||
rte_pktmbuf_free(rxmb);
|
||||
nb_err++;
|
||||
/* Fill in the rest of the mbuf */
|
||||
seg_length = enic_cq_rx_desc_n_bytes(&cqd);
|
||||
|
||||
if (rq->is_sop) {
|
||||
first_seg = rxmb;
|
||||
first_seg->nb_segs = 1;
|
||||
first_seg->pkt_len = seg_length;
|
||||
} else {
|
||||
first_seg->pkt_len = (uint16_t)(first_seg->pkt_len
|
||||
+ seg_length);
|
||||
first_seg->nb_segs++;
|
||||
last_seg->next = rxmb;
|
||||
}
|
||||
|
||||
rxmb->next = NULL;
|
||||
rxmb->port = enic->port_id;
|
||||
rxmb->data_len = seg_length;
|
||||
|
||||
rq->rx_nb_hold++;
|
||||
|
||||
if (!(enic_cq_rx_desc_eop(ciflags))) {
|
||||
last_seg = rxmb;
|
||||
continue;
|
||||
}
|
||||
|
||||
/* cq rx flags are only valid if eop bit is set */
|
||||
first_seg->packet_type = enic_cq_rx_flags_to_pkt_type(&cqd);
|
||||
enic_cq_rx_to_pkt_flags(&cqd, first_seg);
|
||||
|
||||
if (unlikely(packet_error)) {
|
||||
rte_pktmbuf_free(first_seg);
|
||||
rte_atomic64_inc(&enic->soft_stats.rx_packet_errors);
|
||||
continue;
|
||||
}
|
||||
|
||||
/* Fill in the rest of the mbuf */
|
||||
rxmb->data_off = RTE_PKTMBUF_HEADROOM;
|
||||
rxmb->nb_segs = 1;
|
||||
rxmb->next = NULL;
|
||||
rxmb->port = enic->port_id;
|
||||
rxmb->pkt_len = enic_cq_rx_desc_n_bytes(&cqd);
|
||||
rxmb->packet_type = enic_cq_rx_flags_to_pkt_type(&cqd);
|
||||
enic_cq_rx_to_pkt_flags(&cqd, rxmb);
|
||||
rxmb->data_len = rxmb->pkt_len;
|
||||
|
||||
/* prefetch mbuf data for caller */
|
||||
rte_packet_prefetch(RTE_PTR_ADD(rxmb->buf_addr,
|
||||
rte_packet_prefetch(RTE_PTR_ADD(first_seg->buf_addr,
|
||||
RTE_PKTMBUF_HEADROOM));
|
||||
|
||||
/* store the mbuf address into the next entry of the array */
|
||||
rx_pkts[nb_rx++] = rxmb;
|
||||
rx_pkts[nb_rx++] = first_seg;
|
||||
}
|
||||
|
||||
nb_hold += nb_rx + nb_err;
|
||||
cq->to_clean = rx_id;
|
||||
sop_rq->pkt_first_seg = first_seg;
|
||||
sop_rq->pkt_last_seg = last_seg;
|
||||
|
||||
cq->to_clean = cq_idx;
|
||||
|
||||
if ((sop_rq->rx_nb_hold + data_rq->rx_nb_hold) >
|
||||
sop_rq->rx_free_thresh) {
|
||||
if (data_rq->in_use) {
|
||||
data_rq->posted_index =
|
||||
enic_ring_add(data_rq->ring.desc_count,
|
||||
data_rq->posted_index,
|
||||
data_rq->rx_nb_hold);
|
||||
data_rq->rx_nb_hold = 0;
|
||||
}
|
||||
sop_rq->posted_index = enic_ring_add(sop_rq->ring.desc_count,
|
||||
sop_rq->posted_index,
|
||||
sop_rq->rx_nb_hold);
|
||||
sop_rq->rx_nb_hold = 0;
|
||||
|
||||
if (nb_hold > rq->rx_free_thresh) {
|
||||
rq->posted_index = enic_ring_add(rq->ring.desc_count,
|
||||
rq->posted_index, nb_hold);
|
||||
nb_hold = 0;
|
||||
rte_mb();
|
||||
iowrite32(rq->posted_index, &rq->ctrl->posted_index);
|
||||
if (data_rq->in_use)
|
||||
iowrite32(data_rq->posted_index,
|
||||
&data_rq->ctrl->posted_index);
|
||||
rte_compiler_barrier();
|
||||
iowrite32(sop_rq->posted_index, &sop_rq->ctrl->posted_index);
|
||||
}
|
||||
|
||||
rq->rx_nb_hold = nb_hold;
|
||||
|
||||
return nb_rx;
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user