examples: increase default ring sizes to 1024

Increase the default RX/TX ring sizes to 1024/1024 to
accommodate for NICs with higher throughput (25G, 40G etc)

Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
This commit is contained in:
Kevin Laatz 2018-01-12 10:48:44 +00:00 committed by Thomas Monjalon
parent 6c74ddeddf
commit 867a6c66ec
33 changed files with 66 additions and 66 deletions

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@ -91,8 +91,8 @@
/*
* Configurable number of RX/TX ring descriptors
*/
#define RTE_RX_DESC_DEFAULT 128
#define RTE_TX_DESC_DEFAULT 512
#define RTE_RX_DESC_DEFAULT 1024
#define RTE_TX_DESC_DEFAULT 1024
#define BOND_IP_1 7
#define BOND_IP_2 0

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@ -17,8 +17,8 @@
#include <rte_distributor.h>
#include <rte_pause.h>
#define RX_RING_SIZE 512
#define TX_RING_SIZE 512
#define RX_RING_SIZE 1024
#define TX_RING_SIZE 1024
#define NUM_MBUFS ((64*1024)-1)
#define MBUF_CACHE_SIZE 128
#define BURST_SIZE 64

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@ -20,8 +20,8 @@
#define MAX_PORTS RTE_MAX_ETHPORTS
#define MAX_BURST_LENGTH 32
#define PORT_RX_QUEUE_SIZE 128
#define PORT_TX_QUEUE_SIZE 256
#define PORT_RX_QUEUE_SIZE 1024
#define PORT_TX_QUEUE_SIZE 1024
#define PKTPOOL_EXTRA_SIZE 512
#define PKTPOOL_CACHE 32

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@ -65,10 +65,10 @@
#define MEMPOOL_CACHE_SZ PKT_BURST_SZ
/* Number of RX ring descriptors */
#define NB_RXD 128
#define NB_RXD 1024
/* Number of TX ring descriptors */
#define NB_TXD 512
#define NB_TXD 1024
/*
* RX and TX Prefetch, Host, and Write-back threshold values should be

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@ -15,8 +15,8 @@
#include <rte_flow_classify.h>
#include <rte_table_acl.h>
#define RX_RING_SIZE 128
#define TX_RING_SIZE 512
#define RX_RING_SIZE 1024
#define TX_RING_SIZE 1024
#define NUM_MBUFS 8191
#define MBUF_CACHE_SIZE 250

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@ -77,8 +77,8 @@
/*
* Configurable number of RX/TX ring descriptors
*/
#define RTE_TEST_RX_DESC_DEFAULT 128
#define RTE_TEST_TX_DESC_DEFAULT 512
#define RTE_TEST_RX_DESC_DEFAULT 1024
#define RTE_TEST_TX_DESC_DEFAULT 1024
static uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT;
static uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT;

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@ -88,8 +88,8 @@ static uint32_t max_flow_ttl = DEF_FLOW_TTL;
/*
* Configurable number of RX/TX ring descriptors
*/
#define RTE_TEST_RX_DESC_DEFAULT 128
#define RTE_TEST_TX_DESC_DEFAULT 512
#define RTE_TEST_RX_DESC_DEFAULT 1024
#define RTE_TEST_TX_DESC_DEFAULT 1024
static uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT;
static uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT;

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@ -78,8 +78,8 @@
/*
* Configurable number of RX/TX ring descriptors
*/
#define IPSEC_SECGW_RX_DESC_DEFAULT 128
#define IPSEC_SECGW_TX_DESC_DEFAULT 512
#define IPSEC_SECGW_RX_DESC_DEFAULT 1024
#define IPSEC_SECGW_TX_DESC_DEFAULT 1024
static uint16_t nb_rxd = IPSEC_SECGW_RX_DESC_DEFAULT;
static uint16_t nb_txd = IPSEC_SECGW_TX_DESC_DEFAULT;

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@ -74,8 +74,8 @@
/*
* Configurable number of RX/TX ring descriptors
*/
#define RTE_TEST_RX_DESC_DEFAULT 128
#define RTE_TEST_TX_DESC_DEFAULT 512
#define RTE_TEST_RX_DESC_DEFAULT 1024
#define RTE_TEST_TX_DESC_DEFAULT 1024
static uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT;
static uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT;

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@ -61,10 +61,10 @@
#define MEMPOOL_CACHE_SZ PKT_BURST_SZ
/* Number of RX ring descriptors */
#define NB_RXD 128
#define NB_RXD 1024
/* Number of TX ring descriptors */
#define NB_TXD 512
#define NB_TXD 1024
/* Total octets in ethernet header */
#define KNI_ENET_HEADER_SIZE 14

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@ -69,8 +69,8 @@ enum cdev_type {
/*
* Configurable number of RX/TX ring descriptors
*/
#define RTE_TEST_RX_DESC_DEFAULT 128
#define RTE_TEST_TX_DESC_DEFAULT 512
#define RTE_TEST_RX_DESC_DEFAULT 1024
#define RTE_TEST_TX_DESC_DEFAULT 1024
static uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT;
static uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT;

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@ -46,8 +46,8 @@
/*
* Configurable number of RX/TX ring descriptors
*/
#define RTE_TEST_RX_DESC_DEFAULT 128
#define RTE_TEST_TX_DESC_DEFAULT 512
#define RTE_TEST_RX_DESC_DEFAULT 1024
#define RTE_TEST_TX_DESC_DEFAULT 1024
static uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT;
static uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT;

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@ -52,8 +52,8 @@
/*
* Configurable number of RX/TX ring descriptors
*/
#define RTE_TEST_RX_DESC_DEFAULT 128
#define RTE_TEST_TX_DESC_DEFAULT 512
#define RTE_TEST_RX_DESC_DEFAULT 1024
#define RTE_TEST_TX_DESC_DEFAULT 1024
static uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT;
static uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT;

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@ -53,8 +53,8 @@ static int mac_updating = 1;
/*
* Configurable number of RX/TX ring descriptors
*/
#define RTE_TEST_RX_DESC_DEFAULT 128
#define RTE_TEST_TX_DESC_DEFAULT 512
#define RTE_TEST_RX_DESC_DEFAULT 1024
#define RTE_TEST_TX_DESC_DEFAULT 1024
static uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT;
static uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT;

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@ -76,8 +76,8 @@
/*
* Configurable number of RX/TX ring descriptors
*/
#define RTE_TEST_RX_DESC_DEFAULT 128
#define RTE_TEST_TX_DESC_DEFAULT 512
#define RTE_TEST_RX_DESC_DEFAULT 1024
#define RTE_TEST_TX_DESC_DEFAULT 1024
static uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT;
static uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT;

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@ -112,8 +112,8 @@
/*
* Configurable number of RX/TX ring descriptors
*/
#define RTE_TEST_RX_DESC_DEFAULT 512
#define RTE_TEST_TX_DESC_DEFAULT 512
#define RTE_TEST_RX_DESC_DEFAULT 1024
#define RTE_TEST_TX_DESC_DEFAULT 1024
static uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT;
static uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT;

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@ -106,8 +106,8 @@
/*
* Configurable number of RX/TX ring descriptors
*/
#define RTE_TEST_RX_DESC_DEFAULT 128
#define RTE_TEST_TX_DESC_DEFAULT 512
#define RTE_TEST_RX_DESC_DEFAULT 1024
#define RTE_TEST_TX_DESC_DEFAULT 1024
static uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT;
static uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT;

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@ -50,8 +50,8 @@
/*
* Configurable number of RX/TX ring descriptors
*/
#define RTE_TEST_RX_DESC_DEFAULT 128
#define RTE_TEST_TX_DESC_DEFAULT 512
#define RTE_TEST_RX_DESC_DEFAULT 1024
#define RTE_TEST_TX_DESC_DEFAULT 1024
#define MAX_TX_QUEUE_PER_PORT RTE_MAX_ETHPORTS
#define MAX_RX_QUEUE_PER_PORT 128

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@ -47,8 +47,8 @@
/*
* Configurable number of RX/TX ring descriptors
*/
#define RTE_TEST_RX_DESC_DEFAULT 128
#define RTE_TEST_TX_DESC_DEFAULT 512
#define RTE_TEST_RX_DESC_DEFAULT 1024
#define RTE_TEST_TX_DESC_DEFAULT 1024
static uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT;
static uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT;

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@ -41,8 +41,8 @@
#define MBUFS_PER_PORT 1536
#define MBUF_CACHE_SIZE 512
#define RTE_MP_RX_DESC_DEFAULT 512
#define RTE_MP_TX_DESC_DEFAULT 512
#define RTE_MP_RX_DESC_DEFAULT 1024
#define RTE_MP_TX_DESC_DEFAULT 1024
#define CLIENT_QUEUE_RINGSIZE 128
#define NO_FLAGS 0

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@ -68,8 +68,8 @@ enum l2fwd_cmd{
/*
* Configurable number of RX/TX ring descriptors
*/
#define RTE_TEST_RX_DESC_DEFAULT 128
#define RTE_TEST_TX_DESC_DEFAULT 512
#define RTE_TEST_RX_DESC_DEFAULT 1024
#define RTE_TEST_TX_DESC_DEFAULT 1024
static uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT;
static uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT;

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@ -48,8 +48,8 @@
#define NB_MBUFS 64*1024 /* use 64k mbufs */
#define MBUF_CACHE_SIZE 256
#define PKT_BURST 32
#define RX_RING_SIZE 128
#define TX_RING_SIZE 512
#define RX_RING_SIZE 1024
#define TX_RING_SIZE 1024
#define PARAM_PROC_ID "proc-id"
#define PARAM_NUM_PROCS "num-procs"

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@ -16,8 +16,8 @@
#include <rte_ring.h>
#include <rte_reorder.h>
#define RX_DESC_PER_QUEUE 128
#define TX_DESC_PER_QUEUE 512
#define RX_DESC_PER_QUEUE 1024
#define TX_DESC_PER_QUEUE 1024
#define MAX_PKTS_BURST 32
#define REORDER_BUFFER_SIZE 8192

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@ -181,8 +181,8 @@ cb_parse_ptype(__rte_unused uint16_t port, __rte_unused uint16_t queue,
/*
* Configurable number of RX/TX ring descriptors
*/
#define RTE_TEST_RX_DESC_DEFAULT 128
#define RTE_TEST_TX_DESC_DEFAULT 128
#define RTE_TEST_RX_DESC_DEFAULT 1024
#define RTE_TEST_TX_DESC_DEFAULT 1024
static uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT;
static uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT;

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@ -20,8 +20,8 @@
#include <sys/time.h>
#include <getopt.h>
#define RX_RING_SIZE 128
#define TX_RING_SIZE 512
#define RX_RING_SIZE 1024
#define TX_RING_SIZE 1024
#define NUM_MBUFS 8191
#define MBUF_CACHE_SIZE 250

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@ -71,8 +71,8 @@ static struct rte_eth_conf port_conf = {
},
};
#define NIC_RX_QUEUE_DESC 128
#define NIC_TX_QUEUE_DESC 512
#define NIC_RX_QUEUE_DESC 1024
#define NIC_TX_QUEUE_DESC 1024
#define NIC_RX_QUEUE 0
#define NIC_TX_QUEUE 0

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@ -18,8 +18,8 @@ extern "C" {
*/
#define APP_INTERACTIVE_DEFAULT 0
#define APP_RX_DESC_DEFAULT 128
#define APP_TX_DESC_DEFAULT 256
#define APP_RX_DESC_DEFAULT 1024
#define APP_TX_DESC_DEFAULT 1024
#define APP_RING_SIZE (8*1024)
#define NB_MBUF (2*1024*1024)

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@ -8,8 +8,8 @@
#define RING_SIZE 1024
#define MAX_PKT_QUOTA 64
#define RX_DESC_PER_QUEUE 128
#define TX_DESC_PER_QUEUE 512
#define RX_DESC_PER_QUEUE 1024
#define TX_DESC_PER_QUEUE 1024
#define MBUF_DATA_SIZE RTE_MBUF_DEFAULT_BUF_SIZE
#define MBUF_PER_POOL 8192

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@ -10,8 +10,8 @@
#include <rte_lcore.h>
#include <rte_mbuf.h>
#define RX_RING_SIZE 128
#define TX_RING_SIZE 512
#define RX_RING_SIZE 1024
#define TX_RING_SIZE 1024
#define NUM_MBUFS 8191
#define MBUF_CACHE_SIZE 250

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@ -10,8 +10,8 @@
#include <rte_lcore.h>
#include <rte_mbuf.h>
#define RX_RING_SIZE 128
#define TX_RING_SIZE 512
#define RX_RING_SIZE 1024
#define TX_RING_SIZE 1024
#define NUM_MBUFS 8191
#define MBUF_CACHE_SIZE 250

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@ -33,8 +33,8 @@
#include <rte_pmd_i40e.h>
#include <rte_pmd_bnxt.h>
#define RX_RING_SIZE 512
#define TX_RING_SIZE 512
#define RX_RING_SIZE 1024
#define TX_RING_SIZE 1024
#define NUM_MBUFS 8191
#define MBUF_CACHE_SIZE 250

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@ -48,8 +48,8 @@
/*
* Configurable number of RX/TX ring descriptors
*/
#define RTE_TEST_RX_DESC_DEFAULT 128
#define RTE_TEST_TX_DESC_DEFAULT 512
#define RTE_TEST_RX_DESC_DEFAULT 1024
#define RTE_TEST_TX_DESC_DEFAULT 1024
#define INVALID_PORT_ID 0xFF

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@ -49,8 +49,8 @@
/*
* Configurable number of RX/TX ring descriptors
*/
#define RTE_TEST_RX_DESC_DEFAULT 128
#define RTE_TEST_TX_DESC_DEFAULT 512
#define RTE_TEST_RX_DESC_DEFAULT 1024
#define RTE_TEST_TX_DESC_DEFAULT 1024
#define INVALID_PORT_ID 0xFF