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eal: define generic vector types

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Add common vector type definitions to all CPU architectures.

Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Acked-by: Chao Zhu <chaozhu@linux.vnet.ibm.com>
This commit is contained in:
Nelio Laranjeiro 2016-11-16 16:20:38 +01:00 committed by Thomas Monjalon
parent c6dab2a873
commit 86c743cf91
7 changed files with 260 additions and 3 deletions
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1
doc/api/doxy-api-index.md
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@ -68,6 +68,7 @@ There are many libraries, so their headers may be grouped by topics:
- **CPU arch**:
[branch prediction] (@ref rte_branch_prediction.h),
[cache prefetch] (@ref rte_prefetch.h),
[SIMD] (@ref rte_vect.h),
[byte order] (@ref rte_byteorder.h),
[CPU flags] (@ref rte_cpuflags.h)

1
lib/librte_eal/common/Makefile
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@ -44,6 +44,7 @@ INC += rte_malloc.h rte_keepalive.h rte_time.h
GENERIC_INC := rte_atomic.h rte_byteorder.h rte_cycles.h rte_prefetch.h
GENERIC_INC += rte_spinlock.h rte_memcpy.h rte_cpuflags.h rte_rwlock.h
GENERIC_INC += rte_vect.h
# defined in mk/arch/$(RTE_ARCH)/rte.vars.mk
ARCH_DIR ?= $(RTE_ARCH)
ARCH_INC := $(notdir $(wildcard $(RTE_SDK)/lib/librte_eal/common/include/arch/$(ARCH_DIR)/*.h))

1
lib/librte_eal/common/include/arch/arm/rte_vect.h
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@ -34,6 +34,7 @@
#define _RTE_VECT_ARM_H_
#include <stdint.h>
#include "generic/rte_vect.h"
#include "arm_neon.h"
#ifdef __cplusplus

1
lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
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@ -34,6 +34,7 @@
#define _RTE_VECT_PPC_64_H_
#include <altivec.h>
#include "generic/rte_vect.h"
#ifdef __cplusplus
extern "C" {

38
lib/librte_eal/common/include/arch/tile/rte_vect.h Normal file
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@ -0,0 +1,38 @@
/*-
* BSD LICENSE
*
* Copyright 2016 6WIND S.A.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of 6WIND S.A. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _RTE_VECT_TILE_H_
#define _RTE_VECT_TILE_H_
#include "generic/rte_vect.h"
#endif /* _RTE_VECT_TILE_H_ */

7
lib/librte_eal/common/include/arch/x86/rte_vect.h
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@ -31,8 +31,8 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _RTE_VECT_H_
#define _RTE_VECT_H_
#ifndef _RTE_VECT_X86_H_
#define _RTE_VECT_X86_H_
/**
* @file
@ -41,6 +41,7 @@
*/
#include <stdint.h>
#include "generic/rte_vect.h"
#if (defined(__ICC) || (__GNUC__ == 4 && __GNUC_MINOR__ < 4))
@ -133,4 +134,4 @@ __extension__ ({ \
}
#endif
#endif /* _RTE_VECT_H_ */
#endif /* _RTE_VECT_X86_H_ */

214
lib/librte_eal/common/include/generic/rte_vect.h Normal file
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@ -0,0 +1,214 @@
/*-
* BSD LICENSE
*
* Copyright 2016 6WIND S.A.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of 6WIND S.A. nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _RTE_VECT_H_
#define _RTE_VECT_H_
/**
* @file
* SIMD vector types
*
* This file defines types to use vector instructions with generic C code.
*/
#include <stdint.h>
/* Unsigned vector types */
/**
* 64 bits vector size to use with unsigned 8 bits elements.
*
* a = (rte_v64u8_t){ a0, a1, a2, a3, a4, a5, a6, a7 }
*/
typedef uint8_t rte_v64u8_t __attribute__((vector_size(8), aligned(8)));
/**
* 64 bits vector size to use with unsigned 16 bits elements.
*
* a = (rte_v64u16_t){ a0, a1, a2, a3 }
*/
typedef uint16_t rte_v64u16_t __attribute__((vector_size(8), aligned(8)));
/**
* 64 bits vector size to use with unsigned 32 bits elements.
*
* a = (rte_v64u32_t){ a0, a1 }
*/
typedef uint32_t rte_v64u32_t __attribute__((vector_size(8), aligned(8)));
/**
* 128 bits vector size to use with unsigned 8 bits elements.
*
* a = (rte_v128u8_t){ a00, a01, a02, a03, a04, a05, a06, a07,
* a08, a09, a10, a11, a12, a13, a14, a15 }
*/
typedef uint8_t rte_v128u8_t __attribute__((vector_size(16), aligned(16)));
/**
* 128 bits vector size to use with unsigned 16 bits elements.
*
* a = (rte_v128u16_t){ a0, a1, a2, a3, a4, a5, a6, a7 }
*/
typedef uint16_t rte_v128u16_t __attribute__((vector_size(16), aligned(16)));
/**
* 128 bits vector size to use with unsigned 32 bits elements.
*
* a = (rte_v128u32_t){ a0, a1, a2, a3, a4 }
*/
typedef uint32_t rte_v128u32_t __attribute__((vector_size(16), aligned(16)));
/**
* 128 bits vector size to use with unsigned 64 bits elements.
*
* a = (rte_v128u64_t){ a0, a1 }
*/
typedef uint64_t rte_v128u64_t __attribute__((vector_size(16), aligned(16)));
/**
* 256 bits vector size to use with unsigned 8 bits elements.
*
* a = (rte_v256u8_t){ a00, a01, a02, a03, a04, a05, a06, a07,
* a08, a09, a10, a11, a12, a13, a14, a15,
* a16, a17, a18, a19, a20, a21, a22, a23,
* a24, a25, a26, a27, a28, a29, a30, a31 }
*/
typedef uint8_t rte_v256u8_t __attribute__((vector_size(32), aligned(32)));
/**
* 256 bits vector size to use with unsigned 16 bits elements.
*
* a = (rte_v256u16_t){ a00, a01, a02, a03, a04, a05, a06, a07,
* a08, a09, a10, a11, a12, a13, a14, a15 }
*/
typedef uint16_t rte_v256u16_t __attribute__((vector_size(32), aligned(32)));
/**
* 256 bits vector size to use with unsigned 32 bits elements.
*
* a = (rte_v256u32_t){ a0, a1, a2, a3, a4, a5, a6, a7 }
*/
typedef uint32_t rte_v256u32_t __attribute__((vector_size(32), aligned(32)));
/**
* 256 bits vector size to use with unsigned 64 bits elements.
*
* a = (rte_v256u64_t){ a0, a1, a2, a3 }
*/
typedef uint64_t rte_v256u64_t __attribute__((vector_size(32), aligned(32)));
/* Signed vector types */
/**
* 64 bits vector size to use with 8 bits elements.
*
* a = (rte_v64s8_t){ a0, a1, a2, a3, a4, a5, a6, a7 }
*/
typedef int8_t rte_v64s8_t __attribute__((vector_size(8), aligned(8)));
/**
* 64 bits vector size to use with 16 bits elements.
*
* a = (rte_v64s16_t){ a0, a1, a2, a3 }
*/
typedef int16_t rte_v64s16_t __attribute__((vector_size(8), aligned(8)));
/**
* 64 bits vector size to use with 32 bits elements.
*
* a = (rte_v64s32_t){ a0, a1 }
*/
typedef int32_t rte_v64s32_t __attribute__((vector_size(8), aligned(8)));
/**
* 128 bits vector size to use with 8 bits elements.
*
* a = (rte_v128s8_t){ a00, a01, a02, a03, a04, a05, a06, a07,
* a08, a09, a10, a11, a12, a13, a14, a15 }
*/
typedef int8_t rte_v128s8_t __attribute__((vector_size(16), aligned(16)));
/**
* 128 bits vector size to use with 16 bits elements.
*
* a = (rte_v128s16_t){ a0, a1, a2, a3, a4, a5, a6, a7 }
*/
typedef int16_t rte_v128s16_t __attribute__((vector_size(16), aligned(16)));
/**
* 128 bits vector size to use with 32 bits elements.
*
* a = (rte_v128s32_t){ a0, a1, a2, a3 }
*/
typedef int32_t rte_v128s32_t __attribute__((vector_size(16), aligned(16)));
/**
* 128 bits vector size to use with 64 bits elements.
*
* a = (rte_v128s64_t){ a1, a2 }
*/
typedef int64_t rte_v128s64_t __attribute__((vector_size(16), aligned(16)));
/**
* 256 bits vector size to use with 8 bits elements.
*
* a = (rte_v256s8_t){ a00, a01, a02, a03, a04, a05, a06, a07,
* a08, a09, a10, a11, a12, a13, a14, a15,
* a16, a17, a18, a19, a20, a21, a22, a23,
* a24, a25, a26, a27, a28, a29, a30, a31 }
*/
typedef int8_t rte_v256s8_t __attribute__((vector_size(32), aligned(32)));
/**
* 256 bits vector size to use with 16 bits elements.
*
* a = (rte_v256s16_t){ a00, a01, a02, a03, a04, a05, a06, a07,
* a08, a09, a10, a11, a12, a13, a14, a15 }
*/
typedef int16_t rte_v256s16_t __attribute__((vector_size(32), aligned(32)));
/**
* 256 bits vector size to use with 32 bits elements.
*
* a = (rte_v256s32_t){ a0, a1, a2, a3, a4, a5, a6, a7 }
*/
typedef int32_t rte_v256s32_t __attribute__((vector_size(32), aligned(32)));
/**
* 256 bits vector size to use with 64 bits elements.
*
* a = (rte_v256s64_t){ a0, a1, a2, a3 }
*/
typedef int64_t rte_v256s64_t __attribute__((vector_size(32), aligned(32)));
#endif /* _RTE_VECT_H_ */