net/mlx5: rearrange SQ and CQ creation in DevX module
1. Rename functions to mention the internal resources. 2. Reduce the number of function arguments. Signed-off-by: Michael Baum <michaelba@nvidia.com> Acked-by: Matan Azrad <matan@nvidia.com>
This commit is contained in:
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f49f44839d
commit
88f2e3f18c
@ -79,7 +79,7 @@ mlx5_devx_modify_rq(struct mlx5_rxq_obj *rxq_obj, bool is_start)
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* DevX Rx queue object.
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*/
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static void
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rxq_release_devx_rq_resources(struct mlx5_rxq_ctrl *rxq_ctrl)
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mlx5_rxq_release_devx_rq_resources(struct mlx5_rxq_ctrl *rxq_ctrl)
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{
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struct mlx5_devx_dbr_page *dbr_page = rxq_ctrl->rq_dbrec_page;
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@ -106,7 +106,7 @@ rxq_release_devx_rq_resources(struct mlx5_rxq_ctrl *rxq_ctrl)
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* DevX Rx queue object.
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*/
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static void
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rxq_release_devx_cq_resources(struct mlx5_rxq_ctrl *rxq_ctrl)
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mlx5_rxq_release_devx_cq_resources(struct mlx5_rxq_ctrl *rxq_ctrl)
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{
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struct mlx5_devx_dbr_page *dbr_page = rxq_ctrl->cq_dbrec_page;
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@ -147,8 +147,8 @@ mlx5_rxq_devx_obj_release(struct mlx5_rxq_obj *rxq_obj)
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if (rxq_obj->devx_channel)
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mlx5_glue->devx_destroy_event_channel
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(rxq_obj->devx_channel);
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rxq_release_devx_rq_resources(rxq_obj->rxq_ctrl);
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rxq_release_devx_cq_resources(rxq_obj->rxq_ctrl);
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mlx5_rxq_release_devx_rq_resources(rxq_obj->rxq_ctrl);
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mlx5_rxq_release_devx_cq_resources(rxq_obj->rxq_ctrl);
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}
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}
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@ -247,7 +247,7 @@ mlx5_devx_wq_attr_fill(struct mlx5_priv *priv, struct mlx5_rxq_ctrl *rxq_ctrl,
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* The DevX RQ object initialized, NULL otherwise and rte_errno is set.
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*/
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static struct mlx5_devx_obj *
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rxq_create_devx_rq_resources(struct rte_eth_dev *dev, uint16_t idx)
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mlx5_rxq_create_devx_rq_resources(struct rte_eth_dev *dev, uint16_t idx)
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{
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struct mlx5_priv *priv = dev->data->dev_private;
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struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx];
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@ -325,7 +325,7 @@ rxq_create_devx_rq_resources(struct rte_eth_dev *dev, uint16_t idx)
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goto error;
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return rq;
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error:
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rxq_release_devx_rq_resources(rxq_ctrl);
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mlx5_rxq_release_devx_rq_resources(rxq_ctrl);
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return NULL;
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}
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@ -341,7 +341,7 @@ rxq_create_devx_rq_resources(struct rte_eth_dev *dev, uint16_t idx)
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* The DevX CQ object initialized, NULL otherwise and rte_errno is set.
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*/
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static struct mlx5_devx_obj *
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rxq_create_devx_cq_resources(struct rte_eth_dev *dev, uint16_t idx)
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mlx5_rxq_create_devx_cq_resources(struct rte_eth_dev *dev, uint16_t idx)
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{
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struct mlx5_devx_obj *cq_obj = 0;
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struct mlx5_devx_cq_attr cq_attr = { 0 };
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@ -451,7 +451,7 @@ rxq_create_devx_cq_resources(struct rte_eth_dev *dev, uint16_t idx)
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error:
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if (cq_obj)
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mlx5_devx_cmd_destroy(cq_obj);
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rxq_release_devx_cq_resources(rxq_ctrl);
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mlx5_rxq_release_devx_cq_resources(rxq_ctrl);
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return NULL;
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}
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@ -558,13 +558,13 @@ mlx5_rxq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx)
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tmpl->fd = mlx5_os_get_devx_channel_fd(tmpl->devx_channel);
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}
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/* Create CQ using DevX API. */
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tmpl->devx_cq = rxq_create_devx_cq_resources(dev, idx);
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tmpl->devx_cq = mlx5_rxq_create_devx_cq_resources(dev, idx);
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if (!tmpl->devx_cq) {
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DRV_LOG(ERR, "Failed to create CQ.");
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goto error;
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}
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/* Create RQ using DevX API. */
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tmpl->rq = rxq_create_devx_rq_resources(dev, idx);
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tmpl->rq = mlx5_rxq_create_devx_rq_resources(dev, idx);
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if (!tmpl->rq) {
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DRV_LOG(ERR, "Port %u Rx queue %u RQ creation failure.",
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dev->data->port_id, idx);
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@ -589,8 +589,8 @@ mlx5_rxq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx)
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claim_zero(mlx5_devx_cmd_destroy(tmpl->devx_cq));
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if (tmpl->devx_channel)
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mlx5_glue->devx_destroy_event_channel(tmpl->devx_channel);
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rxq_release_devx_rq_resources(rxq_ctrl);
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rxq_release_devx_cq_resources(rxq_ctrl);
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mlx5_rxq_release_devx_rq_resources(rxq_ctrl);
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mlx5_rxq_release_devx_cq_resources(rxq_ctrl);
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rte_errno = ret; /* Restore rte_errno. */
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return -rte_errno;
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}
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@ -878,7 +878,7 @@ mlx5_txq_obj_hairpin_new(struct rte_eth_dev *dev, uint16_t idx)
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* DevX Tx queue object.
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*/
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static void
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txq_release_devx_sq_resources(struct mlx5_txq_obj *txq_obj)
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mlx5_txq_release_devx_sq_resources(struct mlx5_txq_obj *txq_obj)
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{
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if (txq_obj->sq_devx)
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claim_zero(mlx5_devx_cmd_destroy(txq_obj->sq_devx));
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@ -900,7 +900,7 @@ txq_release_devx_sq_resources(struct mlx5_txq_obj *txq_obj)
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* DevX Tx queue object.
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*/
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static void
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txq_release_devx_cq_resources(struct mlx5_txq_obj *txq_obj)
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mlx5_txq_release_devx_cq_resources(struct mlx5_txq_obj *txq_obj)
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{
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if (txq_obj->cq_devx)
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claim_zero(mlx5_devx_cmd_destroy(txq_obj->cq_devx));
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@ -922,40 +922,38 @@ txq_release_devx_cq_resources(struct mlx5_txq_obj *txq_obj)
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* Txq object to destroy.
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*/
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static void
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txq_release_devx_resources(struct mlx5_txq_obj *txq_obj)
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mlx5_txq_release_devx_resources(struct mlx5_txq_obj *txq_obj)
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{
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MLX5_ASSERT(txq_obj->type == MLX5_TXQ_OBJ_TYPE_DEVX_SQ);
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txq_release_devx_cq_resources(txq_obj);
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txq_release_devx_sq_resources(txq_obj);
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mlx5_txq_release_devx_cq_resources(txq_obj);
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mlx5_txq_release_devx_sq_resources(txq_obj);
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}
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/**
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* Create a DevX CQ object for an Tx queue.
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* Create a DevX CQ object and its resources for an Tx queue.
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*
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* @param dev
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* Pointer to Ethernet device.
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* @param cqe_n
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* Number of entries in the CQ.
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* @param idx
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* Queue index in DPDK Tx queue array.
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* @param rxq_obj
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* Pointer to Tx queue object data.
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*
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* @return
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* The DevX CQ object initialized, NULL otherwise and rte_errno is set.
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* Number of CQEs in CQ, 0 otherwise and rte_errno is set.
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*/
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static struct mlx5_devx_obj *
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mlx5_tx_devx_cq_new(struct rte_eth_dev *dev, uint32_t cqe_n, uint16_t idx,
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struct mlx5_txq_obj *txq_obj)
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static uint32_t
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mlx5_txq_create_devx_cq_resources(struct rte_eth_dev *dev, uint16_t idx)
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{
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struct mlx5_priv *priv = dev->data->dev_private;
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struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
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struct mlx5_devx_obj *cq_obj = NULL;
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struct mlx5_txq_ctrl *txq_ctrl =
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container_of(txq_data, struct mlx5_txq_ctrl, txq);
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struct mlx5_txq_obj *txq_obj = txq_ctrl->obj;
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struct mlx5_devx_cq_attr cq_attr = { 0 };
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struct mlx5_cqe *cqe;
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size_t page_size;
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size_t alignment;
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uint32_t cqe_n;
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uint32_t i;
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int ret;
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@ -965,22 +963,25 @@ mlx5_tx_devx_cq_new(struct rte_eth_dev *dev, uint32_t cqe_n, uint16_t idx,
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if (page_size == (size_t)-1) {
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DRV_LOG(ERR, "Failed to get mem page size.");
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rte_errno = ENOMEM;
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return NULL;
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return 0;
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}
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/* Allocate memory buffer for CQEs. */
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alignment = MLX5_CQE_BUF_ALIGNMENT;
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if (alignment == (size_t)-1) {
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DRV_LOG(ERR, "Failed to get CQE buf alignment.");
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rte_errno = ENOMEM;
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return NULL;
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return 0;
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}
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/* Create the Completion Queue. */
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cqe_n = (1UL << txq_data->elts_n) / MLX5_TX_COMP_THRESH +
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1 + MLX5_TX_COMP_THRESH_INLINE_DIV;
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cqe_n = 1UL << log2above(cqe_n);
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if (cqe_n > UINT16_MAX) {
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DRV_LOG(ERR,
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"Port %u Tx queue %u requests to many CQEs %u.",
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dev->data->port_id, txq_data->idx, cqe_n);
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rte_errno = EINVAL;
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return NULL;
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return 0;
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}
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txq_obj->cq_buf = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO,
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cqe_n * sizeof(struct mlx5_cqe),
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@ -991,7 +992,7 @@ mlx5_tx_devx_cq_new(struct rte_eth_dev *dev, uint32_t cqe_n, uint16_t idx,
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"Port %u Tx queue %u cannot allocate memory (CQ).",
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dev->data->port_id, txq_data->idx);
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rte_errno = ENOMEM;
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return NULL;
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return 0;
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}
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/* Register allocated buffer in user space with DevX. */
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txq_obj->cq_umem = mlx5_glue->devx_umem_reg(priv->sh->ctx,
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@ -1027,50 +1028,47 @@ mlx5_tx_devx_cq_new(struct rte_eth_dev *dev, uint32_t cqe_n, uint16_t idx,
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cq_attr.log_cq_size = rte_log2_u32(cqe_n);
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cq_attr.log_page_size = rte_log2_u32(page_size);
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/* Create completion queue object with DevX. */
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cq_obj = mlx5_devx_cmd_create_cq(priv->sh->ctx, &cq_attr);
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if (!cq_obj) {
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txq_obj->cq_devx = mlx5_devx_cmd_create_cq(priv->sh->ctx, &cq_attr);
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if (!txq_obj->cq_devx) {
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rte_errno = errno;
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DRV_LOG(ERR, "Port %u Tx queue %u CQ creation failure.",
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dev->data->port_id, idx);
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goto error;
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}
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txq_data->cqe_n = log2above(cqe_n);
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txq_data->cqe_s = 1 << txq_data->cqe_n;
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/* Initial fill CQ buffer with invalid CQE opcode. */
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cqe = (struct mlx5_cqe *)txq_obj->cq_buf;
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for (i = 0; i < txq_data->cqe_s; i++) {
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for (i = 0; i < cqe_n; i++) {
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cqe->op_own = (MLX5_CQE_INVALID << 4) | MLX5_CQE_OWNER_MASK;
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++cqe;
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}
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return cq_obj;
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return cqe_n;
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error:
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ret = rte_errno;
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txq_release_devx_cq_resources(txq_obj);
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mlx5_txq_release_devx_cq_resources(txq_obj);
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rte_errno = ret;
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return NULL;
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return 0;
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}
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/**
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* Create a SQ object using DevX.
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* Create a SQ object and its resources using DevX.
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*
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* @param dev
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* Pointer to Ethernet device.
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* @param idx
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* Queue index in DPDK Tx queue array.
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* @param rxq_obj
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* Pointer to Tx queue object data.
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*
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* @return
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* The DevX SQ object initialized, NULL otherwise and rte_errno is set.
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* Number of WQEs in SQ, 0 otherwise and rte_errno is set.
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*/
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static struct mlx5_devx_obj *
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mlx5_devx_sq_new(struct rte_eth_dev *dev, uint16_t idx,
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struct mlx5_txq_obj *txq_obj)
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static uint32_t
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mlx5_txq_create_devx_sq_resources(struct rte_eth_dev *dev, uint16_t idx)
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{
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struct mlx5_priv *priv = dev->data->dev_private;
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struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
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struct mlx5_txq_ctrl *txq_ctrl =
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container_of(txq_data, struct mlx5_txq_ctrl, txq);
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struct mlx5_txq_obj *txq_obj = txq_ctrl->obj;
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struct mlx5_devx_create_sq_attr sq_attr = { 0 };
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struct mlx5_devx_obj *sq_obj = NULL;
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size_t page_size;
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uint32_t wqe_n;
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int ret;
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@ -1081,7 +1079,7 @@ mlx5_devx_sq_new(struct rte_eth_dev *dev, uint16_t idx,
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if (page_size == (size_t)-1) {
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DRV_LOG(ERR, "Failed to get mem page size.");
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rte_errno = ENOMEM;
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return NULL;
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return 0;
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}
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wqe_n = RTE_MIN(1UL << txq_data->elts_n,
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(uint32_t)priv->sh->device_attr.max_qp_wr);
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@ -1117,7 +1115,6 @@ mlx5_devx_sq_new(struct rte_eth_dev *dev, uint16_t idx,
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DRV_LOG(ERR, "Failed to allocate SQ door-bell.");
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goto error;
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}
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txq_data->wqe_n = log2above(wqe_n);
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sq_attr.tis_lst_sz = 1;
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sq_attr.tis_num = priv->sh->tis->id;
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sq_attr.state = MLX5_SQC_STATE_RST;
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@ -1131,7 +1128,7 @@ mlx5_devx_sq_new(struct rte_eth_dev *dev, uint16_t idx,
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sq_attr.wq_attr.wq_type = MLX5_WQ_TYPE_CYCLIC;
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sq_attr.wq_attr.pd = priv->sh->pdn;
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sq_attr.wq_attr.log_wq_stride = rte_log2_u32(MLX5_WQE_SIZE);
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sq_attr.wq_attr.log_wq_sz = txq_data->wqe_n;
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sq_attr.wq_attr.log_wq_sz = log2above(wqe_n);
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sq_attr.wq_attr.dbr_umem_valid = 1;
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sq_attr.wq_attr.dbr_addr = txq_obj->sq_dbrec_offset;
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sq_attr.wq_attr.dbr_umem_id =
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@ -1140,19 +1137,19 @@ mlx5_devx_sq_new(struct rte_eth_dev *dev, uint16_t idx,
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sq_attr.wq_attr.wq_umem_id = mlx5_os_get_umem_id(txq_obj->sq_umem);
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sq_attr.wq_attr.wq_umem_offset = (uintptr_t)txq_obj->sq_buf % page_size;
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/* Create Send Queue object with DevX. */
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sq_obj = mlx5_devx_cmd_create_sq(priv->sh->ctx, &sq_attr);
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if (!sq_obj) {
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txq_obj->sq_devx = mlx5_devx_cmd_create_sq(priv->sh->ctx, &sq_attr);
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if (!txq_obj->sq_devx) {
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rte_errno = errno;
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DRV_LOG(ERR, "Port %u Tx queue %u SQ creation failure.",
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dev->data->port_id, idx);
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goto error;
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}
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return sq_obj;
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return wqe_n;
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error:
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ret = rte_errno;
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txq_release_devx_sq_resources(txq_obj);
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mlx5_txq_release_devx_sq_resources(txq_obj);
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rte_errno = ret;
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return NULL;
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return 0;
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}
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#endif
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@ -1188,6 +1185,7 @@ mlx5_txq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx)
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struct mlx5_txq_obj *txq_obj = txq_ctrl->obj;
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void *reg_addr;
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uint32_t cqe_n;
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uint32_t wqe_n;
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int ret = 0;
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MLX5_ASSERT(txq_data);
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@ -1195,15 +1193,13 @@ mlx5_txq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx)
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txq_obj->type = MLX5_TXQ_OBJ_TYPE_DEVX_SQ;
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txq_obj->txq_ctrl = txq_ctrl;
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txq_obj->dev = dev;
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/* Create the Completion Queue. */
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cqe_n = (1UL << txq_data->elts_n) / MLX5_TX_COMP_THRESH +
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1 + MLX5_TX_COMP_THRESH_INLINE_DIV;
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/* Create completion queue object with DevX. */
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txq_obj->cq_devx = mlx5_tx_devx_cq_new(dev, cqe_n, idx, txq_obj);
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if (!txq_obj->cq_devx) {
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cqe_n = mlx5_txq_create_devx_cq_resources(dev, idx);
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if (!cqe_n) {
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rte_errno = errno;
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goto error;
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}
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txq_data->cqe_n = log2above(cqe_n);
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txq_data->cqe_s = 1 << txq_data->cqe_n;
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txq_data->cqe_m = txq_data->cqe_s - 1;
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txq_data->cqes = (volatile struct mlx5_cqe *)txq_obj->cq_buf;
|
||||
txq_data->cq_ci = 0;
|
||||
@ -1212,12 +1208,13 @@ mlx5_txq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx)
|
||||
txq_obj->cq_dbrec_offset);
|
||||
*txq_data->cq_db = 0;
|
||||
/* Create Send Queue object with DevX. */
|
||||
txq_obj->sq_devx = mlx5_devx_sq_new(dev, idx, txq_obj);
|
||||
if (!txq_obj->sq_devx) {
|
||||
wqe_n = mlx5_txq_create_devx_sq_resources(dev, idx);
|
||||
if (!wqe_n) {
|
||||
rte_errno = errno;
|
||||
goto error;
|
||||
}
|
||||
/* Create the Work Queue. */
|
||||
txq_data->wqe_n = log2above(wqe_n);
|
||||
txq_data->wqe_s = 1 << txq_data->wqe_n;
|
||||
txq_data->wqe_m = txq_data->wqe_s - 1;
|
||||
txq_data->wqes = (struct mlx5_wqe *)txq_obj->sq_buf;
|
||||
@ -1262,7 +1259,7 @@ mlx5_txq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx)
|
||||
return 0;
|
||||
error:
|
||||
ret = rte_errno; /* Save rte_errno before cleanup. */
|
||||
txq_release_devx_resources(txq_obj);
|
||||
mlx5_txq_release_devx_resources(txq_obj);
|
||||
rte_errno = ret; /* Restore rte_errno. */
|
||||
return -rte_errno;
|
||||
#endif
|
||||
@ -1283,7 +1280,7 @@ mlx5_txq_devx_obj_release(struct mlx5_txq_obj *txq_obj)
|
||||
claim_zero(mlx5_devx_cmd_destroy(txq_obj->tis));
|
||||
#ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
|
||||
} else {
|
||||
txq_release_devx_resources(txq_obj);
|
||||
mlx5_txq_release_devx_resources(txq_obj);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user